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Searched refs:irr (Results 1 – 25 of 48) sorted by relevance

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/openbmc/linux/drivers/crypto/ccree/
H A Dcc_driver.c185 u32 irr; in cc_isr() local
194 irr = cc_ioread(drvdata, CC_REG(HOST_IRR)); in cc_isr()
195 dev_dbg(dev, "Got IRR=0x%08X\n", irr); in cc_isr()
197 if (irr == 0) /* Probably shared interrupt line */ in cc_isr()
203 cc_iowrite(drvdata, CC_REG(HOST_ICR), irr); in cc_isr()
205 drvdata->irq = irr; in cc_isr()
207 if (irr & drvdata->comp_mask) { in cc_isr()
212 irr &= ~drvdata->comp_mask; in cc_isr()
217 if (irr & CC_GPR0_IRQ_MASK) { in cc_isr()
222 irr &= ~CC_GPR0_IRQ_MASK; in cc_isr()
[all …]
/openbmc/linux/drivers/parisc/
H A Dgsc.c73 unsigned long irr; in gsc_asic_intr() local
76 irr = gsc_readl(gsc_asic->hpa + OFFSET_IRR); in gsc_asic_intr()
77 if (irr == 0) in gsc_asic_intr()
80 DEBPRINTK("%s intr, mask=0x%x\n", gsc_asic->name, irr); in gsc_asic_intr()
83 int local_irq = __ffs(irr); in gsc_asic_intr()
86 irr &= ~(1 << local_irq); in gsc_asic_intr()
87 } while (irr); in gsc_asic_intr()
/openbmc/linux/arch/x86/kvm/
H A Di8259.c97 ret = !(s->irr & mask); in pic_set_irq1()
98 s->irr |= mask; in pic_set_irq1()
101 s->irr &= ~mask; in pic_set_irq1()
107 ret = !(s->irr & mask); in pic_set_irq1()
108 s->irr |= mask; in pic_set_irq1()
139 mask = s->irr & ~s->imr; in pic_get_irq()
226 s->irr &= ~(1 << irq); in pic_intack()
277 u8 edge_irr = s->irr & ~s->elcr; in kvm_pic_reset()
281 s->irr &= s->elcr; in kvm_pic_reset()
408 s->pics_state->pics[0].irr &= ~(1 << 2); in pic_poll_read()
[all …]
H A Dioapic.c218 ioapic->irr &= ~mask; in ioapic_set_irq()
249 old_irr = ioapic->irr; in ioapic_set_irq()
250 ioapic->irr |= mask; in ioapic_set_irq()
253 if (old_irr == ioapic->irr) { in ioapic_set_irq()
266 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr) in kvm_ioapic_inject_all() argument
271 for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS) in kvm_ioapic_inject_all()
372 ioapic->irr & (1 << index) && !e->fields.mask && !e->fields.remote_irr) { in ioapic_write_indirect()
400 ioapic->irr &= ~(1 << index); in ioapic_write_indirect()
524 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr) in kvm_ioapic_eoi_inject_work()
557 if (!ent->fields.mask && (ioapic->irr & (1 << pin))) { in kvm_ioapic_update_eoi_one()
[all …]
/openbmc/linux/arch/arm/mach-sa1100/
H A Dneponset.c144 unsigned int irr; in neponset_irq_handler() local
157 irr = readb_relaxed(d->base + IRR); in neponset_irq_handler()
158 irr ^= IRR_ETHERNET | IRR_USAR; in neponset_irq_handler()
160 if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0) in neponset_irq_handler()
168 if (irr & (IRR_ETHERNET | IRR_USAR)) { in neponset_irq_handler()
179 if (irr & IRR_ETHERNET) in neponset_irq_handler()
182 if (irr & IRR_USAR) in neponset_irq_handler()
188 if (irr & IRR_SA1111) in neponset_irq_handler()
/openbmc/linux/drivers/irqchip/
H A Dirq-realtek-rtl.c44 u32 irr; in write_irr() local
46 irr = readl(irr0 + offset) & ~(0xf << shift); in write_irr()
47 irr |= (value & 0xf) << shift; in write_irr()
48 writel(irr, irr0 + offset); in write_irr()
/openbmc/qemu/hw/intc/
H A Di8259.c82 mask = s->irr & ~s->imr; in pic_get_irq()
113 trace_pic_update_irq(s->master, s->imr, s->irr, s->priority_add); in pic_update_irq()
139 s->irr |= mask; in pic_set_irq()
142 s->irr &= ~mask; in pic_set_irq()
149 s->irr |= mask; in pic_set_irq()
171 s->irr &= ~(1 << irq); in pic_intack()
344 ret = s->irr; in pic_ioport_read()
H A Dioapic.c101 if (s->irr & mask) { in ioapic_service()
108 s->irr &= ~mask; in ioapic_service()
174 s->irr |= mask; in ioapic_set_irq()
179 s->irr &= ~mask; in ioapic_set_irq()
185 s->irr |= mask; in ioapic_set_irq()
270 if (!(entry & IOAPIC_LVT_MASKED) && (s->irr & (1 << n))) { in ioapic_eoi_broadcast()
H A Dioapic_common.c115 ioapic_irr_dump(buf, " IRR", s->irr); in ioapic_print_redtbl()
126 s->irr = 0; in ioapic_reset_common()
194 VMSTATE_UINT32_V(irr, IOAPICCommonState, 2),
H A Dapic.c133 vector = get_highest_priority_int(s->irr); in apic_sync_vapic()
137 vapic_state.irr = vector & 0xff; in apic_sync_vapic()
196 apic_reset_bit(s->irr, lvt & 0xff); in apic_deliver_pic_intr()
400 return get_highest_priority_int(s->irr); in apic_get_highest_priority_irr()
445 irrv = get_highest_priority_int(s->irr); in apic_irq_pending()
483 kvm_report_irq_delivered(!apic_get_bit(s->irr, vector_num)); in apic_set_irq()
485 apic_set_bit(s->irr, vector_num); in apic_set_irq()
748 apic_reset_bit(s->irr, intno); in apic_get_interrupt()
857 val = s->irr[index & 7]; in apic_register_read()
H A Di8259_common.c39 s->irr &= s->elcr; in pic_reset_common()
141 s->master ? 0 : 1, s->irr, s->imr, s->isr, in pic_print_info()
173 VMSTATE_UINT8(irr, PICCommonState),
H A Dapic_common.c212 memset(s->irr, 0, sizeof(s->irr)); in apic_init_reset()
392 VMSTATE_UINT32_ARRAY(irr, APICCommonState, 8),
/openbmc/qemu/hw/i386/kvm/
H A Dioapic.c73 s->irr = kioapic->irr; in kvm_ioapic_get()
91 kioapic->irr = s->irr; in kvm_ioapic_put()
H A Di8259.c53 s->irr = kpic->irr; in kvm_pic_get()
81 kpic->irr = s->irr; in kvm_pic_put()
/openbmc/linux/drivers/char/hw_random/
H A Dcctrng.c406 u32 irr; in cc_isr() local
413 irr = cc_ioread(drvdata, CC_HOST_RGF_IRR_REG_OFFSET); in cc_isr()
414 dev_dbg(dev, "Got IRR=0x%08X\n", irr); in cc_isr()
416 if (irr == 0) /* Probably shared interrupt line */ in cc_isr()
420 cc_iowrite(drvdata, CC_HOST_RGF_ICR_REG_OFFSET, irr); in cc_isr()
423 if (irr & CC_HOST_RNG_IRQ_MASK) { in cc_isr()
433 irr &= ~CC_HOST_RNG_IRQ_MASK; in cc_isr()
439 if (irr) { in cc_isr()
442 irr); in cc_isr()
/openbmc/linux/arch/ia64/include/asm/
H A Dprocessor.h534 unsigned long irr; in ia64_get_irr() local
537 case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break; in ia64_get_irr()
538 case 1: irr = ia64_getreg(_IA64_REG_CR_IRR1); break; in ia64_get_irr()
539 case 2: irr = ia64_getreg(_IA64_REG_CR_IRR2); break; in ia64_get_irr()
540 case 3: irr = ia64_getreg(_IA64_REG_CR_IRR3); break; in ia64_get_irr()
543 return test_bit(bit, &irr); in ia64_get_irr()
/openbmc/qemu/hw/gpio/
H A Dzaurus.c47 uint16_t irr; member
95 return s->irr; in scoop_read()
137 s->irr = value; in scoop_write()
238 VMSTATE_UINT16(irr, ScoopInfo),
/openbmc/qemu/hw/misc/
H A Dlasi.c65 val = s->irr; in lasi_chip_read_with_attrs()
213 VMSTATE_UINT32(irr, LasiState),
235 s->irr |= bit; in lasi_set_irq()
/openbmc/qemu/hw/isa/
H A Dlpc_ich9.c66 static void ich9_cc_update_ir(uint8_t irr[PCI_NUM_PINS], uint16_t ir) in ich9_cc_update_ir()
70 irr[intx] = (ir >> (intx * ICH9_CC_DIR_SHIFT)) & ICH9_CC_DIR_MASK; in ich9_cc_update_ir()
95 ich9_cc_update_ir(lpc->irr[slot], in ich9_cc_update()
106 lpc->irr[30][pci_intx] = pci_intx + 4; in ich9_cc_update()
126 lpc->irr[slot][intx] = (slot + intx) % 4 + 4; in ich9_cc_init()
284 return lpc->irr[PCI_SLOT(pci_dev->devfn)][intx]; in ich9_lpc_map_irq()
/openbmc/linux/arch/x86/kernel/
H A Dirq.c342 unsigned int irr, vector; in fixup_irqs() local
369 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); in fixup_irqs()
370 if (irr & (1 << (vector % 32))) { in fixup_irqs()
/openbmc/qemu/include/hw/i386/
H A Dapic_internal.h173 uint32_t irr[8]; /* interrupt request register */ member
199 uint8_t irr; member
/openbmc/u-boot/arch/arm/mach-davinci/include/mach/
H A Dddr2_defs.h24 unsigned int irr; /* 0xC0 */ member
/openbmc/qemu/include/hw/misc/
H A Dlasi.h66 uint32_t irr; member
/openbmc/qemu/include/hw/isa/
H A Di8259_internal.h48 uint8_t irr; /* interrupt request register */ member
/openbmc/qemu/target/i386/hvf/
H A Dhvf.c86 int irr = apic_get_highest_priority_irr(x86_cpu->apic_state); in vmx_update_tpr() local
89 if (irr == -1) { in vmx_update_tpr()
92 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, (irr > tpr) ? tpr >> 4 : in vmx_update_tpr()
93 irr >> 4); in vmx_update_tpr()

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