1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * linux/arch/arm/mach-sa1100/neponset.c
4 */
5 #include <linux/err.h>
6 #include <linux/gpio/driver.h>
7 #include <linux/gpio/gpio-reg.h>
8 #include <linux/gpio/machine.h>
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/irq.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/platform_device.h>
15 #include <linux/pm.h>
16 #include <linux/serial_core.h>
17 #include <linux/slab.h>
18 #include <linux/smc91x.h>
19
20 #include <asm/mach-types.h>
21 #include <asm/mach/map.h>
22 #include <asm/hardware/sa1111.h>
23 #include <linux/sizes.h>
24
25 #include <mach/hardware.h>
26 #include <mach/assabet.h>
27 #include <mach/neponset.h>
28 #include <mach/irqs.h>
29
30 #define NEP_IRQ_SMC91X 0
31 #define NEP_IRQ_USAR 1
32 #define NEP_IRQ_SA1111 2
33 #define NEP_IRQ_NR 3
34
35 #define WHOAMI 0x00
36 #define LEDS 0x10
37 #define SWPK 0x20
38 #define IRR 0x24
39 #define KP_Y_IN 0x80
40 #define KP_X_OUT 0x90
41 #define NCR_0 0xa0
42 #define MDM_CTL_0 0xb0
43 #define MDM_CTL_1 0xb4
44 #define AUD_CTL 0xc0
45
46 #define IRR_ETHERNET (1 << 0)
47 #define IRR_USAR (1 << 1)
48 #define IRR_SA1111 (1 << 2)
49
50 #define NCR_NGPIO 7
51 #define MDM_CTL0_NGPIO 4
52 #define MDM_CTL1_NGPIO 6
53 #define AUD_NGPIO 2
54
55 extern void sa1110_mb_disable(void);
56
57 #define to_neponset_gpio_chip(x) container_of(x, struct neponset_gpio_chip, gc)
58
59 static const char *neponset_ncr_names[] = {
60 "gp01_off", "tp_power", "ms_power", "enet_osc",
61 "spi_kb_wk_up", "a0vpp", "a1vpp"
62 };
63
64 static const char *neponset_mdmctl0_names[] = {
65 "rts3", "dtr3", "rts1", "dtr1",
66 };
67
68 static const char *neponset_mdmctl1_names[] = {
69 "cts3", "dsr3", "dcd3", "cts1", "dsr1", "dcd1"
70 };
71
72 static const char *neponset_aud_names[] = {
73 "sel_1341", "mute_1341",
74 };
75
76 struct neponset_drvdata {
77 void __iomem *base;
78 struct platform_device *sa1111;
79 struct platform_device *smc91x;
80 unsigned irq_base;
81 struct gpio_chip *gpio[4];
82 };
83
84 static struct gpiod_lookup_table neponset_uart1_gpio_table = {
85 .dev_id = "sa11x0-uart.1",
86 .table = {
87 GPIO_LOOKUP("neponset-mdm-ctl0", 2, "rts", GPIO_ACTIVE_LOW),
88 GPIO_LOOKUP("neponset-mdm-ctl0", 3, "dtr", GPIO_ACTIVE_LOW),
89 GPIO_LOOKUP("neponset-mdm-ctl1", 3, "cts", GPIO_ACTIVE_LOW),
90 GPIO_LOOKUP("neponset-mdm-ctl1", 4, "dsr", GPIO_ACTIVE_LOW),
91 GPIO_LOOKUP("neponset-mdm-ctl1", 5, "dcd", GPIO_ACTIVE_LOW),
92 { },
93 },
94 };
95
96 static struct gpiod_lookup_table neponset_uart3_gpio_table = {
97 .dev_id = "sa11x0-uart.3",
98 .table = {
99 GPIO_LOOKUP("neponset-mdm-ctl0", 0, "rts", GPIO_ACTIVE_LOW),
100 GPIO_LOOKUP("neponset-mdm-ctl0", 1, "dtr", GPIO_ACTIVE_LOW),
101 GPIO_LOOKUP("neponset-mdm-ctl1", 0, "cts", GPIO_ACTIVE_LOW),
102 GPIO_LOOKUP("neponset-mdm-ctl1", 1, "dsr", GPIO_ACTIVE_LOW),
103 GPIO_LOOKUP("neponset-mdm-ctl1", 2, "dcd", GPIO_ACTIVE_LOW),
104 { },
105 },
106 };
107
108 static struct gpiod_lookup_table neponset_pcmcia_table = {
109 .dev_id = "1800",
110 .table = {
111 GPIO_LOOKUP("sa1111", 1, "a0vcc", GPIO_ACTIVE_HIGH),
112 GPIO_LOOKUP("sa1111", 0, "a1vcc", GPIO_ACTIVE_HIGH),
113 GPIO_LOOKUP("neponset-ncr", 5, "a0vpp", GPIO_ACTIVE_HIGH),
114 GPIO_LOOKUP("neponset-ncr", 6, "a1vpp", GPIO_ACTIVE_HIGH),
115 GPIO_LOOKUP("sa1111", 2, "b0vcc", GPIO_ACTIVE_HIGH),
116 GPIO_LOOKUP("sa1111", 3, "b1vcc", GPIO_ACTIVE_HIGH),
117 { },
118 },
119 };
120
121 static struct neponset_drvdata *nep;
122
neponset_ncr_frob(unsigned int mask,unsigned int val)123 void neponset_ncr_frob(unsigned int mask, unsigned int val)
124 {
125 struct neponset_drvdata *n = nep;
126 unsigned long m = mask, v = val;
127
128 if (nep)
129 n->gpio[0]->set_multiple(n->gpio[0], &m, &v);
130 else
131 WARN(1, "nep unset\n");
132 }
133 EXPORT_SYMBOL(neponset_ncr_frob);
134
135 /*
136 * Install handler for Neponset IRQ. Note that we have to loop here
137 * since the ETHERNET and USAR IRQs are level based, and we need to
138 * ensure that the IRQ signal is deasserted before returning. This
139 * is rather unfortunate.
140 */
neponset_irq_handler(struct irq_desc * desc)141 static void neponset_irq_handler(struct irq_desc *desc)
142 {
143 struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
144 unsigned int irr;
145
146 while (1) {
147 /*
148 * Acknowledge the parent IRQ.
149 */
150 desc->irq_data.chip->irq_ack(&desc->irq_data);
151
152 /*
153 * Read the interrupt reason register. Let's have all
154 * active IRQ bits high. Note: there is a typo in the
155 * Neponset user's guide for the SA1111 IRR level.
156 */
157 irr = readb_relaxed(d->base + IRR);
158 irr ^= IRR_ETHERNET | IRR_USAR;
159
160 if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0)
161 break;
162
163 /*
164 * Since there is no individual mask, we have to
165 * mask the parent IRQ. This is safe, since we'll
166 * recheck the register for any pending IRQs.
167 */
168 if (irr & (IRR_ETHERNET | IRR_USAR)) {
169 desc->irq_data.chip->irq_mask(&desc->irq_data);
170
171 /*
172 * Ack the interrupt now to prevent re-entering
173 * this neponset handler. Again, this is safe
174 * since we'll check the IRR register prior to
175 * leaving.
176 */
177 desc->irq_data.chip->irq_ack(&desc->irq_data);
178
179 if (irr & IRR_ETHERNET)
180 generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X);
181
182 if (irr & IRR_USAR)
183 generic_handle_irq(d->irq_base + NEP_IRQ_USAR);
184
185 desc->irq_data.chip->irq_unmask(&desc->irq_data);
186 }
187
188 if (irr & IRR_SA1111)
189 generic_handle_irq(d->irq_base + NEP_IRQ_SA1111);
190 }
191 }
192
193 /* Yes, we really do not have any kind of masking or unmasking */
nochip_noop(struct irq_data * irq)194 static void nochip_noop(struct irq_data *irq)
195 {
196 }
197
198 static struct irq_chip nochip = {
199 .name = "neponset",
200 .irq_ack = nochip_noop,
201 .irq_mask = nochip_noop,
202 .irq_unmask = nochip_noop,
203 };
204
neponset_init_gpio(struct gpio_chip ** gcp,struct device * dev,const char * label,void __iomem * reg,unsigned num,bool in,const char * const * names)205 static int neponset_init_gpio(struct gpio_chip **gcp,
206 struct device *dev, const char *label, void __iomem *reg,
207 unsigned num, bool in, const char *const * names)
208 {
209 struct gpio_chip *gc;
210
211 gc = gpio_reg_init(dev, reg, -1, num, label, in ? 0xffffffff : 0,
212 readl_relaxed(reg), names, NULL, NULL);
213 if (IS_ERR(gc))
214 return PTR_ERR(gc);
215
216 *gcp = gc;
217
218 return 0;
219 }
220
221 static struct sa1111_platform_data sa1111_info = {
222 .disable_devs = SA1111_DEVID_PS2_MSE,
223 };
224
neponset_probe(struct platform_device * dev)225 static int neponset_probe(struct platform_device *dev)
226 {
227 struct neponset_drvdata *d;
228 struct resource *nep_res, *sa1111_res, *smc91x_res;
229 struct resource sa1111_resources[] = {
230 DEFINE_RES_MEM(0x40000000, SZ_8K),
231 { .flags = IORESOURCE_IRQ },
232 };
233 struct platform_device_info sa1111_devinfo = {
234 .parent = &dev->dev,
235 .name = "sa1111",
236 .id = 0,
237 .res = sa1111_resources,
238 .num_res = ARRAY_SIZE(sa1111_resources),
239 .data = &sa1111_info,
240 .size_data = sizeof(sa1111_info),
241 .dma_mask = 0xffffffffUL,
242 };
243 struct resource smc91x_resources[] = {
244 DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS,
245 0x02000000, "smc91x-regs"),
246 DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000,
247 0x02000000, "smc91x-attrib"),
248 { .flags = IORESOURCE_IRQ },
249 };
250 struct smc91x_platdata smc91x_platdata = {
251 .flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT,
252 };
253 struct platform_device_info smc91x_devinfo = {
254 .parent = &dev->dev,
255 .name = "smc91x",
256 .id = 0,
257 .res = smc91x_resources,
258 .num_res = ARRAY_SIZE(smc91x_resources),
259 .data = &smc91x_platdata,
260 .size_data = sizeof(smc91x_platdata),
261 };
262 int ret, irq;
263
264 if (nep)
265 return -EBUSY;
266
267 irq = ret = platform_get_irq(dev, 0);
268 if (ret < 0)
269 goto err_alloc;
270
271 nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
272 smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
273 sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2);
274 if (!nep_res || !smc91x_res || !sa1111_res) {
275 ret = -ENXIO;
276 goto err_alloc;
277 }
278
279 d = kzalloc(sizeof(*d), GFP_KERNEL);
280 if (!d) {
281 ret = -ENOMEM;
282 goto err_alloc;
283 }
284
285 d->base = ioremap(nep_res->start, SZ_4K);
286 if (!d->base) {
287 ret = -ENOMEM;
288 goto err_ioremap;
289 }
290
291 if (readb_relaxed(d->base + WHOAMI) != 0x11) {
292 dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n",
293 readb_relaxed(d->base + WHOAMI));
294 ret = -ENODEV;
295 goto err_id;
296 }
297
298 ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1);
299 if (ret <= 0) {
300 dev_err(&dev->dev, "unable to allocate %u irqs: %d\n",
301 NEP_IRQ_NR, ret);
302 if (ret == 0)
303 ret = -ENOMEM;
304 goto err_irq_alloc;
305 }
306
307 d->irq_base = ret;
308
309 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip,
310 handle_simple_irq);
311 irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST | IRQ_NOPROBE);
312 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip,
313 handle_simple_irq);
314 irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST | IRQ_NOPROBE);
315 irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip);
316
317 irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
318 irq_set_chained_handler_and_data(irq, neponset_irq_handler, d);
319
320 /* Disable GPIO 0/1 drivers so the buttons work on the Assabet */
321 writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0);
322
323 neponset_init_gpio(&d->gpio[0], &dev->dev, "neponset-ncr",
324 d->base + NCR_0, NCR_NGPIO, false,
325 neponset_ncr_names);
326 neponset_init_gpio(&d->gpio[1], &dev->dev, "neponset-mdm-ctl0",
327 d->base + MDM_CTL_0, MDM_CTL0_NGPIO, false,
328 neponset_mdmctl0_names);
329 neponset_init_gpio(&d->gpio[2], &dev->dev, "neponset-mdm-ctl1",
330 d->base + MDM_CTL_1, MDM_CTL1_NGPIO, true,
331 neponset_mdmctl1_names);
332 neponset_init_gpio(&d->gpio[3], &dev->dev, "neponset-aud-ctl",
333 d->base + AUD_CTL, AUD_NGPIO, false,
334 neponset_aud_names);
335
336 gpiod_add_lookup_table(&neponset_uart1_gpio_table);
337 gpiod_add_lookup_table(&neponset_uart3_gpio_table);
338 gpiod_add_lookup_table(&neponset_pcmcia_table);
339
340 /*
341 * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately
342 * something on the Neponset activates this IRQ on sleep (eth?)
343 */
344 #if 0
345 enable_irq_wake(irq);
346 #endif
347
348 dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n",
349 d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
350 nep = d;
351
352 /* Ensure that the memory bus request/grant signals are setup */
353 sa1110_mb_disable();
354
355 sa1111_resources[0].parent = sa1111_res;
356 sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111;
357 sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111;
358 d->sa1111 = platform_device_register_full(&sa1111_devinfo);
359
360 smc91x_resources[0].parent = smc91x_res;
361 smc91x_resources[1].parent = smc91x_res;
362 smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X;
363 smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X;
364 d->smc91x = platform_device_register_full(&smc91x_devinfo);
365
366 platform_set_drvdata(dev, d);
367
368 return 0;
369
370 err_irq_alloc:
371 err_id:
372 iounmap(d->base);
373 err_ioremap:
374 kfree(d);
375 err_alloc:
376 return ret;
377 }
378
neponset_remove(struct platform_device * dev)379 static void neponset_remove(struct platform_device *dev)
380 {
381 struct neponset_drvdata *d = platform_get_drvdata(dev);
382 int irq = platform_get_irq(dev, 0);
383
384 if (!IS_ERR(d->sa1111))
385 platform_device_unregister(d->sa1111);
386 if (!IS_ERR(d->smc91x))
387 platform_device_unregister(d->smc91x);
388
389 gpiod_remove_lookup_table(&neponset_pcmcia_table);
390 gpiod_remove_lookup_table(&neponset_uart3_gpio_table);
391 gpiod_remove_lookup_table(&neponset_uart1_gpio_table);
392
393 irq_set_chained_handler(irq, NULL);
394 irq_free_descs(d->irq_base, NEP_IRQ_NR);
395 nep = NULL;
396 iounmap(d->base);
397 kfree(d);
398 }
399
400 #ifdef CONFIG_PM_SLEEP
neponset_resume(struct device * dev)401 static int neponset_resume(struct device *dev)
402 {
403 struct neponset_drvdata *d = dev_get_drvdata(dev);
404 int i, ret = 0;
405
406 for (i = 0; i < ARRAY_SIZE(d->gpio); i++) {
407 ret = gpio_reg_resume(d->gpio[i]);
408 if (ret)
409 break;
410 }
411
412 return ret;
413 }
414
415 static const struct dev_pm_ops neponset_pm_ops = {
416 .resume_noirq = neponset_resume,
417 .restore_noirq = neponset_resume,
418 };
419 #define PM_OPS &neponset_pm_ops
420 #else
421 #define PM_OPS NULL
422 #endif
423
424 static struct platform_driver neponset_device_driver = {
425 .probe = neponset_probe,
426 .remove_new = neponset_remove,
427 .driver = {
428 .name = "neponset",
429 .pm = PM_OPS,
430 },
431 };
432
neponset_init(void)433 static int __init neponset_init(void)
434 {
435 return platform_driver_register(&neponset_device_driver);
436 }
437
438 subsys_initcall(neponset_init);
439