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Searched refs:iq (Results 1 – 25 of 57) sorted by relevance

123

/openbmc/linux/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_tx.c46 iq->octep_read_index = oct->hw_ops.update_iq_read_idx(iq); in octep_iq_process_completions()
96 netif_wake_subqueue(iq->netdev, iq->q_no); in octep_iq_process_completions()
184 iq = vzalloc(sizeof(*iq)); in octep_setup_iq()
185 if (!iq) in octep_setup_iq()
187 oct->iq[q_no] = iq; in octep_setup_iq()
194 iq->ring_size_mask = iq->max_count - 1; in octep_setup_iq()
247 dma_free_coherent(iq->dev, sglist_size, iq->sglist, iq->sglist_dma); in octep_setup_iq()
250 iq->desc_ring, iq->desc_ring_dma); in octep_setup_iq()
252 vfree(iq); in octep_setup_iq()
277 iq->desc_ring, iq->desc_ring_dma); in octep_free_iq()
[all …]
H A Doctep_main.c59 ioq_vector->iq = oct->iq[i]; in octep_alloc_ioq_vectors()
359 netdev_dbg(iq->netdev, "enabling intr for Q-%u\n", iq->q_no); in octep_enable_ioq_irq()
361 writel(iq->pkts_processed, iq->inst_cnt_reg); in octep_enable_ioq_irq()
362 iq->pkt_in_done -= iq->pkts_processed; in octep_enable_ioq_irq()
597 if (likely((iq->max_count - atomic_read(&iq->instr_pending)) >= in octep_iq_full_check()
602 netif_stop_subqueue(iq->netdev, iq->q_no); in octep_iq_full_check()
607 if (unlikely((iq->max_count - atomic_read(&iq->instr_pending)) >= in octep_iq_full_check()
609 netif_start_subqueue(iq->netdev, iq->q_no); in octep_iq_full_check()
635 struct octep_iq *iq; in octep_start_xmit() local
646 iq = oct->iq[q_no]; in octep_start_xmit()
[all …]
H A Doctep_config.h53 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq)
54 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs)
55 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type)
56 #define CFG_GET_IQ_PKIND(cfg) ((cfg)->iq.pkind)
58 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min)
59 #define CFG_GET_IQ_INTR_THRESHOLD(cfg) ((cfg)->iq.intr_threshold)
187 struct octep_iq_config iq; member
H A Doctep_cn9k_pf.c230 conf->iq.instr_type = OCTEP_64BYTE_INSTR; in octep_init_config_cn93_pf()
231 conf->iq.pkind = 0; in octep_init_config_cn93_pf()
232 conf->iq.db_min = OCTEP_DB_MIN; in octep_init_config_cn93_pf()
264 struct octep_iq *iq = oct->iq[iq_no]; in octep_setup_iq_regs_cn93_pf() local
285 iq->desc_ring_dma); in octep_setup_iq_regs_cn93_pf()
287 iq->max_count); in octep_setup_iq_regs_cn93_pf()
292 iq->doorbell_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cn93_pf()
294 iq->inst_cnt_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cn93_pf()
296 iq->intr_lvl_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cn93_pf()
602 iq->pkt_in_done = pkt_in_done; in octep_update_iq_read_index_cn93_pf()
[all …]
H A Doctep_ethtool.c161 struct octep_iq *iq = oct->iq[q]; in octep_get_ethtool_stats() local
164 tx_packets += iq->stats.instr_completed; in octep_get_ethtool_stats()
165 tx_bytes += iq->stats.bytes_sent; in octep_get_ethtool_stats()
166 tx_busy_errors += iq->stats.tx_busy; in octep_get_ethtool_stats()
209 struct octep_iq *iq = oct->iq[q]; in octep_get_ethtool_stats() local
211 data[i++] = iq->stats.instr_posted; in octep_get_ethtool_stats()
212 data[i++] = iq->stats.instr_completed; in octep_get_ethtool_stats()
213 data[i++] = iq->stats.bytes_sent; in octep_get_ethtool_stats()
214 data[i++] = iq->stats.tx_busy; in octep_get_ethtool_stats()
H A Doctep_main.h72 u32 (*update_iq_read_idx)(struct octep_iq *iq);
126 struct octep_iq *iq; member
229 struct octep_iq *iq[OCTEP_MAX_IQ]; member
371 int octep_iq_process_completions(struct octep_iq *iq, u16 budget);
/openbmc/linux/drivers/crypto/cavium/zip/
H A Dzip_device.c59 return ((zip_dev->iq[queue].sw_head - zip_dev->iq[queue].sw_tail) * in zip_cmd_queue_consumed()
128 zip_dev->iq[queue].sw_head = zip_dev->iq[queue].sw_tail; in zip_load_instr()
139 zip_dev->iq[queue].pend_cnt++; in zip_load_instr()
151 zip_dev->iq[queue].sw_head, zip_dev->iq[queue].sw_tail, in zip_load_instr()
152 zip_dev->iq[queue].hw_tail); in zip_load_instr()
155 zip_dev->iq[queue].pend_cnt); in zip_load_instr()
187 zip_dev->iq[queue].hw_tail = zip_dev->iq[queue].sw_head; in zip_update_cmd_bufs()
193 zip_dev->iq[queue].done_cnt++; in zip_update_cmd_bufs()
194 zip_dev->iq[queue].pend_cnt--; in zip_update_cmd_bufs()
197 zip_dev->iq[queue].sw_head, zip_dev->iq[queue].sw_tail, in zip_update_cmd_bufs()
[all …]
H A Dzip_mem.c59 zip->iq[q].sw_head = (u64 *)__get_free_pages((GFP_KERNEL | GFP_DMA), in zip_cmd_qbuf_alloc()
62 if (!zip->iq[q].sw_head) in zip_cmd_qbuf_alloc()
65 memset(zip->iq[q].sw_head, 0, ZIP_CMD_QBUF_SIZE); in zip_cmd_qbuf_alloc()
67 zip_dbg("cmd_qbuf_alloc[%d] Success : %p\n", q, zip->iq[q].sw_head); in zip_cmd_qbuf_alloc()
78 zip_dbg("Freeing cmd_qbuf 0x%lx\n", zip->iq[q].sw_tail); in zip_cmd_qbuf_free()
80 free_pages((u64)zip->iq[q].sw_tail, get_order(ZIP_CMD_QBUF_SIZE)); in zip_cmd_qbuf_free()
H A Dzip_main.c172 memset(&zip->iq[q], 0x0, sizeof(struct zip_iq)); in zip_init_hw()
174 spin_lock_init(&zip->iq[q].lock); in zip_init_hw()
185 zip->iq[q].sw_tail = zip->iq[q].sw_head; in zip_init_hw()
186 zip->iq[q].hw_tail = zip->iq[q].sw_head; in zip_init_hw()
190 que_sbuf_addr.s.ptr = (__pa(zip->iq[q].sw_head) >> in zip_init_hw()
203 zip->iq[q].sw_head, zip->iq[q].sw_tail, in zip_init_hw()
204 zip->iq[q].hw_tail); in zip_init_hw()
/openbmc/linux/drivers/net/ethernet/cavium/liquidio/
H A Drequest_manager.c77 iq->base_addr = lio_dma_alloc(oct, q_size, &iq->base_addr_dma); in octeon_init_instr_queue()
94 lio_dma_free(oct, q_size, iq->base_addr, iq->base_addr_dma); in octeon_init_instr_queue()
101 iq_no, iq->base_addr, &iq->base_addr_dma, iq->max_count); in octeon_init_instr_queue()
140 lio_dma_free(oct, q_size, iq->base_addr, iq->base_addr_dma); in octeon_init_instr_queue()
268 writel(iq->fill_cnt, iq->doorbell_reg); in ring_doorbell()
295 iqptr = iq->base_addr + (cmdsize * iq->host_write_index); in __copy_cmd_into_iq()
323 iq->host_write_index = incr_index(iq->host_write_index, 1, in __post_command2()
453 iq->octeon_read_index = oct->fn_list.update_iq_read_idx(iq); in octeon_flush_iq()
457 if (iq->flush_index == iq->octeon_read_index) in octeon_flush_iq()
502 if (!iq) in __check_db_timeout()
[all …]
H A Dcn23xx_vf_regs.h70 #define CN23XX_VF_SLI_IQ_PKT_CONTROL64(iq) \ argument
71 (CN23XX_VF_SLI_IQ_PKT_CONTROL_START64 + ((iq) * CN23XX_VF_IQ_OFFSET))
73 #define CN23XX_VF_SLI_IQ_BASE_ADDR64(iq) \ argument
74 (CN23XX_VF_SLI_IQ_BASE_ADDR_START64 + ((iq) * CN23XX_VF_IQ_OFFSET))
76 #define CN23XX_VF_SLI_IQ_SIZE(iq) \ argument
77 (CN23XX_VF_SLI_IQ_SIZE_START + ((iq) * CN23XX_VF_IQ_OFFSET))
79 #define CN23XX_VF_SLI_IQ_DOORBELL(iq) \ argument
80 (CN23XX_VF_SLI_IQ_DOORBELL_START + ((iq) * CN23XX_VF_IQ_OFFSET))
82 #define CN23XX_VF_SLI_IQ_INSTR_COUNT64(iq) \ argument
83 (CN23XX_VF_SLI_IQ_INSTR_COUNT_START64 + ((iq) * CN23XX_VF_IQ_OFFSET))
H A Dcn66xx_regs.h143 #define CN6XXX_SLI_IQ_BASE_ADDR64(iq) \ argument
144 (CN6XXX_SLI_IQ_BASE_ADDR_START64 + ((iq) * CN6XXX_IQ_OFFSET))
146 #define CN6XXX_SLI_IQ_SIZE(iq) \ argument
147 (CN6XXX_SLI_IQ_SIZE_START + ((iq) * CN6XXX_IQ_OFFSET))
149 #define CN6XXX_SLI_IQ_PKT_INSTR_HDR64(iq) \ argument
152 #define CN6XXX_SLI_IQ_DOORBELL(iq) \ argument
153 (CN6XXX_SLI_IQ_DOORBELL_START + ((iq) * CN6XXX_IQ_OFFSET))
155 #define CN6XXX_SLI_IQ_INSTR_COUNT(iq) \ argument
156 (CN6XXX_SLI_IQ_INSTR_COUNT_START + ((iq) * CN6XXX_IQ_OFFSET))
158 #define CN66XX_SLI_IQ_BP64(iq) \ argument
[all …]
H A Dcn23xx_vf_device.c104 struct octeon_instr_queue *iq; in cn23xx_vf_setup_global_input_regs() local
116 iq = oct->instr_queue[q_no]; in cn23xx_vf_setup_global_input_regs()
118 if (iq) in cn23xx_vf_setup_global_input_regs()
219 iq->base_addr_dma); in cn23xx_setup_vf_iq_regs()
225 iq->doorbell_reg = in cn23xx_setup_vf_iq_regs()
227 iq->inst_cnt_reg = in cn23xx_setup_vf_iq_regs()
230 iq_no, iq->doorbell_reg, iq->inst_cnt_reg); in cn23xx_setup_vf_iq_regs()
240 iq->inst_cnt_reg); in cn23xx_setup_vf_iq_regs()
242 iq->reset_instr_cnt = 0; in cn23xx_setup_vf_iq_regs()
531 iq->pkt_in_done = pkt_in_done; in cn23xx_update_read_index()
[all …]
H A Dcn23xx_pf_regs.h170 #define CN23XX_SLI_IQ_PKT_CONTROL64(iq) \ argument
171 (CN23XX_SLI_IQ_PKT_CONTROL_START64 + ((iq) * CN23XX_IQ_OFFSET))
173 #define CN23XX_SLI_IQ_BASE_ADDR64(iq) \ argument
174 (CN23XX_SLI_IQ_BASE_ADDR_START64 + ((iq) * CN23XX_IQ_OFFSET))
176 #define CN23XX_SLI_IQ_SIZE(iq) \ argument
177 (CN23XX_SLI_IQ_SIZE_START + ((iq) * CN23XX_IQ_OFFSET))
179 #define CN23XX_SLI_IQ_DOORBELL(iq) \ argument
180 (CN23XX_SLI_IQ_DOORBELL_START + ((iq) * CN23XX_IQ_OFFSET))
182 #define CN23XX_SLI_IQ_INSTR_COUNT64(iq) \ argument
183 (CN23XX_SLI_IQ_INSTR_COUNT_START64 + ((iq) * CN23XX_IQ_OFFSET))
H A Docteon_config.h121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq)
122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs)
123 #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) ((cfg)->iq.pending_list_size)
124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type)
125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min)
126 #define CFG_GET_IQ_DB_TIMEOUT(cfg) ((cfg)->iq.db_timeout)
128 #define CFG_GET_IQ_INTR_PKT(cfg) ((cfg)->iq.iq_intr_pkt)
129 #define CFG_SET_IQ_INTR_PKT(cfg, val) (cfg)->iq.iq_intr_pkt = val
410 struct octeon_iq_config iq; member
H A Dcn66xx_device.c272 iq->base_addr_dma); in lio_cn6xxx_setup_iq_regs()
282 iq_no, iq->doorbell_reg, iq->inst_cnt_reg); in lio_cn6xxx_setup_iq_regs()
287 iq->reset_instr_cnt = readl(iq->inst_cnt_reg); in lio_cn6xxx_setup_iq_regs()
339 mask |= oct->io_qmask.iq; in lio_cn6xxx_enable_io_queues()
357 mask ^= oct->io_qmask.iq; in lio_cn6xxx_disable_io_queues()
361 mask = (u32)oct->io_qmask.iq; in lio_cn6xxx_disable_io_queues()
370 if (!(oct->io_qmask.iq & BIT_ULL(i))) in lio_cn6xxx_disable_io_queues()
451 u32 new_idx = readl(iq->inst_cnt_reg); in lio_cn6xxx_update_read_index()
457 if (iq->reset_instr_cnt < new_idx) in lio_cn6xxx_update_read_index()
458 new_idx -= iq->reset_instr_cnt; in lio_cn6xxx_update_read_index()
[all …]
H A Dcn68xx_regs.h32 #define CN68XX_SLI_IQ_PORT_PKIND(iq) \ argument
33 (CN68XX_SLI_IQ_PORT0_PKIND + ((iq) * CN6XXX_IQ_OFFSET))
H A Docteon_device.c41 .iq = {
150 .iq = {
316 .iq = {
419 .iq = {
1464 if (iq) { in lio_enable_irq()
1465 spin_lock_bh(&iq->lock); in lio_enable_irq()
1466 writel(iq->pkts_processed, iq->inst_cnt_reg); in lio_enable_irq()
1467 iq->pkt_in_done -= iq->pkts_processed; in lio_enable_irq()
1468 iq->pkts_processed = 0; in lio_enable_irq()
1471 oct = iq->oct_dev; in lio_enable_irq()
[all …]
H A Dlio_vf_main.c125 iq = oct->instr_queue[i]; in pcierror_quiesce_device()
128 spin_lock_bh(&iq->lock); in pcierror_quiesce_device()
129 iq->fill_cnt = 0; in pcierror_quiesce_device()
130 iq->octeon_read_index = iq->host_write_index; in pcierror_quiesce_device()
134 spin_unlock_bh(&iq->lock); in pcierror_quiesce_device()
486 iq = oct->instr_queue[i]; in octeon_destroy_resources()
489 spin_lock_bh(&iq->lock); in octeon_destroy_resources()
490 iq->fill_cnt = 0; in octeon_destroy_resources()
491 iq->octeon_read_index = iq->host_write_index; in octeon_destroy_resources()
825 int i, frags, iq; in free_netsgbuf() local
[all …]
H A Dcn23xx_pf_device.c403 struct octeon_instr_queue *iq; in cn23xx_pf_setup_global_input_regs() local
446 iq = oct->instr_queue[q_no]; in cn23xx_pf_setup_global_input_regs()
447 if (iq) in cn23xx_pf_setup_global_input_regs()
596 iq->base_addr_dma); in cn23xx_setup_iq_regs()
602 iq->doorbell_reg = in cn23xx_setup_iq_regs()
604 iq->inst_cnt_reg = in cn23xx_setup_iq_regs()
607 iq_no, iq->doorbell_reg, iq->inst_cnt_reg); in cn23xx_setup_iq_regs()
617 iq->inst_cnt_reg); in cn23xx_setup_iq_regs()
625 iq->reset_instr_cnt = 0; in cn23xx_setup_iq_regs()
1088 iq->pkt_in_done = pkt_in_done; in cn23xx_update_read_index()
[all …]
/openbmc/linux/drivers/crypto/marvell/octeontx2/
H A Dotx2_cptlf.h129 if (iq->real_vaddr) in otx2_cpt_free_instruction_queues()
131 iq->size, in otx2_cpt_free_instruction_queues()
132 iq->real_vaddr, in otx2_cpt_free_instruction_queues()
134 iq->real_vaddr = NULL; in otx2_cpt_free_instruction_queues()
135 iq->vaddr = NULL; in otx2_cpt_free_instruction_queues()
154 iq->real_vaddr = dma_alloc_coherent(&lfs->pdev->dev, iq->size, in otx2_cpt_alloc_instruction_queues()
156 if (!iq->real_vaddr) { in otx2_cpt_alloc_instruction_queues()
160 iq->vaddr = iq->real_vaddr + OTX2_CPT_INST_GRP_QLEN_BYTES; in otx2_cpt_alloc_instruction_queues()
161 iq->dma_addr = iq->real_dma_addr + OTX2_CPT_INST_GRP_QLEN_BYTES; in otx2_cpt_alloc_instruction_queues()
164 iq->vaddr = PTR_ALIGN(iq->vaddr, OTX2_CPT_INST_Q_ALIGNMENT); in otx2_cpt_alloc_instruction_queues()
[all …]
/openbmc/linux/drivers/scsi/csiostor/
H A Dcsio_isr.c212 csio_scsi_isr_handler(struct csio_q *iq) in csio_scsi_isr_handler() argument
214 struct csio_hw *hw = (struct csio_hw *)iq->owner; in csio_scsi_isr_handler()
223 if (unlikely(csio_wr_process_iq(hw, iq, csio_process_scsi_cmpl, in csio_scsi_isr_handler()
258 struct csio_q *iq = (struct csio_q *) dev_id; in csio_scsi_isr() local
261 if (unlikely(!iq)) in csio_scsi_isr()
264 hw = (struct csio_hw *)iq->owner; in csio_scsi_isr()
271 csio_scsi_isr_handler(iq); in csio_scsi_isr()
288 struct csio_q *iq = priv; in csio_scsi_intx_handler() local
290 csio_scsi_isr_handler(iq); in csio_scsi_intx_handler()
H A Dcsio_wr.h410 struct csio_iq iq; member
463 #define csio_q_iqid(__hw, __idx) ((__hw)->wrm.q_arr[(__idx)]->un.iq.iqid)
465 ((__hw)->wrm.q_arr[(__idx)]->un.iq.physiqid)
467 ((__hw)->wrm.q_arr[(__idx)]->un.iq.flq_idx)
473 #define csio_iq_has_fl(__iq) ((__iq)->un.iq.flq_idx != -1)
476 csio_q_flid((__hw), (__hw)->wrm.q_arr[(__iq_qidx)]->un.iq.flq_idx)
H A Dcsio_wr.c255 q->un.iq.genbit = 1; in csio_wr_alloc_q()
278 q->un.iq.flq_idx = flq_idx; in csio_wr_alloc_q()
280 flq = wrm->q_arr[q->un.iq.flq_idx]; in csio_wr_alloc_q()
306 q->un.iq.flq_idx = -1; in csio_wr_alloc_q()
310 q->un.iq.iq_intx_handler = iq_intx_handler; in csio_wr_alloc_q()
771 q->un.iq.genbit = 1; in csio_wr_cleanup_iq_ftr()
1140 wrm->q_arr[q->un.iq.flq_idx] : NULL; in csio_wr_process_iq()
1184 q_completed->un.iq.iq_intx_handler); in csio_wr_process_iq()
1210 q->un.iq.genbit ^= 0x1; in csio_wr_process_iq()
1251 INGRESSQID_V(q->un.iq.physiqid) | in csio_wr_process_iq()
[all …]
/openbmc/linux/scripts/
H A Dtags.sh261 if $1 --version 2>&1 | grep -iq universal; then
282 if ! $1 --list-languages | grep -iq kconfig; then
300 if $1 --version 2>&1 | grep -iq exuberant; then
302 elif $1 --version 2>&1 | grep -iq emacs; then

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