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Searched refs:intel_crtc_has_type (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_ddi_buf_trans.c1151 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) in hsw_get_buf_trans()
1153 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in hsw_get_buf_trans()
1164 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) in bdw_get_buf_trans()
1166 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in bdw_get_buf_trans()
1168 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in bdw_get_buf_trans()
1199 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in skl_y_get_buf_trans()
1201 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in skl_y_get_buf_trans()
1213 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in skl_u_get_buf_trans()
1215 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in skl_u_get_buf_trans()
1227 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in skl_get_buf_trans()
[all …]
H A Dintel_dpll.c413 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { in i9xx_select_p2_div()
818 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) in i9xx_compute_dpll()
829 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO) || in i9xx_compute_dpll()
830 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in i9xx_compute_dpll()
869 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) && in i9xx_compute_dpll()
897 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { in i8xx_compute_dpll()
923 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DVO)) in i8xx_compute_dpll()
926 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) && in i8xx_compute_dpll()
947 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) in hsw_crtc_compute_clock()
955 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) in hsw_crtc_compute_clock()
[all …]
H A Dintel_ddi.c536 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { in intel_ddi_transcoder_func_reg_val_get()
548 } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) { in intel_ddi_transcoder_func_reg_val_get()
551 } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) { in intel_ddi_transcoder_func_reg_val_get()
662 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { in intel_ddi_disable_transcoder_func()
963 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))) in intel_ddi_get_power_domains()
1038 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in skl_ddi_set_iboost()
1120 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) { in icl_ddi_combo_vswing_program()
1185 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in icl_combo_phy_set_signal_levels()
1369 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { in tgl_dkl_phy_set_signal_levels()
1436 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in intel_ddi_level()
[all …]
H A Dintel_pch_display.c286 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in ilk_enable_pch_transcoder()
295 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) in ilk_enable_pch_transcoder()
H A Dintel_crtc.c540 intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI); in intel_pipe_update_start()
692 intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI)) in intel_pipe_update_end()
H A Dintel_dpll_mgr.c1127 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in hsw_compute_dpll()
1131 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) in hsw_compute_dpll()
1145 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in hsw_get_dpll()
1149 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) in hsw_get_dpll()
1819 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in skl_compute_dpll()
1835 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) in skl_get_dpll()
2289 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in bxt_compute_dpll()
2866 bool is_dp = !intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI); in icl_calc_mg_pll_state()
3178 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) || in icl_compute_combo_phy_dpll()
3179 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) in icl_compute_combo_phy_dpll()
H A Dintel_cx0_phy.c331 if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in intel_c10_get_tx_vboost_lvl()
345 if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in intel_c10_get_tx_term_ctl()
1750 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) in intel_c10pll_tables_get()
1754 } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { in intel_c10pll_tables_get()
2007 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in intel_c20_pll_tables_get()
2021 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { in intel_c20pll_calc_state()
2423 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) && in intel_program_port_clock_ctl()
H A Dintel_audio.c539 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP)) in hsw_audio_codec_enable()
748 if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) in intel_audio_codec_enable()
805 if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST)) in intel_audio_codec_disable()
H A Dintel_vblank.c483 } else if (HAS_DDI(i915) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { in intel_crtc_scanline_offset()
H A Dintel_snps_phy.c1773 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) { in intel_mpllb_tables_get()
1777 } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { in intel_mpllb_tables_get()
1792 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { in intel_mpllb_calc_state()
H A Dintel_cdclk.c2608 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) && in intel_crtc_compute_min_cdclk()
2617 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) && in intel_crtc_compute_min_cdclk()
2851 if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) in skl_dpll0_vco()
H A Dintel_display.c411 if (intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI)) in intel_enable_transcoder()
2056 if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI)) { in i9xx_crtc_disable()
2271 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) && in intel_crtc_compute_pipe_src()
2514 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) in intel_set_transcoder_timings()
2730 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) in i9xx_set_pipeconf()
3068 !intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) in ilk_set_pipeconf()
H A Dintel_dp.c1324 !intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) in intel_dp_source_supports_fec()
1340 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP) && !crtc_state->fec_enable) in intel_dp_supports_dsc()
4373 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST) && in intel_dp_retrain_link()
4479 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST) && in intel_dp_do_phy_test()
H A Dintel_display_types.h2068 intel_crtc_has_type(const struct intel_crtc_state *crtc_state, in intel_crtc_has_type() function
H A Dintel_hdcp.c2367 if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) { in intel_hdcp_enable()