|
Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29 |
|
| #
6b9bd7c3 |
| 12-May-2023 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915/display: add i915 parameter to I915_STATE_WARN()
Add i915 parameter to I915_STATE_WARN() and use device based logging.
Done using cocci + hand edited where there was no i915 local variable
drm/i915/display: add i915 parameter to I915_STATE_WARN()
Add i915 parameter to I915_STATE_WARN() and use device based logging.
Done using cocci + hand edited where there was no i915 local variable
ready.
v2: avoid null deref in verify_connector_state()
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230512181658.1735594-1-jani.nikula@intel.com
show more ...
|
|
Revision tags: v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25 |
|
| #
e920aabf |
| 14-Apr-2023 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Make intel_{mpllb,c10pll}_state_verify() safer
intel_{mpllb,c10pll}_state_verify() blows up if you call them
for a non-modeset/fastset commit on account of the relevant
connector not being
drm/i915: Make intel_{mpllb,c10pll}_state_verify() safer
intel_{mpllb,c10pll}_state_verify() blows up if you call them
for a non-modeset/fastset commit on account of the relevant
connector not being part of the overall atomic state.
Currently the state checker only runs for modeset/fastset
commits, but for testing purposes it is sometimes desirable
to run it for other commits too. Check for modeset/fastset
in intel_{mpllb,c10pll}_state_verify() itself to make this safe.
v2: Give the new intel_c10pll_state_verify() the same treatment
Add comment to explain why we do this
Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230414190159.7904-1-ville.syrjala@linux.intel.com
show more ...
|
|
Revision tags: v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14 |
|
| #
46bc23dc |
| 22-Feb-2023 |
Ankit Nautiyal <ankit.k.nautiyal@intel.com> |
drm/i915/dg2: Add HDMI pixel clock frequencies 267.30 and 319.89 MHz
Add snps phy table values for HDMI pixel clocks 267.30 MHz and
319.89 MHz. Values are based on the Bspec algorithm for
PLL progra
drm/i915/dg2: Add HDMI pixel clock frequencies 267.30 and 319.89 MHz
Add snps phy table values for HDMI pixel clocks 267.30 MHz and
319.89 MHz. Values are based on the Bspec algorithm for
PLL programming for HDMI.
Cc: stable@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8008
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230223043619.3941382-1-ankit.k.nautiyal@intel.com
(cherry picked from commit d46746b8b13cbd377ffc733e465d25800459a31b)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
show more ...
|
| #
d46746b8 |
| 22-Feb-2023 |
Ankit Nautiyal <ankit.k.nautiyal@intel.com> |
drm/i915/dg2: Add HDMI pixel clock frequencies 267.30 and 319.89 MHz
Add snps phy table values for HDMI pixel clocks 267.30 MHz and
319.89 MHz. Values are based on the Bspec algorithm for
PLL progra
drm/i915/dg2: Add HDMI pixel clock frequencies 267.30 and 319.89 MHz
Add snps phy table values for HDMI pixel clocks 267.30 MHz and
319.89 MHz. Values are based on the Bspec algorithm for
PLL programming for HDMI.
Cc: stable@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8008
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230223043619.3941382-1-ankit.k.nautiyal@intel.com
show more ...
|
|
Revision tags: v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7 |
|
| #
3a7e2d58 |
| 17-Jan-2023 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915: move snps_phy_failed_calibration to display sub-struct under snps
Move the display related member to the struct drm_i915_private display
sub-struct.
Signed-off-by: Jani Nikula <jani.nikul
drm/i915: move snps_phy_failed_calibration to display sub-struct under snps
Move the display related member to the struct drm_i915_private display
sub-struct.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230117143946.2426043-1-jani.nikula@intel.com
show more ...
|
|
Revision tags: v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12 |
|
| #
5544d5e4 |
| 07-Dec-2022 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915/snps: switch to intel_de_* register accessors in display code
Avoid direct uncore use in display code.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Jani Nikula
drm/i915/snps: switch to intel_de_* register accessors in display code
Avoid direct uncore use in display code.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/4992661d93f8d5744e19408dc60ae49a5f2d597a.1670433372.git.jani.nikula@intel.com
show more ...
|
|
Revision tags: v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78 |
|
| #
801543b2 |
| 09-Nov-2022 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915: stop including i915_irq.h from i915_trace.h
Turns out many of the files that need i915_reg.h get it implicitly via
{display/intel_de.h, gt/intel_context.h} -> i915_trace.h -> i915_irq.h
->
drm/i915: stop including i915_irq.h from i915_trace.h
Turns out many of the files that need i915_reg.h get it implicitly via
{display/intel_de.h, gt/intel_context.h} -> i915_trace.h -> i915_irq.h
-> i915_reg.h. Since i915_trace.h doesn't actually need i915_irq.h,
makes sense to drop it, but that requires adding quite a few new
includes all over the place.
Prefer including i915_reg.h where needed instead of adding another
implicit include, because eventually we'll want to split up i915_reg.h
and only include the specific registers at each place.
Also some places actually needed i915_irq.h too.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6e78a2e0ac1bffaf5af3b5ccc21dff05e6518cef.1668008071.git.jani.nikula@intel.com
show more ...
|
|
Revision tags: v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59 |
|
| #
11c7faa6 |
| 01-Aug-2022 |
Taylor, Clinton A <clinton.a.taylor@intel.com> |
drm/i915/dg2: Add additional HDMI pixel clock frequencies
Using the BSPEC algorithm add addition HDMI pixel clocks to the existing
table.
v2: remove 297000 unused entry
Cc: Matt Roper <matthew.d.r
drm/i915/dg2: Add additional HDMI pixel clock frequencies
Using the BSPEC algorithm add addition HDMI pixel clocks to the existing
table.
v2: remove 297000 unused entry
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Taylor, Clinton A <clinton.a.taylor@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
[mattrope: Fixed minor whitepsace issue flagged by checkpatch]
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220801234856.2832317-1-clinton.a.taylor@intel.com
show more ...
|
|
Revision tags: v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48 |
|
| #
781c336a |
| 16-Jun-2022 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915/mpllb: move mpllb state check to intel_snps_phy.c
Keep the mpllb implementation details together in intel_snps_phy.c. Also
declutter intel_display.c.
v2: intel_mpllb_verify_state -> void i
drm/i915/mpllb: move mpllb state check to intel_snps_phy.c
Keep the mpllb implementation details together in intel_snps_phy.c. Also
declutter intel_display.c.
v2: intel_mpllb_verify_state -> void intel_mpllb_state_verify (Ville)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/e7340bb0e399aeb2676c4820461187eeb1d4db15.1655372759.git.jani.nikula@intel.com
show more ...
|
|
Revision tags: v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38 |
|
| #
4f543d66 |
| 03-May-2022 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Require an exact DP link freq match for the DG2 PLL
No idea why the DG2 PLL DP link frequency calculation is allowing
a non-exact match. That makes no sense so get rid of it.
Signed-off-b
drm/i915: Require an exact DP link freq match for the DG2 PLL
No idea why the DG2 PLL DP link frequency calculation is allowing
a non-exact match. That makes no sense so get rid of it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220503182242.18797-24-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Matt Roper <matthew.d.roper@intel.com>
show more ...
|
| #
edd34368 |
| 25-May-2022 |
Vandita Kulkarni <vandita.kulkarni@intel.com> |
drm/i915/dg2: Support 4k@30 on HDMI
This patch adds a fix to support 297MHz of dot clock by calculating
the pll values using synopsis algorithm.
This will help to support 4k@30 mode for HDMI monitor
drm/i915/dg2: Support 4k@30 on HDMI
This patch adds a fix to support 297MHz of dot clock by calculating
the pll values using synopsis algorithm.
This will help to support 4k@30 mode for HDMI monitors on DG2.
v2: As per the algorithm, set MPLLB VCO range control bits to 3,
in register SNPS_PHY_MPLLB_DIV for 297Mhz. (Matt)
v3: Fix typo. (Ankit)
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220525080401.1253511-1-ankit.k.nautiyal@intel.com
show more ...
|
|
Revision tags: v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26 |
|
| #
b4eb76d8 |
| 23-Feb-2022 |
Matt Roper <matthew.d.roper@intel.com> |
drm/i915/dg2: Skip output init on PHY calibration failure
If one of our PHYs fails to complete calibration, we should skip the
general initialization of the corresponding output. Most likely this i
drm/i915/dg2: Skip output init on PHY calibration failure
If one of our PHYs fails to complete calibration, we should skip the
general initialization of the corresponding output. Most likely this is
going to happen on outputs that don't actually exist on the board; in
theory we should have already decided to skip this output based on the
VBT, but we can't always rely on the VBT being accurate.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220223165421.3949883-1-matthew.d.roper@intel.com
show more ...
|
|
Revision tags: v5.15.25, v5.15.24 |
|
| #
28adef86 |
| 15-Feb-2022 |
Matt Roper <matthew.d.roper@intel.com> |
drm/i915/dg2: Print PHY name properly on calibration error
We need to use phy_name() to convert the PHY value into a human-readable
character in the error message.
Fixes: a6a128116e55 ("drm/i915/dg
drm/i915/dg2: Print PHY name properly on calibration error
We need to use phy_name() to convert the PHY value into a human-readable
character in the error message.
Fixes: a6a128116e55 ("drm/i915/dg2: Wait for SNPS PHY calibration during display init")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220215163545.2175730-1-matthew.d.roper@intel.com
(cherry picked from commit 84073e568eec7b586b2f6fd5fb2fb08f59edec54)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
show more ...
|
| #
9b693453 |
| 17-Feb-2022 |
Matt Roper <matthew.d.roper@intel.com> |
drm/i915/dg2: Drop 38.4 MHz MPLLB tables
Our early understanding of DG2 was incorrect; since the 5th display
isn't actually a Type-C output, 38.4 MHz input clocks are never used on
this platform and
drm/i915/dg2: Drop 38.4 MHz MPLLB tables
Our early understanding of DG2 was incorrect; since the 5th display
isn't actually a Type-C output, 38.4 MHz input clocks are never used on
this platform and we can drop the corresponding MPLLB tables.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220218010328.183423-2-lucas.demarchi@intel.com
show more ...
|
| #
d1af7b6f |
| 17-Feb-2022 |
Jouni Högander <jouni.hogander@intel.com> |
drm/i915: Fix for PHY_MISC_TC1 offset
Currently ICL_PHY_MISC macro is returning offset 0x64C10 for PHY_E.
The PORT_TC1 port is not yet enabled properly in the driver, but
intel_phy_snps.c is relying
drm/i915: Fix for PHY_MISC_TC1 offset
Currently ICL_PHY_MISC macro is returning offset 0x64C10 for PHY_E.
The PORT_TC1 port is not yet enabled properly in the driver, but
intel_phy_snps.c is relying on intel_phy_is_snps() to filter out
unavailable phys. That function was already considering the last phy as
available. Just correct the offset of the last phy to 0x64C14 as the
rest of the support for it is coming on next commits.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220218010328.183423-1-lucas.demarchi@intel.com
show more ...
|
| #
84073e56 |
| 15-Feb-2022 |
Matt Roper <matthew.d.roper@intel.com> |
drm/i915/dg2: Print PHY name properly on calibration error
We need to use phy_name() to convert the PHY value into a human-readable
character in the error message.
Fixes: a6a128116e55 ("drm/i915/dg
drm/i915/dg2: Print PHY name properly on calibration error
We need to use phy_name() to convert the PHY value into a human-readable
character in the error message.
Fixes: a6a128116e55 ("drm/i915/dg2: Wait for SNPS PHY calibration during display init")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220215163545.2175730-1-matthew.d.roper@intel.com
show more ...
|
|
Revision tags: v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17 |
|
| #
c5274e86 |
| 21-Jan-2022 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915/snps: convert to drm device based logging
Prefer drm device based logging. Do some dev_priv->i915 conversions
while at it.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by:
drm/i915/snps: convert to drm device based logging
Prefer drm device based logging. Do some dev_priv->i915 conversions
while at it.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ca6908452a63bd74a9c9d75ecd295182c80c7205.1642769982.git.jani.nikula@intel.com
show more ...
|
|
Revision tags: v5.4.173, v5.15.16, v5.15.15 |
|
| #
aa1d6068 |
| 10-Jan-2022 |
Matt Roper <matthew.d.roper@intel.com> |
drm/i915: Move SNPS PHY registers to their own header
These registers are only needed in a couple files and on specific
platforms; let's keep them separate from the general register pool.
v2:
- Do
drm/i915: Move SNPS PHY registers to their own header
These registers are only needed in a couple files and on specific
platforms; let's keep them separate from the general register pool.
v2:
- Don't forget to include i915_reg_defs.h (Jani)
- Ensure include guard matches header name (Jani)
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-9-matthew.d.roper@intel.com
show more ...
|
|
Revision tags: v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7 |
|
| #
61b98486 |
| 02-Dec-2021 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915/snps: use div32 version of MPLLB word clock for UHBR
The mode set sequence for 128b/132b requires setting the div32 version
of MPLLB clock.
Bspec: 53880, 54128
Signed-off-by: Jani Nikula <
drm/i915/snps: use div32 version of MPLLB word clock for UHBR
The mode set sequence for 128b/132b requires setting the div32 version
of MPLLB clock.
Bspec: 53880, 54128
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211202144456.2541305-1-jani.nikula@intel.com
show more ...
|
|
Revision tags: v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10 |
|
| #
3e9cf8f0 |
| 06-Oct-2021 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Query the vswing levels per-lane for snps phy
Prepare for per-lane drive settings by querying the desired vswing
level per-lane.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.co
drm/i915: Query the vswing levels per-lane for snps phy
Prepare for per-lane drive settings by querying the desired vswing
level per-lane.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211006204937.30774-12-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
show more ...
|
| #
247c8a73 |
| 06-Oct-2021 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Remove pointless extra namespace from dkl/snps buf trans structs
The struct itself already has sufficient namespace. No need to
duplicate it in the members.
Signed-off-by: Ville Syrjälä <
drm/i915: Remove pointless extra namespace from dkl/snps buf trans structs
The struct itself already has sufficient namespace. No need to
duplicate it in the members.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211006204937.30774-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
show more ...
|
| #
d0920a45 |
| 01-Oct-2021 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Pass the lane to intel_ddi_level()
In order to have per-lane drive settings we need intel_ddi_level()
to accept the lane as a parameter. That is, the eventual goal is to
call intel_ddi_lev
drm/i915: Pass the lane to intel_ddi_level()
In order to have per-lane drive settings we need intel_ddi_level()
to accept the lane as a parameter. That is, the eventual goal is to
call intel_ddi_level() once for each lane. For now we just pass in
a hardcoded 0 and use the same settings for every lane. Ie. no
change in behaviour yet.
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211001130107.1746-9-ville.syrjala@linux.intel.com
show more ...
|
| #
2c63e0f9 |
| 01-Oct-2021 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level()
All callers of intel_ddi_level() duplicate the check+WARN
to make sure the returned level is actually present in the
appropriate buf
drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level()
All callers of intel_ddi_level() duplicate the check+WARN
to make sure the returned level is actually present in the
appropriate buf_trans table. Let's push that stuff into
intel_ddi_level() so the callers don't have to worry about it.
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211001130107.1746-7-ville.syrjala@linux.intel.com
show more ...
|
| #
193299ad |
| 01-Oct-2021 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Nuke useless .set_signal_levels() wrappers
Now that .set_signal_levels() is used for HDMI as well, we can
remove the extra level of indirection and just plug the correct
stuff straight int
drm/i915: Nuke useless .set_signal_levels() wrappers
Now that .set_signal_levels() is used for HDMI as well, we can
remove the extra level of indirection and just plug the correct
stuff straight into .set_signal_levels().
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211001130107.1746-5-ville.syrjala@linux.intel.com
show more ...
|
|
Revision tags: v5.14.9 |
|
| #
e505d764 |
| 27-Sep-2021 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: s/ddi_translations/trans/
"ddi_translations" is a bit too long, let's shorten it to just "trans".
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.free
drm/i915: s/ddi_translations/trans/
"ddi_translations" is a bit too long, let's shorten it to just "trans".
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210927182455.27119-2-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
show more ...
|