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Searched refs:hflags (Results 1 – 25 of 66) sorted by relevance

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/openbmc/qemu/target/mips/
H A Dinternal.h170 !(env->hflags & MIPS_HFLAG_DM) && in cpu_mips_hw_interrupts_enabled()
222 env->hflags |= MIPS_HFLAG_M16; in mips_env_set_pc()
224 env->hflags &= ~(MIPS_HFLAG_M16); in mips_env_set_pc()
240 if (env->hflags & MIPS_HFLAG_ELPA) { in restore_pamask()
302 env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 | in compute_hflags()
308 env->hflags |= MIPS_HFLAG_ERL; in compute_hflags()
312 !(env->hflags & MIPS_HFLAG_DM)) { in compute_hflags()
313 env->hflags |= (env->CP0_Status >> CP0St_KSU) & in compute_hflags()
318 (((env->hflags & MIPS_HFLAG_KSU) != MIPS_HFLAG_UM) || in compute_hflags()
321 env->hflags |= MIPS_HFLAG_64; in compute_hflags()
[all …]
H A Dgdbstub.c62 !!(env->hflags & MIPS_HFLAG_M16)); in mips_cpu_gdb_read_register()
132 env->hflags |= MIPS_HFLAG_M16; in mips_cpu_gdb_write_register()
134 env->hflags &= ~(MIPS_HFLAG_M16); in mips_cpu_gdb_write_register()
H A Dcpu.c70 bool is_fpu64 = !!(env->hflags & MIPS_HFLAG_F64); in fpu_dump_state()
91 env->hflags, env->btarget, env->bcond); in mips_cpu_dump_state()
113 if ((flags & CPU_DUMP_FPU) && (env->hflags & MIPS_HFLAG_FPU)) { in mips_cpu_dump_state()
281 if (env->hflags & MIPS_HFLAG_BMASK) { in mips_cpu_reset_hold()
287 - (env->hflags & MIPS_HFLAG_B16 ? 2 : 4)); in mips_cpu_reset_hold()
404 env->hflags |= MIPS_HFLAG_M16; in mips_cpu_reset_hold()
558 .flags = env->hflags & (MIPS_HFLAG_TMASK | MIPS_HFLAG_BMASK | in mips_get_tb_cpu_state()
567 return cpu_env(cs)->hflags & MIPS_HFLAG_AWRAP ? (int32_t)result : result; in mips_pointer_wrap()
/openbmc/qemu/target/i386/
H A Dgdbstub.c86 static int gdb_read_reg_cs64(uint32_t hflags, GByteArray *buf, target_ulong val) in gdb_read_reg_cs64() argument
88 if ((hflags & HF_CS64_MASK) || GDB_FORCE_64) { in gdb_read_reg_cs64()
94 static int gdb_write_reg_cs64(uint32_t hflags, uint8_t *buf, target_ulong *val) in gdb_write_reg_cs64() argument
96 if (hflags & HF_CS64_MASK) { in gdb_write_reg_cs64()
107 if (env->hflags & HF_CS64_MASK) { in gdb_get_reg()
130 if (env->hflags & HF_CS64_MASK) { in x86_cpu_gdb_read_register()
175 return gdb_read_reg_cs64(env->hflags, mem_buf, env->segs[R_FS].base); in x86_cpu_gdb_read_register()
177 return gdb_read_reg_cs64(env->hflags, mem_buf, env->segs[R_GS].base); in x86_cpu_gdb_read_register()
181 return gdb_read_reg_cs64(env->hflags, mem_buf, env->kernelgsbase); in x86_cpu_gdb_read_register()
209 return gdb_read_reg_cs64(env->hflags, mem_buf, env->cr[0]); in x86_cpu_gdb_read_register()
[all …]
H A Dhelper.c43 env->hflags |= HF_AVX_EN_MASK; in cpu_sync_avx_hflag()
45 env->hflags &= ~HF_AVX_EN_MASK; in cpu_sync_avx_hflag()
51 uint32_t hflags = env->hflags; in cpu_sync_bndcs_hflags() local
55 if ((hflags & HF_CPL_MASK) == 3) { in cpu_sync_bndcs_hflags()
64 hflags |= HF_MPX_EN_MASK; in cpu_sync_bndcs_hflags()
66 hflags &= ~HF_MPX_EN_MASK; in cpu_sync_bndcs_hflags()
75 env->hflags = hflags; in cpu_sync_bndcs_hflags()
152 env->hflags |= HF_LMA_MASK; in cpu_x86_update_cr0()
157 env->hflags &= ~(HF_LMA_MASK | HF_CS64_MASK); in cpu_x86_update_cr0()
165 env->hflags = (env->hflags & ~HF_PE_MASK) | (pe_state << HF_PE_SHIFT); in cpu_x86_update_cr0()
[all …]
H A Dcpu-dump.c101 if (env->hflags & HF_CS64_MASK) { in cpu_x86_dump_seg_cache()
113 if (!(env->hflags & HF_PE_MASK) || !(sc->flags & DESC_P_MASK)) in cpu_x86_dump_seg_cache()
126 || env->hflags & HF_LMA_MASK) in cpu_x86_dump_seg_cache()
148 sys_type_name[(env->hflags & HF_LMA_MASK) ? 1 : 0] in cpu_x86_dump_seg_cache()
353 if (env->hflags & HF_CS64_MASK) { in x86_cpu_dump_state()
383 env->hflags & HF_CPL_MASK, in x86_cpu_dump_state()
384 (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, in x86_cpu_dump_state()
386 (env->hflags >> HF_SMM_SHIFT) & 1, in x86_cpu_dump_state()
410 env->hflags & HF_CPL_MASK, in x86_cpu_dump_state()
411 (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, in x86_cpu_dump_state()
[all …]
H A Dcpu.h1849 uint32_t hflags; /* TB flags, see HF_xxx constants. These flags member
2469 if ((env->hflags & HF_LMA_MASK) && (flags & DESC_L_MASK)) { in cpu_x86_load_seg_cache()
2471 env->hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK; in cpu_x86_load_seg_cache()
2472 env->hflags &= ~(HF_ADDSEG_MASK); in cpu_x86_load_seg_cache()
2479 env->hflags = (env->hflags & ~(HF_CS32_MASK | HF_CS64_MASK)) | in cpu_x86_load_seg_cache()
2488 env->hflags = (env->hflags & ~HF_CPL_MASK) | cpl; in cpu_x86_load_seg_cache()
2494 if (env->hflags & HF_CS64_MASK) { in cpu_x86_load_seg_cache()
2498 !(env->hflags & HF_CS32_MASK)) { in cpu_x86_load_seg_cache()
2511 env->hflags = (env->hflags & in cpu_x86_load_seg_cache()
2705 return ((MemTxAttrs) { .secure = (env->hflags & HF_SMM_MASK) != 0 }); in cpu_get_mem_attrs()
[all …]
/openbmc/qemu/target/ppc/
H A Dhelper_regs.c87 uint32_t hflags = 0; in hreg_compute_pmu_hflags_value() local
92 hflags |= 1 << HFLAGS_PMCC0; in hreg_compute_pmu_hflags_value()
95 hflags |= 1 << HFLAGS_PMCC1; in hreg_compute_pmu_hflags_value()
98 hflags |= 1 << HFLAGS_PMCJCE; in hreg_compute_pmu_hflags_value()
101 hflags |= 1 << HFLAGS_BHRB_ENABLE; in hreg_compute_pmu_hflags_value()
106 hflags |= 1 << HFLAGS_INSN_CNT; in hreg_compute_pmu_hflags_value()
108 hflags |= 1 << HFLAGS_PMC_OTHER; in hreg_compute_pmu_hflags_value()
114 return hflags; in hreg_compute_pmu_hflags_value()
136 uint32_t hflags = 0; in hreg_compute_hflags_value() local
150 hflags |= 1 << HFLAGS_SE; in hreg_compute_hflags_value()
[all …]
/openbmc/qemu/target/mips/tcg/system/
H A Dspecial_helper.c53 if (env->hflags & MIPS_HFLAG_DM) { in debug_pre_eret()
68 if (env->hflags & MIPS_HFLAG_DM) { in debug_post_eret()
95 if ((env->hflags & MIPS_HFLAG_BMASK) != 0 in mips_io_recompile_replay_branch()
97 env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); in mips_io_recompile_replay_branch()
98 env->hflags &= ~MIPS_HFLAG_BMASK; in mips_io_recompile_replay_branch()
134 env->hflags &= ~MIPS_HFLAG_DM; in helper_deret()
H A Dtlb_helper.c558 if (!(env->hflags & MIPS_HFLAG_DM)) { in raise_mmu_exception()
945 int ptw_mmu_idx = (env->hflags & MIPS_HFLAG_ERL ? in mips_cpu_tlb_fill()
990 env->hflags &= ~(MIPS_HFLAG_M16); in set_hflags_for_handler()
993 env->hflags |= (!!(env->CP0_Config3 & in set_hflags_for_handler()
1017 if (env->hflags & MIPS_HFLAG_M16) { in set_badinstr_registers()
1025 (env->hflags & MIPS_HFLAG_BMASK)) { in set_badinstr_registers()
1046 (env->hflags & MIPS_HFLAG_DM)) { in mips_cpu_do_interrupt()
1064 env->CP0_DEPC = env->active_tc.PC | !!(env->hflags & MIPS_HFLAG_M16); in mips_cpu_do_interrupt()
1085 env->hflags &= ~MIPS_HFLAG_BMASK; in mips_cpu_do_interrupt()
1088 env->hflags |= MIPS_HFLAG_64; in mips_cpu_do_interrupt()
[all …]
/openbmc/qemu/target/mips/tcg/
H A Dexception.c33 isa_mode = !!(env->hflags & MIPS_HFLAG_M16); in exception_resume_pc()
35 if (env->hflags & MIPS_HFLAG_BMASK) { in exception_resume_pc()
40 bad_pc -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); in exception_resume_pc()
86 env->hflags &= ~MIPS_HFLAG_BMASK; in mips_cpu_synchronize_from_tb()
87 env->hflags |= tb->flags & MIPS_HFLAG_BMASK; in mips_cpu_synchronize_from_tb()
H A Docteon_translate.c20 if (ctx->hflags & MIPS_HFLAG_BMASK) { in trans_BBIT()
38 ctx->hflags |= MIPS_HFLAG_BC; in trans_BBIT()
40 ctx->hflags |= MIPS_HFLAG_BDS32; in trans_BBIT()
H A Dmsa_translate.c154 if (unlikely((ctx->hflags & MIPS_HFLAG_FPU) && in check_msa_enabled()
155 !(ctx->hflags & MIPS_HFLAG_F64))) { in check_msa_enabled()
160 if (unlikely(!(ctx->hflags & MIPS_HFLAG_MSA))) { in check_msa_enabled()
227 if (ctx->hflags & MIPS_HFLAG_BMASK) { in gen_msa_BxZ_V()
238 ctx->hflags |= MIPS_HFLAG_BC; in gen_msa_BxZ_V()
239 ctx->hflags |= MIPS_HFLAG_BDS32; in gen_msa_BxZ_V()
260 if (ctx->hflags & MIPS_HFLAG_BMASK) { in gen_msa_BxZ()
268 ctx->hflags |= MIPS_HFLAG_BC; in gen_msa_BxZ()
269 ctx->hflags |= MIPS_HFLAG_BDS32; in gen_msa_BxZ()
H A Drel6_translate.c40 || unlikely((a->sz == 3) && (!(ctx->hflags & MIPS_HFLAG_64))) in trans_CRC32()
/openbmc/qemu/linux-user/mips/
H A Dtarget_prctl.h69 env->hflags |= MIPS_HFLAG_F64; in do_prctl_set_fp_mode()
72 env->hflags &= ~MIPS_HFLAG_F64; in do_prctl_set_fp_mode()
77 env->hflags |= MIPS_HFLAG_FRE; in do_prctl_set_fp_mode()
81 env->hflags &= ~MIPS_HFLAG_FRE; in do_prctl_set_fp_mode()
H A Dcpu_loop.c254 env->hflags |= MIPS_HFLAG_M16; in target_cpu_copy_regs()
286 env->hflags |= MIPS_HFLAG_FRE; in target_cpu_copy_regs()
293 env->hflags |= MIPS_HFLAG_F64; in target_cpu_copy_regs()
297 env->hflags |= MIPS_HFLAG_F64; in target_cpu_copy_regs()
/openbmc/qemu/target/i386/tcg/
H A Dtcg-cpu.c57 flags = env->hflags | in x86_get_tb_cpu_state()
59 if (env->hflags & HF_CS64_MASK) { in x86_get_tb_cpu_state()
119 int mmu_index_32 = (env->hflags & HF_CS64_MASK) ? 0 : 1; in x86_mmu_index_pl()
122 !(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP64_IDX : in x86_mmu_index_pl()
131 return x86_mmu_index_pl(env, env->hflags & HF_CPL_MASK); in x86_cpu_mmu_index()
156 return cpu_env(cs)->hflags & HF_CS64_MASK ? result : (uint32_t)result; in x86_pointer_wrap()
H A Dmem_helper.c37 if (env->hflags & HF_MPX_EN_MASK) { in helper_boundw()
51 if (env->hflags & HF_MPX_EN_MASK) { in helper_boundl()
H A Dseg_helper.c117 if (env->hflags & HF_LMA_MASK) { in get_pg_mode()
134 int mmu_index_32 = (env->hflags & HF_LMA_MASK) ? 0 : 1; in x86_mmu_index_kernel_pl()
136 !(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP64_IDX : in x86_mmu_index_kernel_pl()
145 return x86_mmu_index_kernel_pl(env, env->hflags & HF_CPL_MASK); in cpu_mmu_index_kernel()
510 env->hflags |= HF_TS_MASK; in switch_tss_ra()
600 int cpl = env->hflags & HF_CPL_MASK; in switch_tss_ra()
732 cpl = env->hflags & HF_CPL_MASK; in do_interrupt_protected()
993 cpl = env->hflags & HF_CPL_MASK; in do_interrupt64()
1091 cpl = env->hflags & HF_CPL_MASK; in helper_sysret()
1097 if (env->hflags & HF_LMA_MASK) { in helper_sysret()
[all …]
H A Dmpx_helper.c40 if ((env->hflags & HF_CPL_MASK) == 3) { in lookup_bte64()
60 if ((env->hflags & HF_CPL_MASK) == 3) { in lookup_bte32()
137 env->hflags &= ~HF_MPX_IU_MASK; in helper_bnd_jmp()
H A Dmisc_helper.c68 if ((env->cr[4] & CR4_TSD_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) { in helper_rdtsc()
81 ((env->hflags & HF_CPL_MASK) != 0)) { in helper_rdpmc()
/openbmc/qemu/target/i386/tcg/user/
H A Dseg_helper.c54 if (env->hflags & HF_LMA_MASK) { in do_interrupt_user()
63 cpl = env->hflags & HF_CPL_MASK; in do_interrupt_user()
/openbmc/qemu/target/arm/tcg/
H A Dhflags.c485 env->hflags = rebuild_hflags_internal(env); in arm_rebuild_hflags()
498 env->hflags = rebuild_hflags_m32(env, fp_el, mmu_idx); in HELPER()
506 env->hflags = rebuild_hflags_m32(env, fp_el, mmu_idx); in HELPER()
518 env->hflags = rebuild_hflags_a32(env, fp_el, mmu_idx); in HELPER()
526 env->hflags = rebuild_hflags_a32(env, fp_el, mmu_idx); in HELPER()
534 env->hflags = rebuild_hflags_a64(env, el, fp_el, mmu_idx); in HELPER()
540 CPUARMTBFlags c = env->hflags; in assert_hflags_rebuild_correctly()
589 flags = env->hflags; in arm_get_tb_cpu_state()
H A Dmeson.build68 'hflags.c',
76 'hflags.c',
/openbmc/qemu/bsd-user/x86_64/
H A Dtarget_arch_cpu.h33 env->hflags |= HF_PE_MASK | HF_CPL_MASK; in target_cpu_init()
36 env->hflags |= HF_OSFXSR_MASK; in target_cpu_init()
46 env->hflags |= HF_LMA_MASK; in target_cpu_init()

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