Revision tags: v9.1.0 |
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addd0c28 |
| 15-Feb-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/mips: Remove unused mips_def_t::SAARP field
The SAARP field added in commit 5fb2dcd179 ("target/mips: Provide R/W access to SAARI and SAAR CP0 registers") has never been used, remove it.
Sig
target/mips: Remove unused mips_def_t::SAARP field
The SAARP field added in commit 5fb2dcd179 ("target/mips: Provide R/W access to SAARI and SAAR CP0 registers") has never been used, remove it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240215080629.51190-1-philmd@linaro.org>
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03afdc28 |
| 21-May-2023 |
Jiaxun Yang <jiaxun.yang@flygoat.com> |
target/mips: Implement Loongson CSR instructions
Loongson introduced CSR instructions since 3A4000, which looks similar to IOCSR and CPUCFG instructions we seen in LoongArch.
Unfortunately we don't
target/mips: Implement Loongson CSR instructions
Loongson introduced CSR instructions since 3A4000, which looks similar to IOCSR and CPUCFG instructions we seen in LoongArch.
Unfortunately we don't have much document about those instructions, bit fields of CPUCFG instructions and IOCSR registers can be found at 3A4000's user manual, while instruction encodings can be found at arch/mips/include/asm/mach-loongson64/loongson_regs.h from Linux Kernel.
Our predefined CPUCFG bits are differ from actual 3A4000, since we can't emulate all CPUCFG features present in 3A4000 for now, we just enable bits for what we have in TCG.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20230521214832.20145-2-jiaxun.yang@flygoat.com> [JY: Fixed typo in ase_lcsr_available(), retrict GEN_FALSE_TRANS] [PMD: Fix meson's mips_softmmu_ss -> mips_system_ss, restrict AddressSpace/MemoryRegion to SysEmu] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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Revision tags: v8.0.0 |
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a8448735 |
| 17-Dec-2022 |
Paolo Bonzini <pbonzini@redhat.com> |
mips: Remove support for trap and emulate KVM
This support was limited to the Malta board, drop it. I do not have a machine that can run VZ KVM, so I am assuming that it works for -M malta as well.
mips: Remove support for trap and emulate KVM
This support was limited to the Malta board, drop it. I do not have a machine that can run VZ KVM, so I am assuming that it works for -M malta as well.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221221091718.71844-1-philmd@linaro.org>
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Revision tags: v7.2.0, v7.0.0, v6.2.0 |
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5e0c126a |
| 13-Dec-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips: Remove duplicated MIPSCPU::cp0_count_rate
Since the previous commit 9ea89876f9d ("target/mips: Fix cycle counter timing calculations"), MIPSCPU::cp0_count_rate is not used anymore. We d
target/mips: Remove duplicated MIPSCPU::cp0_count_rate
Since the previous commit 9ea89876f9d ("target/mips: Fix cycle counter timing calculations"), MIPSCPU::cp0_count_rate is not used anymore. We don't need it since it is already expressed as mips_def_t::CCRes. Remove the duplicate and clean.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <>20211213102340.1847248-1-f4bug@amsat.org>
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36861198 |
| 07-Feb-2022 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target: Use forward declared type instead of structure type
The CPU / CPU state are forward declared.
$ git grep -E 'struct [A-Za-z]+CPU\ \*' target/arm/hvf_arm.h:16:void hvf_arm_set_cpu_featur
target: Use forward declared type instead of structure type
The CPU / CPU state are forward declared.
$ git grep -E 'struct [A-Za-z]+CPU\ \*' target/arm/hvf_arm.h:16:void hvf_arm_set_cpu_features_from_host(struct ARMCPU *cpu); target/openrisc/cpu.h:234: int (*cpu_openrisc_map_address_code)(struct OpenRISCCPU *cpu, target/openrisc/cpu.h:238: int (*cpu_openrisc_map_address_data)(struct OpenRISCCPU *cpu,
$ git grep -E 'struct CPU[A-Za-z0-9]+State\ \*' target/mips/internal.h:137: int (*map_address)(struct CPUMIPSState *env, hwaddr *physical, int *prot, target/mips/internal.h:139: void (*helper_tlbwi)(struct CPUMIPSState *env); target/mips/internal.h:140: void (*helper_tlbwr)(struct CPUMIPSState *env); target/mips/internal.h:141: void (*helper_tlbp)(struct CPUMIPSState *env); target/mips/internal.h:142: void (*helper_tlbr)(struct CPUMIPSState *env); target/mips/internal.h:143: void (*helper_tlbinv)(struct CPUMIPSState *env); target/mips/internal.h:144: void (*helper_tlbinvf)(struct CPUMIPSState *env); target/xtensa/cpu.h:347: struct CPUXtensaState *env; ...
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220214183144.27402-12-f4bug@amsat.org>
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3cb1a410 |
| 07-Feb-2022 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target: Include missing 'cpu.h'
These target-specific files use the target-specific CPU state but lack to include "cpu.h"; i.e.:
../target/riscv/pmp.h:61:23: error: unknown type name 'CPURISCVS
target: Include missing 'cpu.h'
These target-specific files use the target-specific CPU state but lack to include "cpu.h"; i.e.:
../target/riscv/pmp.h:61:23: error: unknown type name 'CPURISCVState' void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index, ^ ../target/nios2/mmu.h:43:18: error: unknown type name 'CPUNios2State' void mmu_flip_um(CPUNios2State *env, unsigned int um); ^ ../target/microblaze/mmu.h:88:19: error: unknown type name 'CPUMBState'; did you mean 'CPUState'? uint32_t mmu_read(CPUMBState *env, bool ea, uint32_t rn); ^~~~~~~~~~ CPUState
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220214183144.27402-10-f4bug@amsat.org>
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Revision tags: v6.1.0 |
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8b1d5b3c |
| 03-Aug-2021 |
Richard Henderson <richard.henderson@linaro.org> |
include/exec: Move cpu_signal_handler declaration
There is nothing target specific about this. The implementation is host specific, but the declaration is 100% common.
Reviewed-By: Warner Losh <im
include/exec: Move cpu_signal_handler declaration
There is nothing target specific about this. The implementation is host specific, but the declaration is 100% common.
Reviewed-By: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
9516034d |
| 11-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-2' into staging Some qemu updates for IPMI and I2C Move some ADC file to where they belong and move some sensors to
Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-2' into staging Some qemu updates for IPMI and I2C Move some ADC file to where they belong and move some sensors to a sensor directory, since with new BMCs coming in lots of different sensors should be coming in. Keep from cluttering things up. Add support for I2C PMBus devices. Replace the confusing and error-prone i2c_send_recv and i2c_transfer with specific send and receive functions. Several errors have already been made with these, avoid any new errors. Fix the watchdog_expired field in the IPMI watchdog, it's not a bool, it's a u8. After a vmstate transfer, the new value could be wrong. # gpg: Signature made Fri 09 Jul 2021 17:25:04 BST # gpg: using RSA key FD0D5CE67CE0F59A6688268661F38C90919BFF81 # gpg: Good signature from "Corey Minyard <cminyard@mvista.com>" [unknown] # gpg: aka "Corey Minyard <minyard@acm.org>" [unknown] # gpg: aka "Corey Minyard <corey@minyard.net>" [unknown] # gpg: aka "Corey Minyard <minyard@mvista.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81 * remotes/cminyard/tags/for-qemu-6.1-2: (24 commits) tests/qtest: add tests for MAX34451 device model hw/misc: add MAX34451 device tests/qtest: add tests for ADM1272 device model hw/misc: add ADM1272 device hw/i2c: add support for PMBus ipmi/sim: fix watchdog_expired data type error in IPMIBmcSim struct hw/i2c: Introduce i2c_start_recv() and i2c_start_send() hw/i2c: Extract i2c_do_start_transfer() from i2c_start_transfer() hw/i2c: Make i2c_start_transfer() direction argument a boolean hw/i2c: Rename i2c_set_slave_address() -> i2c_slave_set_address() hw/i2c: Remove confusing i2c_send_recv() hw/misc/auxbus: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/misc/auxbus: Replace 'is_write' boolean by its value hw/misc/auxbus: Explode READ_I2C / WRITE_I2C_MOT cases hw/misc/auxbus: Fix MOT/classic I2C mode hw/i2c/ppc4xx_i2c: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/i2c/ppc4xx_i2c: Add reference to datasheet hw/display/sm501: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/display/sm501: Simplify sm501_i2c_write() logic hw/input/lm832x: Define TYPE_LM8323 in public header ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
6512fa49 |
| 28-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * Some Meson test conversions * KVM dirty page ring buffer fix * KVM TSC scaling support * Fi
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * Some Meson test conversions * KVM dirty page ring buffer fix * KVM TSC scaling support * Fixes for SG_IO with /dev/sdX devices * (Non)support for host devices on iOS * -smp cleanups # gpg: Signature made Fri 25 Jun 2021 15:16:18 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (28 commits) machine: reject -smp dies!=1 for non-PC machines machine: pass QAPI struct to mc->smp_parse machine: add error propagation to mc->smp_parse machine: move common smp_parse code to caller machine: move dies from X86MachineState to CpuTopology file-posix: handle EINTR during ioctl block: detect DKIOCGETBLOCKCOUNT/SIZE before use block: try BSD disk size ioctls one after another block: check for sys/disk.h block: feature detection for host block support file-posix: try BLKSECTGET on block devices too, do not round to power of 2 block: add max_hw_transfer to BlockLimits block-backend: align max_transfer to request alignment osdep: provide ROUND_DOWN macro scsi-generic: pass max_segments via max_iov field in BlockLimits file-posix: fix max_iov for /dev/sg devices KVM: Fix dirty ring mmap incorrect size due to renaming accident configure, meson: convert libusbredir detection to meson configure, meson: convert libcacard detection to meson configure, meson: convert libusb detection to meson ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
9e654e10 |
| 28-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vsementsov/tags/pull-jobs-2021-06-25' into staging block: Make block-copy API thread-safe # gpg: Signature made Fri 25 Jun 2021 13:40:24 BST
Merge remote-tracking branch 'remotes/vsementsov/tags/pull-jobs-2021-06-25' into staging block: Make block-copy API thread-safe # gpg: Signature made Fri 25 Jun 2021 13:40:24 BST # gpg: using RSA key 8B9C26CDB2FD147C880E86A1561F24C1F19F79FB # gpg: Good signature from "Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8B9C 26CD B2FD 147C 880E 86A1 561F 24C1 F19F 79FB * remotes/vsementsov/tags/pull-jobs-2021-06-25: block-copy: atomic .cancelled and .finished fields in BlockCopyCallState block-copy: add CoMutex lock block-copy: move progress_set_remaining in block_copy_task_end block-copy: streamline choice of copy_range vs. read/write block-copy: small refactor in block_copy_task_entry and block_copy_common co-shared-resource: protect with a mutex progressmeter: protect with a mutex blockjob: let ratelimit handle a speed of 0 block-copy: let ratelimit handle a speed of 0 ratelimit: treat zero speed as unlimited Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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271fc190 |
| 28-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/floppy-pull-request' into staging FDC Pull request # gpg: Signature made Fri 25 Jun 2021 13:54:17 BST # gpg:
Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/floppy-pull-request' into staging FDC Pull request # gpg: Signature made Fri 25 Jun 2021 13:54:17 BST # gpg: using RSA key F9B7ABDBBCACDF95BE76CBD07DEF8106AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" [full] # Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB # Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E * remotes/jsnow-gitlab/tags/floppy-pull-request: hw/block/fdc: Add description to floppy controllers hw/block/fdc: Extract SysBus floppy controllers to fdc-sysbus.c hw/block/fdc: Extract ISA floppy controllers to fdc-isa.c hw/block/fdc: Declare shared prototypes in fdc-internal.h hw/block/fdc: Replace disabled fprintf() by trace event hw/isa/Kconfig: Fix missing dependency ISA_SUPERIO -> FDC Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
687f9f78 |
| 28-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210625' into staging MIPS patches queue Various fixes: - Potential integer overflow (CID 1452921) - Invalid emulatio
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210625' into staging MIPS patches queue Various fixes: - Potential integer overflow (CID 1452921) - Invalid emulation of nanoMIPS BPOSGE32 opcode - Missing exception when DINSV opcode used with DSP disabled - Do not abort but emit exception for invalid BRANCH opcodes - TCG temporary leaks Housekeeping: - Remove dead code / comments - Restrict few files to TCG, declarations to sysemu - Merge MSA32 and MSA64 decodetree definitions # gpg: Signature made Fri 25 Jun 2021 10:22:20 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/mips-20210625: target/mips: Merge msa32/msa64 decodetree definitions target/mips: Remove pointless gen_msa() target/mips: Optimize regnames[] arrays target/mips: Constify host_to_mips_errno[] target/mips: fix emulation of nanoMIPS BPOSGE32 instruction target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful cases target/mips: Remove SmartMIPS / MDMX unuseful comments target/mips: Restrict some system specific declarations to sysemu target/mips: Move translate.h to tcg/ sub directory target/mips: Move TCG trace events to tcg/ sub directory target/mips: Do not abort on invalid instruction target/mips: Raise exception when DINSV opcode used with DSP disabled target/mips: Fix more TCG temporary leaks in gen_pool32a5_nanomips_insn target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn() target/mips: Fix potential integer overflow (CID 1452921) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
06106772 |
| 29-May-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips: Optimize regnames[] arrays Since all entries are no more than 3/4/6 bytes (including nul terminator), can save space and pie runtime relocations by declaring regnames[]
target/mips: Optimize regnames[] arrays Since all entries are no more than 3/4/6 bytes (including nul terminator), can save space and pie runtime relocations by declaring regnames[] as array of 3/4/6 const char. Inspired-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210617174323.2900831-10-f4bug@amsat.org>
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6c769690 |
| 21-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vsementsov/tags/pull-simplebench-2021-05-04' into staging scripts/simplebench improvements for 2021-05-04 # gpg: Signature made Tue 04 May 2021
Merge remote-tracking branch 'remotes/vsementsov/tags/pull-simplebench-2021-05-04' into staging scripts/simplebench improvements for 2021-05-04 # gpg: Signature made Tue 04 May 2021 09:45:15 BST # gpg: using RSA key 8B9C26CDB2FD147C880E86A1561F24C1F19F79FB # gpg: Good signature from "Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8B9C 26CD B2FD 147C 880E 86A1 561F 24C1 F19F 79FB * remotes/vsementsov/tags/pull-simplebench-2021-05-04: MAINTAINERS: update Benchmark util: add git tree simplebench/bench-backup: add --drop-caches argument simplebench/bench-backup: add --count and --no-initial-run simplebench/bench-backup: support qcow2 source files simplebench/bench_block_job: handle error in BLOCK_JOB_COMPLETED simplebench/bench-backup: add target-cache argument simplebench/bench-backup: add --compressed option simplebench: bench_one(): support count=1 simplebench: bench_one(): add slow_limit argument Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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6005ee07 |
| 16-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,pci,virtio: bugfixes, improvements Fixes all over the place. Faster boot for virtio. ioeventfd support f
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,pci,virtio: bugfixes, improvements Fixes all over the place. Faster boot for virtio. ioeventfd support for mmio. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 14 May 2021 15:27:13 BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: Fix build with 64 bits time_t vhost-vdpa: Make vhost_vdpa_get_device_id() static hw/virtio: enable ioeventfd configuring for mmio hw/smbios: support for type 41 (onboard devices extended information) checkpatch: Fix use of uninitialized value virtio-scsi: Configure all host notifiers in a single MR transaction virtio-scsi: Set host notifiers and callbacks separately virtio-blk: Configure all host notifiers in a single MR transaction virtio-blk: Fix rollback path in virtio_blk_data_plane_start() pc-dimm: remove unnecessary get_vmstate_memory_region() method amd_iommu: fix wrong MMIO operations virtio-net: Constify VirtIOFeature feature_sizes[] virtio-blk: Constify VirtIOFeature feature_sizes[] hw/virtio: Pass virtio_feature_get_config_size() a const argument x86: acpi: use offset instead of pointer when using build_header() amd_iommu: Fix pte_override_page_mask() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/arm/virt.c
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499063d0 |
| 14-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-v1' into staging Add a bus multiplexer device This patch set adds a bus multiplexer and the necessary infrastructure
Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-v1' into staging Add a bus multiplexer device This patch set adds a bus multiplexer and the necessary infrastructure in the I2C code to allow it to work. These are common on systems with lots of I2C devices, like an IPMI BMC. # gpg: Signature made Thu 13 May 2021 22:48:07 BST # gpg: using RSA key FD0D5CE67CE0F59A6688268661F38C90919BFF81 # gpg: Good signature from "Corey Minyard <cminyard@mvista.com>" [unknown] # gpg: aka "Corey Minyard <minyard@acm.org>" [unknown] # gpg: aka "Corey Minyard <corey@minyard.net>" [unknown] # gpg: aka "Corey Minyard <minyard@mvista.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81 * remotes/cminyard/tags/for-qemu-6.1-v1: hw/i2c: add pca954x i2c-mux switch hw/i2c: move search to i2c_scan_bus method hw/i2c: add match method for device search hw/i2c: name I2CNode list in I2CBus Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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e4f3ede9 |
| 10-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20210505-pull-request' into staging usb: fix some memory allocation issues (CVE-2021-3527). usb: add stubs, allow building without u
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20210505-pull-request' into staging usb: fix some memory allocation issues (CVE-2021-3527). usb: add stubs, allow building without usb subsystem. # gpg: Signature made Wed 05 May 2021 14:07:02 BST # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20210505-pull-request: usb: limit combined packets to 1 MiB (CVE-2021-3527) usb/mtp: avoid dynamic stack allocation usb/redir: avoid dynamic stack allocation (CVE-2021-3527) usb/hid: avoid dynamic stack allocation hw/usb: Do not build USB subsystem if not required hw/usb/host-stub: Remove unused header Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d90f1548 |
| 05-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' into staging ppc patch queue 2021-05-04 Here's the first ppc pull request for qemu-6.1. It has a wide var
Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' into staging ppc patch queue 2021-05-04 Here's the first ppc pull request for qemu-6.1. It has a wide variety of stuff accumulated during the 6.0 freeze. Highlights are: * Multi-phase reset cleanups for PAPR * Preliminary cleanups towards allowing !CONFIG_TCG for the ppc target * Cleanup of AIL logic and extension to POWER10 * Further improvements to handling of hot unplug failures on PAPR * Allow much larger numbers of CPU on pseries * Support for the H_SCM_HEALTH hypercall * Add support for the Pegasos II board * Substantial cleanup to hflag handling * Assorted minor fixes and cleanups # gpg: Signature made Tue 04 May 2021 06:52:39 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.1-20210504: (46 commits) hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset() hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset() hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset() target/ppc: removed VSCR from SPR registration target/ppc: Reduce the size of ppc_spr_t target/ppc: Clean up _spr_register et al target/ppc: Add POWER10 exception model target/ppc: rework AIL logic in interrupt delivery target/ppc: move opcode table logic to translate.c target/ppc: code motion from translate_init.c.inc to gdbstub.c spapr_drc.c: handle hotunplug errors in drc_unisolate_logical() spapr.h: increase FDT_MAX_SIZE spapr.c: do not use MachineClass::max_cpus to limit CPUs ppc: Rename current DAWR macros and variables target/ppc: POWER10 supports scv target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour docs/system: ppc: Add documentation for ppce500 machine roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken pci support roms/Makefile: Update ppce500 u-boot build directory name ppc/spapr: Add support for implement support for H_SCM_HEALTH ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d45a5270 |
| 05-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging Trivial patches pull request 20210503 # gpg: Signature made Mon 03 May 2021 09:3
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging Trivial patches pull request 20210503 # gpg: Signature made Mon 03 May 2021 09:34:56 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: (23 commits) hw/rx/rx-gdbsim: Do not accept invalid memory size docs: More precisely describe memory-backend-*::id's user scripts: fix generation update-binfmts templates docs/system: Document the removal of "compat" property for POWER CPUs mc146818rtc: put it into the 'misc' category Do not include exec/address-spaces.h if it's not really necessary Do not include cpu.h if it's not really necessary Do not include hw/boards.h if it's not really necessary Do not include sysemu/sysemu.h if it's not really necessary hw: Do not include qemu/log.h if it is not necessary hw: Do not include hw/irq.h if it is not necessary hw: Do not include hw/sysbus.h if it is not necessary hw: Remove superfluous includes of hw/hw.h ui: Fix memory leak in qemu_xkeymap_mapping_table() hw/usb: Constify VMStateDescription hw/display/qxl: Constify VMStateDescription hw/arm: Constify VMStateDescription vmstate: Constify some VMStateDescriptions Fix typo in CFI build documentation hw/pcmcia: Do not register PCMCIA type if not required ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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87c6cef6 |
| 04-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210503' into staging Aspeed patches : * Fixes for the DMA space * New model for ASPEED's Hash and Crypto Engine
Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210503' into staging Aspeed patches : * Fixes for the DMA space * New model for ASPEED's Hash and Crypto Engine (Joel and Klaus) * Acceptance tests (Joel) * A fix for the XDMA model * Some extra features for the SMC controller. * Two new boards : rainier-bmc and quanta-q7l1-bmc (Patrick) # gpg: Signature made Mon 03 May 2021 06:23:36 BST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * remotes/legoater/tags/pull-aspeed-20210503: aspeed: Add support for the quanta-q7l1-bmc board hw/block: m25p80: Add support for mt25ql02g and mt25qu02g aspeed: Add support for the rainier-bmc board aspeed: Deprecate the swift-bmc machine tests/qtest: Rename m25p80 test in aspeed_smc test aspeed/smc: Add extra controls to request DMA aspeed/smc: Add a 'features' attribute to the object class hw/misc/aspeed_xdma: Add AST2600 support tests/acceptance: Test ast2600 machine tests/acceptance: Test ast2400 and ast2500 machines tests/qtest: Add test for Aspeed HACE aspeed: Integrate HACE hw: Model ASPEED's Hash and Crypto Engine hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use alias aspeed/i2c: Rename DMA address space aspeed/i2c: Fix DMA address mask aspeed/smc: Remove unused "sdram-base" property aspeed/smc: Use the RAM memory region for DMAs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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3e13d8e3 |
| 04-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/bsdimp/tags/pull-bsd-user-20210430' into staging bsd-user: start to cleanup the mess A number of small cleanups to get started. All the checkpa
Merge remote-tracking branch 'remotes/bsdimp/tags/pull-bsd-user-20210430' into staging bsd-user: start to cleanup the mess A number of small cleanups to get started. All the checkpatch.pl warnings for bsdload.c have been fixed, as well as a warning from qemu.h (though more remain and this patch series fails the format check still). I've also fixed a compile-time warning about a missing break. # gpg: Signature made Fri 30 Apr 2021 16:40:08 BST # gpg: using RSA key 2035F894B00AA3CF7CCDE1B76C1CD1287DB01100 # gpg: Good signature from "Warner Losh <wlosh@netflix.com>" [unknown] # gpg: aka "Warner Losh <imp@bsdimp.com>" [unknown] # gpg: aka "Warner Losh <imp@freebsd.org>" [unknown] # gpg: aka "Warner Losh <imp@village.org>" [unknown] # gpg: aka "Warner Losh <wlosh@bsdimp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 2035 F894 B00A A3CF 7CCD E1B7 6C1C D128 7DB0 1100 * remotes/bsdimp/tags/pull-bsd-user-20210430: bsd-user: style tweak: Put {} around all if/else/for statements bsd-user: put back a break; that had gone missing... bsd-user: style tweak: return is not a function, eliminate () bsd-user: style tweak: keyword space ( bsd-user: whitespace changes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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e93d8bcf |
| 03-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210502' into staging MIPS patches queue - Fix CACHEE opcode - Add missing CP0 checks to nanoMIPS RDPGPR / WRPGPR opcodes
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210502' into staging MIPS patches queue - Fix CACHEE opcode - Add missing CP0 checks to nanoMIPS RDPGPR / WRPGPR opcodes - Remove isa_get_irq() call in PIIX4 south bridge - Add various missing fields to the MIPS CPU migration vmstate - Lot of code moved around to allow TCG or KVM only builds - Restrict non-virtualized machines to TCG - Add KVM mips64el cross-build jobs to gitlab-ci # gpg: Signature made Sun 02 May 2021 15:56:51 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/mips-20210502: (36 commits) gitlab-ci: Add KVM mips64el cross-build jobs hw/mips: Restrict non-virtualized machines to TCG target/mips: Move TCG source files under tcg/ sub directory target/mips: Move CP0 helpers to sysemu/cp0.c target/mips: Move exception management code to exception.c target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c target/mips: Move helper_cache() to tcg/sysemu/special_helper.c target/mips: Move Special opcodes to tcg/sysemu/special_helper.c target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope target/mips: Move tlb_helper.c to tcg/sysemu/ target/mips: Restrict mmu_init() to TCG target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG target/mips: Move physical addressing code to sysemu/physaddr.c target/mips: Move sysemu specific files under sysemu/ subfolder target/mips: Move cpu_signal_handler definition around target/mips: Add simple user-mode mips_cpu_tlb_fill() target/mips: Add simple user-mode mips_cpu_do_interrupt() target/mips: Introduce tcg-internal.h for TCG specific declarations meson: Introduce meson_user_arch source set for arch-specific user-mode ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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a2b0a27d |
| 13-Apr-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips: Move TCG source files under tcg/ sub directory To ease maintenance, move all TCG specific files under the tcg/ sub-directory. Adapt the Meson machinery. The followi
target/mips: Move TCG source files under tcg/ sub directory To ease maintenance, move all TCG specific files under the tcg/ sub-directory. Adapt the Meson machinery. The following prototypes: - mips_tcg_init() - mips_cpu_do_unaligned_access() - mips_cpu_do_transaction_failed() can now be restricted to the "tcg-internal.h" header. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-29-f4bug@amsat.org>
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5679479b |
| 13-Apr-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips: Move CP0 helpers to sysemu/cp0.c Opcodes accessing Coprocessor 0 are privileged. Move the CP0 helpers to sysemu/ and simplify the #ifdef'ry. Reviewed-by: Richard He
target/mips: Move CP0 helpers to sysemu/cp0.c Opcodes accessing Coprocessor 0 are privileged. Move the CP0 helpers to sysemu/ and simplify the #ifdef'ry. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-28-f4bug@amsat.org>
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8aa52bdc |
| 13-Apr-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips: Move exception management code to exception.c Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Messa
target/mips: Move exception management code to exception.c Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-27-f4bug@amsat.org>
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