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Searched refs:gicdev (Results 1 – 8 of 8) sorted by relevance

/openbmc/qemu/hw/arm/
H A Dbcm2838.c74 DeviceState *gicdev = NULL; in bcm2838_realize() local
146 gicdev = DEVICE(&s->gic); in bcm2838_realize()
162 qdev_get_gpio_in(gicdev, in bcm2838_realize()
167 qdev_get_gpio_in(gicdev, PPI(n, GIC400_TIMER_NS_EL1_IRQ))); in bcm2838_realize()
169 qdev_get_gpio_in(gicdev, PPI(n, GIC400_TIMER_VIRT_IRQ))); in bcm2838_realize()
171 qdev_get_gpio_in(gicdev, PPI(n, GIC400_TIMER_NS_EL2_IRQ))); in bcm2838_realize()
173 qdev_get_gpio_in(gicdev, PPI(n, GIC400_TIMER_S_EL1_IRQ))); in bcm2838_realize()
176 qdev_get_gpio_in(gicdev, PPI(n, VIRTUAL_PMU_IRQ))); in bcm2838_realize()
181 qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_UART0)); in bcm2838_realize()
185 qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_AUX_UART1)); in bcm2838_realize()
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H A Dmps3r.c265 DeviceState *gicdev; in create_gic() local
269 gicdev = DEVICE(&mms->gic); in create_gic()
270 qdev_prop_set_uint32(gicdev, "num-cpu", machine->smp.cpus); in create_gic()
271 qdev_prop_set_uint32(gicdev, "num-irq", NUM_SPIS + GIC_INTERNAL); in create_gic()
274 qdev_prop_set_array(gicdev, "redist-region-count", redist_region_count); in create_gic()
303 qdev_get_gpio_in(gicdev, in create_gic()
308 qdev_get_gpio_in(gicdev, in create_gic()
312 qdev_get_gpio_in(gicdev, in create_gic()
359 DeviceState *gicdev; in mps3r_common_init() local
406 gicdev = DEVICE(&mms->gic); in mps3r_common_init()
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H A Dfsl-imx8mp.c265 DeviceState *gicdev = DEVICE(&s->gic); in fsl_imx8mp_realize() local
308 qdev_prop_set_uint32(gicdev, "num-cpu", ms->smp.cpus); in fsl_imx8mp_realize()
309 qdev_prop_set_uint32(gicdev, "num-irq", in fsl_imx8mp_realize()
313 qdev_prop_set_array(gicdev, "redist-region-count", redist_region_count); in fsl_imx8mp_realize()
344 irq = qdev_get_gpio_in(gicdev, intidbase + timer_irqs[j]); in fsl_imx8mp_realize()
348 irq = qdev_get_gpio_in(gicdev, intidbase + ARCH_GIC_MAINT_IRQ); in fsl_imx8mp_realize()
352 irq = qdev_get_gpio_in(gicdev, intidbase + VIRTUAL_PMU_IRQ); in fsl_imx8mp_realize()
399 qdev_get_gpio_in(gicdev, serial_table[i].irq)); in fsl_imx8mp_realize()
410 qdev_get_gpio_in(gicdev, FSL_IMX8MP_GPT5_GPT6_IRQ)); in fsl_imx8mp_realize()
439 qdev_get_gpio_in(gicdev, gpt_irqs[i])); in fsl_imx8mp_realize()
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H A Daspeed_ast27x0.c584 DeviceState *gicdev; in aspeed_soc_ast2700_gic_realize() local
589 gicdev = DEVICE(&a->gic); in aspeed_soc_ast2700_gic_realize()
590 qdev_prop_set_uint32(gicdev, "revision", 3); in aspeed_soc_ast2700_gic_realize()
591 qdev_prop_set_uint32(gicdev, "num-cpu", sc->num_cpus); in aspeed_soc_ast2700_gic_realize()
592 qdev_prop_set_uint32(gicdev, "num-irq", AST2700_MAX_IRQ + GIC_INTERNAL); in aspeed_soc_ast2700_gic_realize()
596 qdev_prop_set_array(gicdev, "redist-region-count", redist_region_count); in aspeed_soc_ast2700_gic_realize()
621 qdev_get_gpio_in(gicdev, intidbase + timer_irq[j])); in aspeed_soc_ast2700_gic_realize()
624 qemu_irq irq = qdev_get_gpio_in(gicdev, in aspeed_soc_ast2700_gic_realize()
629 qdev_get_gpio_in(gicdev, intidbase + VIRTUAL_PMU_IRQ)); in aspeed_soc_ast2700_gic_realize()
H A Dxlnx-versal.c72 DeviceState *gicdev; in versal_create_apu_gic() local
80 gicdev = DEVICE(&s->fpd.apu.gic); in versal_create_apu_gic()
81 qdev_prop_set_uint32(gicdev, "revision", 3); in versal_create_apu_gic()
82 qdev_prop_set_uint32(gicdev, "num-cpu", nr_apu_cpus); in versal_create_apu_gic()
83 qdev_prop_set_uint32(gicdev, "num-irq", XLNX_VERSAL_NR_IRQS + 32); in versal_create_apu_gic()
87 qdev_prop_set_array(gicdev, "redist-region-count", redist_region_count); in versal_create_apu_gic()
89 qdev_prop_set_bit(gicdev, "has-security-extensions", true); in versal_create_apu_gic()
117 qdev_get_gpio_in(gicdev, in versal_create_apu_gic()
120 maint_irq = qdev_get_gpio_in(gicdev, in versal_create_apu_gic()
134 pic[i] = qdev_get_gpio_in(gicdev, i); in versal_create_apu_gic()
/openbmc/qemu/hw/cpu/
H A Da15mpcore.c54 DeviceState *gicdev; in a15mp_priv_realize() local
66 gicdev = DEVICE(&s->gic); in a15mp_priv_realize()
67 qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu); in a15mp_priv_realize()
68 qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); in a15mp_priv_realize()
77 qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); in a15mp_priv_realize()
81 qdev_prop_set_bit(gicdev, "has-virtualization-extensions", has_el2); in a15mp_priv_realize()
113 qdev_get_gpio_in(gicdev, in a15mp_priv_realize()
118 sysbus_connect_irq(SYS_BUS_DEVICE(gicdev), i + 4 * s->num_cpu, in a15mp_priv_realize()
119 qdev_get_gpio_in(gicdev, ppibase + 25)); in a15mp_priv_realize()
H A Da9mpcore.c51 DeviceState *scudev, *gicdev, *gtimerdev, *mptimerdev, *wdtdev; in a9mp_priv_realize() local
80 gicdev = DEVICE(&s->gic); in a9mp_priv_realize()
81 qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu); in a9mp_priv_realize()
82 qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); in a9mp_priv_realize()
83 qdev_prop_set_uint32(gicdev, "num-priority-bits", in a9mp_priv_realize()
91 qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); in a9mp_priv_realize()
158 qdev_get_gpio_in(gicdev, ppibase + 27)); in a9mp_priv_realize()
160 qdev_get_gpio_in(gicdev, ppibase + 29)); in a9mp_priv_realize()
162 qdev_get_gpio_in(gicdev, ppibase + 30)); in a9mp_priv_realize()
H A Darm11mpcore.c31 DeviceState *gicdev = DEVICE(&s->gic); in mpcore_priv_map_setup() local
65 qdev_get_gpio_in(gicdev, ppibase + 29)); in mpcore_priv_map_setup()
67 qdev_get_gpio_in(gicdev, ppibase + 30)); in mpcore_priv_map_setup()
76 DeviceState *gicdev = DEVICE(&s->gic); in mpcore_priv_realize() local
85 qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu); in mpcore_priv_realize()
86 qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); in mpcore_priv_realize()
87 qdev_prop_set_uint32(gicdev, "num-priority-bits", in mpcore_priv_realize()