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Searched refs:gcpu_parents (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8135.c312 static const char * const gcpu_parents[] = { variable
391 MUX_GATE(CLK_TOP_GCPU_SEL, "gcpu_sel", gcpu_parents, 0x0164, 24, 3, 31),
H A Dclk-mt8188-topckgen.c601 static const char * const gcpu_parents[] = { variable
1073 gcpu_parents, 0x0B0, 0x0B4, 0x0B8, 16, 4, 23, 0x08, 18),
H A Dclk-mt2712.c606 static const char * const gcpu_parents[] = { variable
749 MUX_GATE(CLK_TOP_GCPU_SEL, "gcpu_sel", gcpu_parents, 0x570, 0, 3, 7),
H A Dclk-mt8365.c355 static const char * const gcpu_parents[] = { variable
517 MUX_GATE_CLR_SET_UPD(CLK_TOP_GCPU_SEL, "gcpu_sel", gcpu_parents, 0x0e0,
H A Dclk-mt8195-topckgen.c462 static const char * const gcpu_parents[] = { variable
1002 gcpu_parents, 0x0C8, 0x0CC, 0x0D0, 8, 3, 15, 0x08, 25),