Searched refs:fifo_base (Results 1 – 5 of 5) sorted by relevance
81 u32 fifo_base; member217 u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_start_rx()257 u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_start_tx()921 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_common_hw_param()925 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_common_hw_param()2383 mcasp->fifo_base = DAVINCI_MCASP_V2_AFIFO_BASE; in davinci_mcasp_probe()2387 mcasp->fifo_base = DAVINCI_MCASP_V3_AFIFO_BASE; in davinci_mcasp_probe()2483 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in davinci_mcasp_runtime_suspend()2487 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in davinci_mcasp_runtime_suspend()2509 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in davinci_mcasp_runtime_resume()[all …]
80 u32 *fifo_base; member194 priv->fifo_ptr = priv->fifo_base; in ps3vram_rewind_ring()204 iowrite32be(FIFO_BASE + FIFO_OFFSET + (priv->fifo_ptr - priv->fifo_base) in ps3vram_fire_ring()213 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) > in ps3vram_fire_ring()636 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET); in ps3vram_probe()637 priv->fifo_ptr = priv->fifo_base; in ps3vram_probe()
1131 void *fifo_base; in qcom_smd_create_channel() local1172 fifo_base = qcom_smem_get(edge->remote_pid, smem_fifo_item, &fifo_size); in qcom_smd_create_channel()1173 if (IS_ERR(fifo_base)) { in qcom_smd_create_channel()1174 ret = PTR_ERR(fifo_base); in qcom_smd_create_channel()1184 channel->tx_fifo = fifo_base; in qcom_smd_create_channel()1185 channel->rx_fifo = fifo_base + fifo_size; in qcom_smd_create_channel()
373 unsigned long fifo_base; /* RX FIFO base in SRAM */ member
3137 card->fifo_base = SAR_SRAM_FIFO_128_BASE; in init_sram()3155 card->fifo_base = SAR_SRAM_FIFO_32_BASE; in init_sram()3250 writel(card->fifo_size | (card->fifo_base << 2), in init_sram()