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Searched refs:fcr (Results 1 – 25 of 86) sorted by relevance

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/openbmc/linux/arch/m68k/include/asm/
H A Dsun3xflop.h39 unsigned char fcr; member
86 unsigned char fcr = sun3x_fdc.fcr; in sun3x_82072_fd_outb() local
89 fcr |= (FCR_DSEL0 | FCR_MTRON); in sun3x_82072_fd_outb()
91 fcr &= ~(FCR_DSEL0 | FCR_MTRON); in sun3x_82072_fd_outb()
94 if(fcr != sun3x_fdc.fcr) { in sun3x_82072_fd_outb()
95 *(sun3x_fdc.fcr_r) = fcr; in sun3x_82072_fd_outb()
96 sun3x_fdc.fcr = fcr; in sun3x_82072_fd_outb()
227 sun3x_fdc.fcr = 0; in sun3xflop_init()
251 sun3x_fdc.fcr |= (FCR_DSEL0 | FCR_EJECT); in sun3x_eject()
252 *(sun3x_fdc.fcr_r) = sun3x_fdc.fcr; in sun3x_eject()
[all …]
/openbmc/linux/lib/reed_solomon/
H A Dreed_solomon.c71 int fcr, int prim, int nroots, gfp_t gfp) in codec_init() argument
84 rs->fcr = fcr; in codec_init()
135 for (i = 0, root = fcr * prim; i < nroots; i++, root += prim) { in codec_init()
214 int (*gffunc)(int), int fcr, in init_rs_internal() argument
224 if (fcr < 0 || fcr >= (1<<symsize)) in init_rs_internal()
253 if (fcr != cd->fcr) in init_rs_internal()
266 rs->codec = codec_init(symsize, gfpoly, gffunc, fcr, prim, nroots, gfp); in init_rs_internal()
288 struct rs_control *init_rs_gfp(int symsize, int gfpoly, int fcr, int prim, in init_rs_gfp() argument
291 return init_rs_internal(symsize, gfpoly, NULL, fcr, prim, nroots, gfp); in init_rs_gfp()
308 int fcr, int prim, int nroots) in init_rs_non_canonical() argument
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H A Ddecode_rs.c18 int fcr = rs->fcr; variable
73 (fcr + i) * prim)];
85 (fcr+i)*prim)];
267 num2 = alpha_to[rs_modnn(rs, root[j] * (fcr - 1) + nn)];
295 k = (fcr + i) * prim * (nn-loc[j]-1);
/openbmc/linux/include/linux/
H A Drslib.h41 int fcr; member
82 struct rs_control *init_rs_gfp(int symsize, int gfpoly, int fcr, int prim,
98 static inline struct rs_control *init_rs(int symsize, int gfpoly, int fcr, in init_rs() argument
101 return init_rs_gfp(symsize, gfpoly, fcr, prim, nroots, GFP_KERNEL); in init_rs()
105 int fcr, int prim, int nroots);
/openbmc/linux/arch/powerpc/platforms/powermac/
H A Dfeature.c164 unsigned long fcr; in ohare_htw_scc_enable() local
190 fcr = MACIO_IN32(OHARE_FCR); in ohare_htw_scc_enable()
192 if (!(fcr & OH_SCC_ENABLE)) { in ohare_htw_scc_enable()
193 fcr |= OH_SCC_ENABLE; in ohare_htw_scc_enable()
201 fcr &= ~HRW_SCC_TRANS_EN_N; in ohare_htw_scc_enable()
202 MACIO_OUT32(OHARE_FCR, fcr); in ohare_htw_scc_enable()
203 fcr |= (rmask = HRW_RESET_SCC); in ohare_htw_scc_enable()
204 MACIO_OUT32(OHARE_FCR, fcr); in ohare_htw_scc_enable()
206 fcr |= (rmask = OH_SCC_RESET); in ohare_htw_scc_enable()
207 MACIO_OUT32(OHARE_FCR, fcr); in ohare_htw_scc_enable()
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dfsl_elbc_nand.c210 in_be32(&lbc->fmr), in_be32(&lbc->fir), in_be32(&lbc->fcr)); in fsl_elbc_run_command()
260 out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | in fsl_elbc_do_read()
270 out_be32(&lbc->fcr, in fsl_elbc_do_read()
273 out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); in fsl_elbc_do_read()
336 out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT); in fsl_elbc_cmdfunc()
365 out_be32(&lbc->fcr, in fsl_elbc_cmdfunc()
377 u32 fcr; in fsl_elbc_cmdfunc() local
386 fcr = (NAND_CMD_SEQIN << FCR_CMD0_SHIFT) | in fsl_elbc_cmdfunc()
396 fcr = (NAND_CMD_PAGEPROG << FCR_CMD1_SHIFT) | in fsl_elbc_cmdfunc()
410 fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT; in fsl_elbc_cmdfunc()
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H A Dfsl_elbc_spl.c60 out_be32(&regs->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | in nand_spl_load_image()
69 out_be32(&regs->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); in nand_spl_load_image()
/openbmc/u-boot/arch/arm/mach-at91/arm926ejs/
H A Deflash.c79 writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GETD, &eefc->fcr); in flash_init()
114 writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GLB, &eefc->fcr); in flash_init()
170 (pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr); in flash_real_protect()
173 (pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr); in flash_real_protect()
178 writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GLB, &eefc->fcr); in flash_real_protect()
197 (pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr); in erase_write_page()
/openbmc/u-boot/arch/arm/cpu/arm926ejs/lpc32xx/
H A Ddevices.c48 .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
50 .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
52 .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
54 .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
/openbmc/linux/drivers/net/ethernet/freescale/
H A Dgianfar_ethtool.c607 u32 fcr = 0x0, fpr = FPR_FILER_MASK; in ethflow_to_filer_rules() local
610 fcr = RQFCR_PID_DAH | RQFCR_CMP_NOMATCH | in ethflow_to_filer_rules()
613 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; in ethflow_to_filer_rules()
614 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); in ethflow_to_filer_rules()
617 fcr = RQFCR_PID_DAL | RQFCR_CMP_NOMATCH | in ethflow_to_filer_rules()
620 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; in ethflow_to_filer_rules()
621 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); in ethflow_to_filer_rules()
626 fcr = RQFCR_PID_VID | RQFCR_CMP_NOMATCH | RQFCR_HASH | in ethflow_to_filer_rules()
628 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); in ethflow_to_filer_rules()
630 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; in ethflow_to_filer_rules()
[all …]
/openbmc/qemu/tests/tcg/xtensa/
H A Dfpu.h78 wur a2, fcr
81 wur a2, fcr
87 wur a2, fcr
90 wur a2, fcr
96 wur a2, fcr
99 wur a2, fcr
/openbmc/linux/drivers/tty/serial/8250/
H A D8250_em.c87 unsigned int ier, fcr, lcr, mcr, hcr0; in serial8250_em_reg_update() local
90 fcr = serial8250_em_serial_in(p, UART_FCR_EM); in serial8250_em_reg_update()
95 serial8250_em_serial_out_helper(p, UART_FCR_EM, fcr | in serial8250_em_reg_update()
105 fcr = value; in serial8250_em_reg_update()
116 serial8250_em_serial_out_helper(p, UART_FCR_EM, fcr); in serial8250_em_reg_update()
H A D8250_port.c82 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
101 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
110 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
124 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01,
133 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
142 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
149 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
156 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
163 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
170 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dboard.c67 .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
70 .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
73 .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
75 .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
77 .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
79 .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
/openbmc/linux/drivers/mtd/nand/raw/
H A Dfsl_elbc_nand.c217 in_be32(&lbc->fmr), in_be32(&lbc->fir), in_be32(&lbc->fcr)); in fsl_elbc_run_command()
241 in_be32(&lbc->fir), in_be32(&lbc->fcr), in fsl_elbc_run_command()
289 out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | in fsl_elbc_do_read()
299 out_be32(&lbc->fcr, NAND_CMD_READOOB << FCR_CMD0_SHIFT); in fsl_elbc_do_read()
301 out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); in fsl_elbc_do_read()
374 out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT); in fsl_elbc_cmdfunc()
406 out_be32(&lbc->fcr, in fsl_elbc_cmdfunc()
420 __be32 fcr; in fsl_elbc_cmdfunc() local
438 fcr = (NAND_CMD_STATUS << FCR_CMD1_SHIFT) | in fsl_elbc_cmdfunc()
464 fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT; in fsl_elbc_cmdfunc()
[all …]
/openbmc/u-boot/include/
H A Dns16550.h62 u32 fcr; member
70 UART_REG(fcr); /* 2 */
101 #define iir fcr
/openbmc/u-boot/drivers/serial/
H A Dns16550.c125 return plat->fcr; in ns16550_getfcr()
186 serial_out(ns16550_getfcr(com_port), &com_port->fcr); in NS16550_init()
207 serial_out(ns16550_getfcr(com_port), &com_port->fcr); in NS16550_reinit()
267 serial_dout(&com_port->fcr, UART_FCR_DEFVAL); in _debug_uart_init()
504 plat->fcr = UART_FCR_DEFVAL; in ns16550_serial_ofdata_to_platdata()
506 plat->fcr |= UART_FCR_UME; in ns16550_serial_ofdata_to_platdata()
H A Dserial_omap.c75 serial_dout(&com_port->fcr, UART_FCR_DEFVAL); in _debug_uart_init()
135 plat->fcr = UART_FCR_DEFVAL; in omap_serial_ofdata_to_platdata()
/openbmc/qemu/hw/char/
H A Dserial.c130 (!(s->fcr & UART_FCR_FE) || in serial_update_irq()
239 if (s->fcr & UART_FCR_FE) { in serial_xmit()
290 s->fcr = val; in serial_write_fcr()
347 if(s->fcr & UART_FCR_FE) { in serial_ioport_write()
409 if ((val ^ s->fcr) & UART_FCR_FE) { in serial_ioport_write()
481 if(s->fcr & UART_FCR_FE) { in serial_ioport_read()
557 if(s->fcr & UART_FCR_FE) { in serial_can_receive()
607 if(s->fcr & UART_FCR_FE) { in serial_receive1()
634 s->fcr_vmstate = s->fcr; in serial_pre_save()
H A Dsh_serial.c58 uint16_t fcr; member
165 s->fcr = val; in sh_serial_write()
279 ret = s->fcr; in sh_serial_read()
406 s->fcr = 0; in sh_serial_reset()
/openbmc/u-boot/drivers/i2c/
H A Dast_i2c.c72 writel(0, &priv->regs->fcr); in ast_i2c_init_bus()
77 &priv->regs->fcr); in ast_i2c_init_bus()
317 setbits_le32(&regs->fcr, I2CD_M_HIGH_SPEED_EN in ast_i2c_set_speed()
/openbmc/linux/drivers/net/ethernet/davicom/
H A Ddm9051.c260 u8 fcr = 0; in dm9051_set_fcr() local
263 fcr |= FCR_BKPM | FCR_FLCE; in dm9051_set_fcr()
265 fcr |= FCR_TXPEN; in dm9051_set_fcr()
267 return dm9051_set_reg(db, DM9051_FCR, fcr); in dm9051_set_fcr()
305 u8 fcr = 0; in dm9051_update_fcr() local
308 fcr |= FCR_BKPM | FCR_FLCE; in dm9051_update_fcr()
310 fcr |= FCR_TXPEN; in dm9051_update_fcr()
312 return dm9051_update_bits(db, DM9051_FCR, FCR_RXTX_BITS, fcr); in dm9051_update_fcr()
/openbmc/linux/arch/csky/abiv2/
H A Dfpu.c160 user_fp->fcr = tmp1; in save_to_user_fp()
219 tmp1 = user_fp->fcr; in restore_from_user_fp()
/openbmc/linux/arch/csky/include/uapi/asm/
H A Dptrace.h44 unsigned long fcr; member
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_eefc.h17 u32 fcr; /* Flash Command Register WO */ member

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