| /openbmc/qemu/target/riscv/ |
| H A D | internals.h | 96 if (env_archcpu(env)->cfg.ext_zfinx) { in nanbox_s() 106 if (env_archcpu(env)->cfg.ext_zfinx) { in check_nanbox_s() 122 if (env_archcpu(env)->cfg.ext_zfinx) { in nanbox_h() 132 if (env_archcpu(env)->cfg.ext_zfinx) { in check_nanbox_h() 148 if (env_archcpu(env)->cfg.ext_zfinx) { in check_nanbox_bf16()
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| H A D | pmu.c | 317 cpu = env_archcpu(env); in riscv_pmu_ctr_monitor_instructions() 343 cpu = env_archcpu(env); in riscv_pmu_ctr_monitor_cycles() 383 RISCVCPU *cpu = env_archcpu(env); in riscv_pmu_update_event_map() 536 RISCVCPU *cpu = env_archcpu(env); in riscv_pmu_setup_timer()
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| /openbmc/qemu/target/ppc/ |
| H A D | misc_helper.c | 176 PowerPCCPU *cpu = env_archcpu(env); in helper_store_ptcr() 215 PowerPCCPU *cpu = env_archcpu(env); in helper_store_pcr() 283 PowerPCCPU *cpu = env_archcpu(env); in helper_store_dpdes() 330 PowerPCCPU *cpu = env_archcpu(env); in helper_load_sprd() 342 PowerPCCPU *cpu = env_archcpu(env); in helper_store_sprd() 372 PowerPCCPU *cpu = env_archcpu(env); in helper_store_pmcr()
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| H A D | power8-pmu.c | 117 PowerPCCPU *cpu = env_archcpu(env); in pmu_mmcr01a_updated() 366 perfm_alert(env_archcpu(env)); in helper_handle_pmc5_overflow() 376 perfm_alert(env_archcpu(env)); in helper_insns_inc() 389 PowerPCCPU *cpu = env_archcpu(env); in cpu_ppc_pmu_init()
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| H A D | mmu_common.c | 42 PowerPCCPU *cpu = env_archcpu(env); in ppc_store_sdr1() 169 hwaddr base = ppc_hash32_hpt_base(env_archcpu(env)); in ppc6xx_tlb_check() 170 hwaddr len = ppc_hash32_hpt_mask(env_archcpu(env)) + 0x80; in ppc6xx_tlb_check() 266 PowerPCCPU *cpu = env_archcpu(env); in mmu6xx_get_physical_address() 502 PowerPCCPU *cpu = env_archcpu(env); in mmu6xx_dump_mmu() 567 dump_slb(env_archcpu(env)); in dump_mmu() 570 if (ppc64_v3_radix(env_archcpu(env))) { in dump_mmu() 574 dump_slb(env_archcpu(env)); in dump_mmu()
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| H A D | mmu-hash64.c | 108 PowerPCCPU *cpu = env_archcpu(env); in helper_SLBIA() 181 PowerPCCPU *cpu = env_archcpu(env); in helper_SLBIAG() 208 PowerPCCPU *cpu = env_archcpu(env); in __helper_slbie() 343 PowerPCCPU *cpu = env_archcpu(env); in helper_SLBMTE() 353 PowerPCCPU *cpu = env_archcpu(env); in helper_SLBMFEE() 365 PowerPCCPU *cpu = env_archcpu(env); in helper_SLBFEE() 377 PowerPCCPU *cpu = env_archcpu(env); in helper_SLBMFEV() 1224 PowerPCCPU *cpu = env_archcpu(env); in helper_store_lpcr()
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| H A D | timebase_helper.c | 318 PowerPCCPU *cpu = env_archcpu(env); in tb_state_machine_step() 381 PowerPCCPU *cpu = env_archcpu(env); in helper_store_tfmr()
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| /openbmc/qemu/target/arm/ |
| H A D | vfp_fpscr.c | 60 ARMCPU *cpu = env_archcpu(env); in vfp_set_fpsr() 96 ARMCPU *cpu = env_archcpu(env); in vfp_set_fpcr_masked()
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| H A D | debug_helper.c | 874 bool mdcr_el2_tdcc = cpu_isar_feature(aa64_fgt, env_archcpu(env)) && in access_tdcc() 876 bool mdcr_el3_tdcc = cpu_isar_feature(aa64_fgt, env_archcpu(env)) && in access_tdcc() 913 ARMCPU *cpu = env_archcpu(env); in osdlr_write() 1135 ARMCPU *cpu = env_archcpu(env); in dbgwvr_write() 1160 ARMCPU *cpu = env_archcpu(env); in dbgwcr_write() 1172 ARMCPU *cpu = env_archcpu(env); in dbgbvr_write() 1184 ARMCPU *cpu = env_archcpu(env); in dbgbcr_write()
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| H A D | cpregs-pmu.c | 116 return cpu_isar_feature(any_pmuv3p1, env_archcpu(env)); in pmuv3p1_events_supported() 122 return cpu_isar_feature(any_pmuv3p4, env_archcpu(env)); in pmuv3p4_events_supported() 381 if (cpu_isar_feature(any_pmuv3p5, env_archcpu(env))) { in pmu_counter_enabled() 431 ARMCPU *cpu = env_archcpu(env); in pmu_update_irq() 454 if (!cpu_isar_feature(any_pmuv3p5, env_archcpu(env))) { in pmevcntr_is_64_bit() 524 ARMCPU *cpu = env_archcpu(env); in pmccntr_op_finish() 581 ARMCPU *cpu = env_archcpu(env); in pmevcntr_op_finish() 906 if (!cpu_isar_feature(any_pmuv3p5, env_archcpu(env))) { in pmevcntr_write() 929 if (!cpu_isar_feature(any_pmuv3p5, env_archcpu(env))) { in pmevcntr_read()
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| H A D | cortex-regs.c | 16 ARMCPU *cpu = env_archcpu(env); in l2ctlr_read()
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| H A D | arch_dump.c | 189 ARMCPU *cpu = env_archcpu(env); in aarch64_write_elf64_sve()
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| /openbmc/qemu/linux-user/riscv/ |
| H A D | target_proc.h | 13 RISCVCPU *cpu = env_archcpu(cpu_env); in open_cpuinfo()
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| /openbmc/qemu/target/openrisc/ |
| H A D | exception_helper.c | 27 OpenRISCCPU *cpu = env_archcpu(env); in HELPER()
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| /openbmc/qemu/target/xtensa/ |
| H A D | op_helper.c | 41 XtensaCPU *cpu = env_archcpu(env); in HELPER() 62 XtensaCPU *cpu = env_archcpu(env); in HELPER()
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | pauth_helper.c | 317 if (cpu_isar_feature(aa64_pauth_qarma5, env_archcpu(env))) { in pauth_computepac() 319 } else if (cpu_isar_feature(aa64_pauth_qarma3, env_archcpu(env))) { in pauth_computepac() 329 ARMCPU *cpu = env_archcpu(env); in pauth_addpac() 411 ARMCPU *cpu = env_archcpu(env); in pauth_auth()
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| /openbmc/qemu/target/hexagon/ |
| H A D | cpu.c | 78 HexagonCPU *cpu = env_archcpu(env); in adjust_stack_ptrs() 181 HexagonCPU *cpu = env_archcpu(env); in hexagon_dump()
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| /openbmc/qemu/target/s390x/ |
| H A D | diag.c | 80 S390CPU *cpu = env_archcpu(env); in handle_diag_308()
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| H A D | interrupt.c | 36 kvm_s390_program_interrupt(env_archcpu(env), code); in s390_program_interrupt()
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| H A D | cpu.c | 94 s390_handle_wait(env_archcpu(env)); in s390_cpu_set_psw()
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| /openbmc/qemu/target/loongarch/tcg/ |
| H A D | op_helper.c | 93 LoongArchCPU *cpu = env_archcpu(env); in helper_rdtime_d()
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| /openbmc/qemu/target/i386/tcg/ |
| H A D | tcg-cpu.c | 149 do_cpu_init(env_archcpu(env)); in x86_cpu_exec_reset()
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| /openbmc/qemu/bsd-user/freebsd/ |
| H A D | os-sys.c | 319 ARMCPU *cpu = env_archcpu(env); in do_freebsd_sysctl_oid()
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| /openbmc/qemu/hw/intc/ |
| H A D | mips_gic.c | 49 kvm_mips_set_ipi_interrupt(env_archcpu(gic->vps[vp].env), in mips_gic_set_vp_irq()
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| /openbmc/qemu/target/i386/tcg/system/ |
| H A D | excp_helper.c | 163 rsvd_mask = ~MAKE_64BIT_MASK(0, env_archcpu(env)->phys_bits); in mmu_translate()
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