xref: /openbmc/qemu/target/loongarch/tcg/op_helper.c (revision 5c23704e)
1*5c23704eSSong Gao /* SPDX-License-Identifier: GPL-2.0-or-later */
2*5c23704eSSong Gao /*
3*5c23704eSSong Gao  * LoongArch emulation helpers for QEMU.
4*5c23704eSSong Gao  *
5*5c23704eSSong Gao  * Copyright (c) 2021 Loongson Technology Corporation Limited
6*5c23704eSSong Gao  */
7*5c23704eSSong Gao 
8*5c23704eSSong Gao #include "qemu/osdep.h"
9*5c23704eSSong Gao #include "qemu/log.h"
10*5c23704eSSong Gao #include "cpu.h"
11*5c23704eSSong Gao #include "qemu/host-utils.h"
12*5c23704eSSong Gao #include "exec/helper-proto.h"
13*5c23704eSSong Gao #include "exec/exec-all.h"
14*5c23704eSSong Gao #include "exec/cpu_ldst.h"
15*5c23704eSSong Gao #include "internals.h"
16*5c23704eSSong Gao #include "qemu/crc32c.h"
17*5c23704eSSong Gao #include <zlib.h>
18*5c23704eSSong Gao #include "cpu-csr.h"
19*5c23704eSSong Gao 
20*5c23704eSSong Gao /* Exceptions helpers */
helper_raise_exception(CPULoongArchState * env,uint32_t exception)21*5c23704eSSong Gao void helper_raise_exception(CPULoongArchState *env, uint32_t exception)
22*5c23704eSSong Gao {
23*5c23704eSSong Gao     do_raise_exception(env, exception, GETPC());
24*5c23704eSSong Gao }
25*5c23704eSSong Gao 
helper_bitrev_w(target_ulong rj)26*5c23704eSSong Gao target_ulong helper_bitrev_w(target_ulong rj)
27*5c23704eSSong Gao {
28*5c23704eSSong Gao     return (int32_t)revbit32(rj);
29*5c23704eSSong Gao }
30*5c23704eSSong Gao 
helper_bitrev_d(target_ulong rj)31*5c23704eSSong Gao target_ulong helper_bitrev_d(target_ulong rj)
32*5c23704eSSong Gao {
33*5c23704eSSong Gao     return revbit64(rj);
34*5c23704eSSong Gao }
35*5c23704eSSong Gao 
helper_bitswap(target_ulong v)36*5c23704eSSong Gao target_ulong helper_bitswap(target_ulong v)
37*5c23704eSSong Gao {
38*5c23704eSSong Gao     v = ((v >> 1) & (target_ulong)0x5555555555555555ULL) |
39*5c23704eSSong Gao         ((v & (target_ulong)0x5555555555555555ULL) << 1);
40*5c23704eSSong Gao     v = ((v >> 2) & (target_ulong)0x3333333333333333ULL) |
41*5c23704eSSong Gao         ((v & (target_ulong)0x3333333333333333ULL) << 2);
42*5c23704eSSong Gao     v = ((v >> 4) & (target_ulong)0x0F0F0F0F0F0F0F0FULL) |
43*5c23704eSSong Gao         ((v & (target_ulong)0x0F0F0F0F0F0F0F0FULL) << 4);
44*5c23704eSSong Gao     return v;
45*5c23704eSSong Gao }
46*5c23704eSSong Gao 
47*5c23704eSSong Gao /* loongarch assert op */
helper_asrtle_d(CPULoongArchState * env,target_ulong rj,target_ulong rk)48*5c23704eSSong Gao void helper_asrtle_d(CPULoongArchState *env, target_ulong rj, target_ulong rk)
49*5c23704eSSong Gao {
50*5c23704eSSong Gao     if (rj > rk) {
51*5c23704eSSong Gao         env->CSR_BADV = rj;
52*5c23704eSSong Gao         do_raise_exception(env, EXCCODE_BCE, GETPC());
53*5c23704eSSong Gao     }
54*5c23704eSSong Gao }
55*5c23704eSSong Gao 
helper_asrtgt_d(CPULoongArchState * env,target_ulong rj,target_ulong rk)56*5c23704eSSong Gao void helper_asrtgt_d(CPULoongArchState *env, target_ulong rj, target_ulong rk)
57*5c23704eSSong Gao {
58*5c23704eSSong Gao     if (rj <= rk) {
59*5c23704eSSong Gao         env->CSR_BADV = rj;
60*5c23704eSSong Gao         do_raise_exception(env, EXCCODE_BCE, GETPC());
61*5c23704eSSong Gao     }
62*5c23704eSSong Gao }
63*5c23704eSSong Gao 
helper_crc32(target_ulong val,target_ulong m,uint64_t sz)64*5c23704eSSong Gao target_ulong helper_crc32(target_ulong val, target_ulong m, uint64_t sz)
65*5c23704eSSong Gao {
66*5c23704eSSong Gao     uint8_t buf[8];
67*5c23704eSSong Gao     target_ulong mask = ((sz * 8) == 64) ? -1ULL : ((1ULL << (sz * 8)) - 1);
68*5c23704eSSong Gao 
69*5c23704eSSong Gao     m &= mask;
70*5c23704eSSong Gao     stq_le_p(buf, m);
71*5c23704eSSong Gao     return (int32_t) (crc32(val ^ 0xffffffff, buf, sz) ^ 0xffffffff);
72*5c23704eSSong Gao }
73*5c23704eSSong Gao 
helper_crc32c(target_ulong val,target_ulong m,uint64_t sz)74*5c23704eSSong Gao target_ulong helper_crc32c(target_ulong val, target_ulong m, uint64_t sz)
75*5c23704eSSong Gao {
76*5c23704eSSong Gao     uint8_t buf[8];
77*5c23704eSSong Gao     target_ulong mask = ((sz * 8) == 64) ? -1ULL : ((1ULL << (sz * 8)) - 1);
78*5c23704eSSong Gao     m &= mask;
79*5c23704eSSong Gao     stq_le_p(buf, m);
80*5c23704eSSong Gao     return (int32_t) (crc32c(val, buf, sz) ^ 0xffffffff);
81*5c23704eSSong Gao }
82*5c23704eSSong Gao 
helper_cpucfg(CPULoongArchState * env,target_ulong rj)83*5c23704eSSong Gao target_ulong helper_cpucfg(CPULoongArchState *env, target_ulong rj)
84*5c23704eSSong Gao {
85*5c23704eSSong Gao     return rj >= ARRAY_SIZE(env->cpucfg) ? 0 : env->cpucfg[rj];
86*5c23704eSSong Gao }
87*5c23704eSSong Gao 
helper_rdtime_d(CPULoongArchState * env)88*5c23704eSSong Gao uint64_t helper_rdtime_d(CPULoongArchState *env)
89*5c23704eSSong Gao {
90*5c23704eSSong Gao #ifdef CONFIG_USER_ONLY
91*5c23704eSSong Gao     return cpu_get_host_ticks();
92*5c23704eSSong Gao #else
93*5c23704eSSong Gao     uint64_t plv;
94*5c23704eSSong Gao     LoongArchCPU *cpu = env_archcpu(env);
95*5c23704eSSong Gao 
96*5c23704eSSong Gao     plv = FIELD_EX64(env->CSR_CRMD, CSR_CRMD, PLV);
97*5c23704eSSong Gao     if (extract64(env->CSR_MISC, R_CSR_MISC_DRDTL_SHIFT + plv, 1)) {
98*5c23704eSSong Gao         do_raise_exception(env, EXCCODE_IPE, GETPC());
99*5c23704eSSong Gao     }
100*5c23704eSSong Gao 
101*5c23704eSSong Gao     return cpu_loongarch_get_constant_timer_counter(cpu);
102*5c23704eSSong Gao #endif
103*5c23704eSSong Gao }
104*5c23704eSSong Gao 
105*5c23704eSSong Gao #ifndef CONFIG_USER_ONLY
helper_ertn(CPULoongArchState * env)106*5c23704eSSong Gao void helper_ertn(CPULoongArchState *env)
107*5c23704eSSong Gao {
108*5c23704eSSong Gao     uint64_t csr_pplv, csr_pie;
109*5c23704eSSong Gao     if (FIELD_EX64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR)) {
110*5c23704eSSong Gao         csr_pplv = FIELD_EX64(env->CSR_TLBRPRMD, CSR_TLBRPRMD, PPLV);
111*5c23704eSSong Gao         csr_pie = FIELD_EX64(env->CSR_TLBRPRMD, CSR_TLBRPRMD, PIE);
112*5c23704eSSong Gao 
113*5c23704eSSong Gao         env->CSR_TLBRERA = FIELD_DP64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR, 0);
114*5c23704eSSong Gao         env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DA, 0);
115*5c23704eSSong Gao         env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PG, 1);
116*5c23704eSSong Gao         set_pc(env, env->CSR_TLBRERA);
117*5c23704eSSong Gao         qemu_log_mask(CPU_LOG_INT, "%s: TLBRERA " TARGET_FMT_lx "\n",
118*5c23704eSSong Gao                       __func__, env->CSR_TLBRERA);
119*5c23704eSSong Gao     } else {
120*5c23704eSSong Gao         csr_pplv = FIELD_EX64(env->CSR_PRMD, CSR_PRMD, PPLV);
121*5c23704eSSong Gao         csr_pie = FIELD_EX64(env->CSR_PRMD, CSR_PRMD, PIE);
122*5c23704eSSong Gao 
123*5c23704eSSong Gao         set_pc(env, env->CSR_ERA);
124*5c23704eSSong Gao         qemu_log_mask(CPU_LOG_INT, "%s: ERA " TARGET_FMT_lx "\n",
125*5c23704eSSong Gao                       __func__, env->CSR_ERA);
126*5c23704eSSong Gao     }
127*5c23704eSSong Gao     env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PLV, csr_pplv);
128*5c23704eSSong Gao     env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, IE, csr_pie);
129*5c23704eSSong Gao 
130*5c23704eSSong Gao     env->lladdr = 1;
131*5c23704eSSong Gao }
132*5c23704eSSong Gao 
helper_idle(CPULoongArchState * env)133*5c23704eSSong Gao void helper_idle(CPULoongArchState *env)
134*5c23704eSSong Gao {
135*5c23704eSSong Gao     CPUState *cs = env_cpu(env);
136*5c23704eSSong Gao 
137*5c23704eSSong Gao     cs->halted = 1;
138*5c23704eSSong Gao     do_raise_exception(env, EXCP_HLT, 0);
139*5c23704eSSong Gao }
140*5c23704eSSong Gao #endif
141