Searched refs:enable_post_div (Results 1 – 8 of 8) sorted by relevance
61 if (dividers.enable_post_div) in rv730_populate_sclk_value()72 if (dividers.enable_post_div) in rv730_populate_sclk_value()139 if (dividers.enable_post_div) in rv730_populate_mclk_value()146 if (dividers.enable_post_div) in rv730_populate_mclk_value()
558 bool enable_post_div; member
2862 dividers->enable_post_div = true; in radeon_atom_get_clock_dividers()2878 dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ? in radeon_atom_get_clock_dividers()2882 dividers->enable_post_div = (dividers->fb_div & 1) ? true : false; in radeon_atom_get_clock_dividers()2890 dividers->enable_post_div = (args.v3.ucCntlFlag & in radeon_atom_get_clock_dividers()2910 dividers->enable_post_div = (args.v5.ucCntlFlag & in radeon_atom_get_clock_dividers()
149 if (dividers.enable_post_div) in rv6xx_convert_clock_to_stepping()610 if (dividers.enable_post_div) in rv6xx_program_mclk_stepping_entry()
91 if (dividers.enable_post_div) in rs780_initialize_dpm_power_state()
514 if (dividers.enable_post_div) in rv770_populate_sclk_value()523 if (dividers.enable_post_div) in rv770_populate_sclk_value()
44 bool enable_post_div; member
1024 dividers->enable_post_div = (args.v3.ucCntlFlag & in amdgpu_atombios_get_clock_dividers()1044 dividers->enable_post_div = (args.v5.ucCntlFlag & in amdgpu_atombios_get_clock_dividers()