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/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A DMakefile25 mlx5_core-$(CONFIG_MLX5_CORE_EN) += en/rqt.o en/tir.o en/rss.o en/rx_res.o \
28 en_selftest.o en/port.o en/monitor_stats.o en/health.o \
29 en/reporter_tx.o en/reporter_rx.o en/params.o en/xsk/pool.o \
30 en/xsk/setup.o en/xsk/rx.o en/xsk/tx.o en/devlink.o en/ptp.o \
31 en/qos.o en/htb.o en/trap.o en/fs_tt_redirect.o en/selq.o \
47 en/tc_tun_vxlan.o en/tc_tun_gre.o en/tc_tun_geneve.o \
49 en/tc/post_act.o en/tc/int_port.o en/tc/meter.o \
53 en/tc/act/accept.o en/tc/act/mark.o en/tc/act/goto.o \
54 en/tc/act/tun.o en/tc/act/csum.o en/tc/act/pedit.o \
55 en/tc/act/vlan.o en/tc/act/vlan_mangle.o en/tc/act/mpls.o \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dce80/
H A Dhw_translate_dce80.c67 uint32_t *en) in offset_to_id() argument
105 *en = GPIO_HPD_1; in offset_to_id()
108 *en = GPIO_HPD_2; in offset_to_id()
111 *en = GPIO_HPD_3; in offset_to_id()
212 uint32_t en, in id_to_offset() argument
220 switch (en) { in id_to_offset()
252 switch (en) { in id_to_offset()
284 switch (en) { in id_to_offset()
313 switch (en) { in id_to_offset()
338 switch (en) { in id_to_offset()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dce60/
H A Dhw_translate_dce60.c67 uint32_t *en) in offset_to_id() argument
105 *en = GPIO_HPD_1; in offset_to_id()
108 *en = GPIO_HPD_2; in offset_to_id()
111 *en = GPIO_HPD_3; in offset_to_id()
212 uint32_t en, in id_to_offset() argument
220 switch (en) { in id_to_offset()
252 switch (en) { in id_to_offset()
284 switch (en) { in id_to_offset()
313 switch (en) { in id_to_offset()
338 switch (en) { in id_to_offset()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dce110/
H A Dhw_translate_dce110.c43 uint32_t *en) in offset_to_id() argument
81 *en = GPIO_HPD_1; in offset_to_id()
84 *en = GPIO_HPD_2; in offset_to_id()
87 *en = GPIO_HPD_3; in offset_to_id()
183 uint32_t en, in id_to_offset() argument
191 switch (en) { in id_to_offset()
223 switch (en) { in id_to_offset()
255 switch (en) { in id_to_offset()
284 switch (en) { in id_to_offset()
309 switch (en) { in id_to_offset()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
H A Dhw_translate_dcn21.c68 uint32_t *en) in offset_to_id() argument
110 *en = GPIO_HPD_1; in offset_to_id()
113 *en = GPIO_HPD_2; in offset_to_id()
116 *en = GPIO_HPD_3; in offset_to_id()
119 *en = GPIO_HPD_4; in offset_to_id()
199 uint32_t en, in id_to_offset() argument
207 switch (en) { in id_to_offset()
234 switch (en) { in id_to_offset()
261 switch (en) { in id_to_offset()
290 switch (en) { in id_to_offset()
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H A Dhw_factory_dcn21.c163 generic->regs = &generic_regs[en]; in define_generic_registers()
164 generic->shifts = &generic_shift[en]; in define_generic_registers()
165 generic->masks = &generic_mask[en]; in define_generic_registers()
166 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
171 uint32_t en) in define_ddc_registers() argument
177 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
181 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
189 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
190 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
198 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_translate_dcn10.c65 uint32_t *en) in offset_to_id() argument
103 *en = GPIO_HPD_1; in offset_to_id()
106 *en = GPIO_HPD_2; in offset_to_id()
109 *en = GPIO_HPD_3; in offset_to_id()
205 uint32_t en, in id_to_offset() argument
213 switch (en) { in id_to_offset()
245 switch (en) { in id_to_offset()
277 switch (en) { in id_to_offset()
306 switch (en) { in id_to_offset()
331 switch (en) { in id_to_offset()
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H A Dhw_factory_dcn10.c155 generic->regs = &generic_regs[en]; in define_generic_registers()
156 generic->shifts = &generic_shift[en]; in define_generic_registers()
157 generic->masks = &generic_mask[en]; in define_generic_registers()
158 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
163 uint32_t en) in define_ddc_registers() argument
169 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
170 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
173 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
174 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
190 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_translate_dce120.c65 uint32_t *en) in offset_to_id() argument
103 *en = GPIO_HPD_1; in offset_to_id()
106 *en = GPIO_HPD_2; in offset_to_id()
109 *en = GPIO_HPD_3; in offset_to_id()
205 uint32_t en, in id_to_offset() argument
213 switch (en) { in id_to_offset()
245 switch (en) { in id_to_offset()
277 switch (en) { in id_to_offset()
306 switch (en) { in id_to_offset()
331 switch (en) { in id_to_offset()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
H A Dhw_translate_dcn30.c74 uint32_t *en) in offset_to_id() argument
112 *en = GPIO_HPD_1; in offset_to_id()
115 *en = GPIO_HPD_2; in offset_to_id()
118 *en = GPIO_HPD_3; in offset_to_id()
121 *en = GPIO_HPD_4; in offset_to_id()
199 uint32_t en, in id_to_offset() argument
207 switch (en) { in id_to_offset()
237 switch (en) { in id_to_offset()
267 switch (en) { in id_to_offset()
296 switch (en) { in id_to_offset()
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H A Dhw_factory_dcn30.c192 generic->regs = &generic_regs[en]; in define_generic_registers()
193 generic->shifts = &generic_shift[en]; in define_generic_registers()
194 generic->masks = &generic_mask[en]; in define_generic_registers()
195 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
200 uint32_t en) in define_ddc_registers() argument
206 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
210 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
218 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
219 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
227 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
H A Dhw_translate_dcn20.c69 uint32_t *en) in offset_to_id() argument
107 *en = GPIO_HPD_1; in offset_to_id()
110 *en = GPIO_HPD_2; in offset_to_id()
113 *en = GPIO_HPD_3; in offset_to_id()
116 *en = GPIO_HPD_4; in offset_to_id()
194 uint32_t en, in id_to_offset() argument
202 switch (en) { in id_to_offset()
232 switch (en) { in id_to_offset()
262 switch (en) { in id_to_offset()
291 switch (en) { in id_to_offset()
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H A Dhw_factory_dcn20.c183 uint32_t en) in define_ddc_registers() argument
189 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
193 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
201 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
202 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
210 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
213 hpd->base.regs = &hpd_regs[en].gpio; in define_hpd_registers()
220 generic->regs = &generic_regs[en]; in define_generic_registers()
221 generic->shifts = &generic_shift[en]; in define_generic_registers()
222 generic->masks = &generic_mask[en]; in define_generic_registers()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_translate_dcn315.c69 uint32_t *en) in offset_to_id() argument
107 *en = GPIO_HPD_1; in offset_to_id()
110 *en = GPIO_HPD_2; in offset_to_id()
113 *en = GPIO_HPD_3; in offset_to_id()
116 *en = GPIO_HPD_4; in offset_to_id()
191 uint32_t en, in id_to_offset() argument
199 switch (en) { in id_to_offset()
226 switch (en) { in id_to_offset()
253 switch (en) { in id_to_offset()
282 switch (en) { in id_to_offset()
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H A Dhw_factory_dcn315.c184 generic->regs = &generic_regs[en]; in define_generic_registers()
185 generic->shifts = &generic_shift[en]; in define_generic_registers()
186 generic->masks = &generic_mask[en]; in define_generic_registers()
187 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
192 uint32_t en) in define_ddc_registers() argument
198 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
202 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
210 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
211 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
219 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn32/
H A Dhw_translate_dcn32.c67 uint32_t *en) in offset_to_id() argument
102 *en = GPIO_HPD_1; in offset_to_id()
105 *en = GPIO_HPD_2; in offset_to_id()
108 *en = GPIO_HPD_3; in offset_to_id()
111 *en = GPIO_HPD_4; in offset_to_id()
172 uint32_t en, in id_to_offset() argument
180 switch (en) { in id_to_offset()
207 switch (en) { in id_to_offset()
234 switch (en) { in id_to_offset()
260 switch (en) { in id_to_offset()
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H A Dhw_factory_dcn32.c196 generic->regs = &generic_regs[en]; in define_generic_registers()
197 generic->shifts = &generic_shift[en]; in define_generic_registers()
198 generic->masks = &generic_mask[en]; in define_generic_registers()
199 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
204 uint32_t en) in define_ddc_registers() argument
210 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
214 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
222 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
223 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
231 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
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/openbmc/linux/net/netfilter/ipvs/
H A Dip_vs_lblc.c137 kfree(en); in ip_vs_lblc_rcu_free()
170 unsigned int hash = ip_vs_lblc_hashkey(en->af, &en->addr); in ip_vs_lblc_hash()
187 return en; in ip_vs_lblc_get()
204 if (en) { in ip_vs_lblc_new()
206 return en; in ip_vs_lblc_new()
209 en = kmalloc(sizeof(*en), GFP_ATOMIC); in ip_vs_lblc_new()
210 if (!en) in ip_vs_lblc_new()
213 en->af = af; in ip_vs_lblc_new()
218 en->dest = dest; in ip_vs_lblc_new()
222 return en; in ip_vs_lblc_new()
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H A Dip_vs_lblcr.c333 unsigned int hash = ip_vs_lblcr_hashkey(en->af, &en->addr); in ip_vs_lblcr_hash()
350 return en; in ip_vs_lblcr_get()
367 if (!en) { in ip_vs_lblcr_new()
368 en = kmalloc(sizeof(*en), GFP_ATOMIC); in ip_vs_lblcr_new()
369 if (!en) in ip_vs_lblcr_new()
372 en->af = af; in ip_vs_lblcr_new()
374 en->lastuse = jiffies; in ip_vs_lblcr_new()
383 return en; in ip_vs_lblcr_new()
388 return en; in ip_vs_lblcr_new()
406 ip_vs_lblcr_free(en); in ip_vs_lblcr_flush()
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/openbmc/linux/fs/f2fs/
H A Dextent_cache.c177 else if (fofs >= en->ei.fofs + en->ei.len) in __lookup_extent_node()
215 if (en && en->ei.fofs <= fofs && en->ei.fofs + en->ei.len > fofs) in __lookup_extent_node_ret()
226 } else if (fofs >= en->ei.fofs + en->ei.len) { in __lookup_extent_node_ret()
256 if (fofs == en->ei.fofs + en->ei.len - 1) { in __lookup_extent_node_ret()
277 if (!en) in __attach_extent_node()
478 if (!en) in __lookup_extent_tree()
524 if (en) in __try_merge_extent_node()
530 if (!en) in __try_merge_extent_node()
645 while (en && en->ei.fofs < end) { in __update_extent_tree_range()
657 en->ei.len = fofs - en->ei.fofs; in __update_extent_tree_range()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dgpio_service.c132 uint32_t en; in dal_gpio_service_create_irq() local
148 uint32_t en; in dal_gpio_service_create_generic_mux() local
179 uint32_t en) in dal_gpio_get_generic_pin_info() argument
240 uint32_t en) in is_pin_busy() argument
248 uint32_t en) in set_pin_busy() argument
256 uint32_t en) in set_pin_free() argument
264 uint32_t en) in dal_gpio_service_lock() argument
278 uint32_t en) in dal_gpio_service_unlock() argument
294 uint32_t en = gpio->en; in dal_gpio_service_open() local
428 uint32_t en) in dal_gpio_create_irq() argument
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H A Dhw_ddc.c95 if (hw_gpio->base.en != GPIO_DDC_LINE_VIP_PAD) { in set_config()
173 if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && in set_config()
174 (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { in set_config()
183 if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && in set_config()
184 (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { in set_config()
193 if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && in set_config()
221 uint32_t en, in dal_hw_ddc_construct() argument
224 dal_hw_gpio_construct(&ddc->base, id, en, ctx); in dal_hw_ddc_construct()
232 uint32_t en) in dal_hw_ddc_init() argument
234 if ((en < GPIO_DDC_LINE_MIN) || (en > GPIO_DDC_LINE_MAX)) { in dal_hw_ddc_init()
[all …]
H A Dgpio_base.c111 return dal_gpio_service_lock(gpio->service, gpio->id, gpio->en); in dal_gpio_lock_pin()
117 return dal_gpio_service_unlock(gpio->service, gpio->id, gpio->en); in dal_gpio_unlock_pin()
141 return gpio->en; in dal_gpio_get_enum()
161 gpio->id, gpio->en, pin_info) ? in dal_gpio_get_pin_info()
170 switch (gpio->en) { in dal_gpio_get_sync_source()
188 switch (gpio->en) { in dal_gpio_get_sync_source()
202 switch (gpio->en) { in dal_gpio_get_sync_source()
212 switch (gpio->en) { in dal_gpio_get_sync_source()
270 uint32_t en, in dal_gpio_create() argument
283 gpio->en = en; in dal_gpio_create()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dgpio.h42 uint32_t en; member
57 uint32_t en);
61 uint32_t en);
65 uint32_t en);
69 uint32_t en);
73 uint32_t en);
77 uint32_t en);
81 uint32_t en);
88 uint32_t *en);
91 uint32_t en,
/openbmc/linux/Documentation/translations/sp_SP/
H A Dindex.rst19 simplemente para aquellos que prefieran leer en el idioma español. Sin
20 embargo, tenga en cuenta que la *única* documentación oficial es la que
21 está en inglés: :ref:`linux_doc`
23 La propagación simultánea de la traducción de una modificación en
27 esté actualizada con las últimas modificaciones. Si lo que lee en una
28 traducción no se corresponde con lo que ve en el código fuente, informe
35 contenidos deberá ser realizada anteriormente en los documentos en inglés.
48 en inglés serán reemplazadas por las palabras correspondientes en español.
59 pero en caso de duda se puede consultar a los maintainers.
69 constante desarrollo. Las mejoras en la documentación siempre son
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