| /openbmc/linux/drivers/rtc/ |
| H A D | rtc-imxdi.c | 186 u32 dtcr; in di_report_tamper_info() local
188 dtcr = readl(imxdi->ioaddr + DTCR); in di_report_tamper_info()
194 dtcr & DTCR_VTE ? "" : "Spurious "); in di_report_tamper_info()
198 dtcr & DTCR_CTE ? "" : "Spurious "); in di_report_tamper_info()
202 dtcr & DTCR_TTE ? "" : "Spurious "); in di_report_tamper_info()
207 dtcr & DTCR_SAIE ? "" : "Spurious "); in di_report_tamper_info()
211 dtcr & DTCR_EBE ? "" : "Spurious "); in di_report_tamper_info()
215 dtcr & DTCR_ETAE ? "" : "Spurious "); in di_report_tamper_info()
219 dtcr & DTCR_ETBE ? "" : "Spurious "); in di_report_tamper_info()
223 dtcr & DTCR_WTE ? "" : "Spurious "); in di_report_tamper_info()
[all …]
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| /openbmc/u-boot/board/ti/ks2_evm/ |
| H A D | ddr3_k2g.c | 33 .dtcr = 0x710035C7ul,
73 .dtcr = 0x710035C7ul,
134 .dtcr = 0x710035C7ul,
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| H A D | ddr3_cfg.c | 31 .dtcr = 0x710035C7ul,
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| /openbmc/u-boot/arch/arm/mach-keystone/include/mach/ |
| H A D | ddr3.h | 31 unsigned int dtcr; member
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| /openbmc/u-boot/arch/arm/mach-sunxi/ |
| H A D | dram_sun50i_h6.c | 560 setbits_le32(&mctl_phy->dtcr[1], 0x30000); in mctl_channel_init()
562 clrsetbits_le32(&mctl_phy->dtcr[1], 0x30000, 0x10000); in mctl_channel_init()
564 clrbits_le32(&mctl_phy->dtcr[1], BIT(1)); in mctl_channel_init()
574 clrsetbits_le32(&mctl_phy->dtcr[0], 0xF0000000, 0x10000040); in mctl_channel_init()
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| H A D | dram_sun8i_a33.c | 185 clrsetbits_le32(&mctl_ctl->dtcr, 0x3 << 24, 0x3 << 24); in mctl_data_train_cfg()
187 clrsetbits_le32(&mctl_ctl->dtcr, 0x3 << 24, 0x1 << 24); in mctl_data_train_cfg()
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| H A D | dram_sun8i_a83t.c | 217 clrsetbits_le32(&mctl_ctl->dtcr, 0x3 << 24, 0x3 << 24); in mctl_data_train_cfg()
219 clrsetbits_le32(&mctl_ctl->dtcr, 0x3 << 24, 0x1 << 24); in mctl_data_train_cfg()
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| H A D | dram_sunxi_dw.c | 500 clrsetbits_le32(&mctl_ctl->dtcr, 0xf << 24, in mctl_channel_init()
532 clrsetbits_le32(&mctl_ctl->dtcr, 0xf << 24, 0x1 << 24); in mctl_channel_init()
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| H A D | dram_sun8i_a23.c | 138 writel(0x01000081, &mctl_phy->dtcr); in mctl_init()
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| H A D | dram_sun9i.c | 689 &mctl_phy->dtcr); in mctl_channel_init()
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| /openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | dram_sun8i_a33.h | 103 u32 dtcr; /* 0xc0 */ member
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| H A D | dram_sunxi_dw.h | 104 u32 dtcr; /* 0xc0 */ member
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| H A D | dram_sun8i_a83t.h | 103 u32 dtcr; /* 0xc0 */ member
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| H A D | dram_sun50i_h6.h | 191 u32 dtcr[2]; /* 0x200 */ member
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| H A D | dram_sun9i.h | 112 u32 dtcr; /* 0xb0 data training configuration register */ member
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| H A D | dram_sun8i_a23.h | 189 u32 dtcr; /* 0x68 */ member
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| /openbmc/u-boot/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 37 debug_ddr_cfg("dtcr 0x%08X\n", ptr->dtcr); in dump_phy_config()
358 spd_cb->phy_cfg.dtcr = (spd->rank == 2) ? 0x730035C7 : 0x710035C7; in init_ddr3param()
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| H A D | ddr3.c | 55 __raw_writel(phy_cfg->dtcr, base + KS2_DDRPHY_DTCR_OFFSET); in ddr3_init_ddrphy()
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | immap_83xx.h | 405 u32 dtcr; member
|