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Searched refs:dpcd (Results 1 – 25 of 54) sorted by relevance

123

/openbmc/linux/include/drm/display/
H A Ddrm_dp_helper.h56 const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
121 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_enhanced_frame_cap()
128 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_fast_training_cap()
135 return dpcd[DP_DPCD_REV] >= 0x12 && in drm_dp_tps3_supported()
142 return dpcd[DP_DPCD_REV] >= 0x11 || in drm_dp_max_downspread()
149 return dpcd[DP_DPCD_REV] >= 0x14 && in drm_dp_tps4_supported()
225 return dpcd[DP_EDP_CONFIGURATION_CAP] & in drm_dp_alternate_scrambler_reset_cap()
233 return dpcd[DP_DOWN_STREAM_PORT_COUNT] & in drm_dp_sink_can_do_video_without_timing_msa()
497 u8 dpcd[DP_RECEIVER_CAP_SIZE]);
510 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
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/openbmc/linux/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c326 rd_interval = dpcd[offset]; in __read_delay()
1013 if (!drm_dp_is_branch(dpcd) || dpcd[DP_DPCD_REV] == DP_DPCD_REV_10) in drm_dp_read_downstream_info()
1050 if (!drm_dp_is_branch(dpcd)) in drm_dp_downstream_max_dotclock()
1080 if (!drm_dp_is_branch(dpcd)) in drm_dp_downstream_max_tmds_clock()
1145 if (!drm_dp_is_branch(dpcd)) in drm_dp_downstream_min_tmds_clock()
1188 if (!drm_dp_is_branch(dpcd)) in drm_dp_downstream_max_bpc()
1243 if (!drm_dp_is_branch(dpcd)) in drm_dp_downstream_420_passthrough()
1274 if (!drm_dp_is_branch(dpcd)) in drm_dp_downstream_444_to_420_conversion()
1306 if (!drm_dp_is_branch(dpcd)) in drm_dp_downstream_rgb_to_ycbcr_conversion()
1342 if (!drm_dp_is_branch(dpcd)) in drm_dp_downstream_mode()
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/openbmc/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_dp.c42 return drm_dp_read_sink_count_cap(connector, outp->dp.dpcd, &outp->dp.desc); in nouveau_dp_has_sink_count()
54 u8 *dpcd = outp->dp.dpcd; in nouveau_dp_probe_dpcd() local
56 ret = drm_dp_read_dpcd_caps(aux, dpcd); in nouveau_dp_probe_dpcd()
60 ret = drm_dp_read_desc(aux, &outp->dp.desc, drm_dp_is_branch(dpcd)); in nouveau_dp_probe_dpcd()
67 mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd); in nouveau_dp_probe_dpcd()
85 ret = drm_dp_read_downstream_info(aux, dpcd, in nouveau_dp_probe_dpcd()
108 u8 *dpcd = nv_encoder->dp.dpcd; in nouveau_dp_detect() local
163 nv_encoder->dp.link_bw = 27000 * dpcd[DP_MAX_LINK_RATE]; in nouveau_dp_detect()
165 dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in nouveau_dp_detect()
167 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP && dpcd[DP_DPCD_REV] >= 0x13) { in nouveau_dp_detect()
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_dp.c253 const u8 dpcd[DP_DPCD_SIZE], in amdgpu_atombios_dp_get_dp_link_config()
260 unsigned max_link_rate = drm_dp_max_link_rate(dpcd); in amdgpu_atombios_dp_get_dp_link_config()
339 if (dig_connector->dpcd[DP_DPCD_REV] > 0x10) { in amdgpu_atombios_dp_ds_ports()
359 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in amdgpu_atombios_dp_get_dpcd()
362 dig_connector->dpcd); in amdgpu_atombios_dp_get_dpcd()
369 dig_connector->dpcd[0] = 0; in amdgpu_atombios_dp_get_dpcd()
481 if (dig_connector->dpcd[0] >= 0x11) { in amdgpu_atombios_dp_set_rx_power_state()
495 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
549 if (dp_info->dpcd[3] & 0x1) in amdgpu_atombios_dp_link_train_init()
561 if (drm_dp_enhanced_frame_cap(dp_info->dpcd)) in amdgpu_atombios_dp_link_train_init()
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/openbmc/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix-anx6345.c63 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
99 u8 dp_bw, dpcd[2]; in anx6345_dp_link_training() local
150 if (anx6345->dpcd[DP_DPCD_REV] >= 0x11) { in anx6345_dp_link_training()
158 dpcd[0] &= ~DP_SET_POWER_MASK; in anx6345_dp_link_training()
159 dpcd[0] |= DP_SET_POWER_D0; in anx6345_dp_link_training()
212 dpcd[0] = dp_bw; in anx6345_dp_link_training()
214 SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]); in anx6345_dp_link_training()
218 dpcd[1] = drm_dp_max_lane_count(anx6345->dpcd); in anx6345_dp_link_training()
221 SP_DP_LANE_COUNT_SET_REG, dpcd[1]); in anx6345_dp_link_training()
226 dpcd[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; in anx6345_dp_link_training()
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H A Danalogix-anx78xx.c83 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
606 u8 dp_bw, dpcd[2]; in anx78xx_dp_link_training() local
663 if (anx78xx->dpcd[DP_DPCD_REV] >= 0x11) { in anx78xx_dp_link_training()
671 dpcd[0] &= ~DP_SET_POWER_MASK; in anx78xx_dp_link_training()
672 dpcd[0] |= DP_SET_POWER_D0; in anx78xx_dp_link_training()
714 if (drm_dp_enhanced_frame_cap(anx78xx->dpcd)) in anx78xx_dp_link_training()
727 anx78xx->dpcd[DP_MAX_LINK_RATE]); in anx78xx_dp_link_training()
731 dpcd[1] = drm_dp_max_lane_count(anx78xx->dpcd); in anx78xx_dp_link_training()
733 if (drm_dp_enhanced_frame_cap(anx78xx->dpcd)) in anx78xx_dp_link_training()
734 dpcd[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; in anx78xx_dp_link_training()
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/openbmc/linux/drivers/gpu/drm/msm/dp/
H A Ddp_panel.c31 if (dp_panel->dpcd[DP_EDP_CONFIGURATION_CAP]) { in dp_panel_read_psr_cap()
51 u8 *dpcd, major = 0, minor = 0, temp; in dp_panel_read_dpcd() local
54 dpcd = dp_panel->dpcd; in dp_panel_read_dpcd()
60 dpcd, (DP_RECEIVER_CAP_SIZE + 1)); in dp_panel_read_dpcd()
71 temp = dpcd[DP_TRAINING_AUX_RD_INTERVAL]; in dp_panel_read_dpcd()
81 dpcd, (DP_RECEIVER_CAP_SIZE + 1)); in dp_panel_read_dpcd()
92 link_info->revision = dpcd[DP_DPCD_REV]; in dp_panel_read_dpcd()
111 if (drm_dp_enhanced_frame_cap(dpcd)) in dp_panel_read_dpcd()
114 dp_panel->dfp_present = dpcd[DP_DOWNSTREAMPORT_PRESENT]; in dp_panel_read_dpcd()
117 if (dp_panel->dfp_present && (dpcd[DP_DPCD_REV] > 0x10)) { in dp_panel_read_dpcd()
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H A Ddp_ctrl.c126 const u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_config_ctrl() local
132 if (drm_dp_alternate_scrambler_reset_cap(dpcd)) in dp_ctrl_config_ctrl()
144 if (drm_dp_enhanced_frame_cap(dpcd)) in dp_ctrl_config_ctrl()
1202 if (drm_dp_tps4_supported(ctrl->panel->dpcd)) { in dp_ctrl_link_train_2()
1245 const u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_link_train() local
1260 if (drm_dp_max_downspread(dpcd)) in dp_ctrl_link_train()
1266 if (drm_dp_alternate_scrambler_reset_cap(dpcd)) { in dp_ctrl_link_train()
1344 const u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_enable_mainlink_clocks() local
1348 opts_dp->ssc = drm_dp_max_downspread(dpcd); in dp_ctrl_enable_mainlink_clocks()
1473 const u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_use_fixed_nvid() local
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Ddp.c208 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] >= 0x14 && in nvkm_dp_train_eq()
212 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] >= 0x12 && in nvkm_dp_train_eq()
315 if (outp->dp.rate[rate].dpcd >= 0) { in nvkm_dp_train_link()
321 sink[0] |= outp->dp.rate[rate].dpcd; in nvkm_dp_train_link()
359 outp->dp.dpcd[DPCD_RC03] &= ~DPCD_RC03_TPS4_SUPPORTED; in nvkm_dp_train_links()
604 outp->dp.dpcd[DPCD_RC00_DPCD_REV] < 0x13 || in nvkm_dp_enable_supported_link_rates()
628 outp->dp.rate[j].dpcd = i / 2; in nvkm_dp_enable_supported_link_rates()
661 if (!(outp->dp.dpcd[DP_TRAINING_AUX_RD_INTERVAL] & in nvkm_dp_read_dpcd_caps()
678 memcpy(outp->dp.dpcd, dpcd_ext, sizeof(dpcd_ext)); in nvkm_dp_read_dpcd_caps()
749 rate_max = outp->dp.dpcd[DPCD_RC01_MAX_LINK_RATE]; in nvkm_dp_enable()
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H A Doutp.h46 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
49 int dpcd; /* -1, or index into SUPPORTED_LINK_RATES table */ member
H A Duoutp.c149 nvkm_uoutp_mthd_acquire_dp(struct nvkm_outp *outp, u8 dpcd[DP_RECEIVER_CAP_SIZE], in nvkm_uoutp_mthd_acquire_dp()
158 memcpy(outp->dp.dpcd, dpcd, sizeof(outp->dp.dpcd)); in nvkm_uoutp_mthd_acquire_dp()
236 ret = nvkm_uoutp_mthd_acquire_dp(outp, args->v0.dp.dpcd, in nvkm_uoutp_mthd_acquire()
/openbmc/linux/drivers/gpu/drm/radeon/
H A Datombios_dp.c307 const u8 dpcd[DP_DPCD_SIZE], in radeon_dp_get_dp_link_config()
313 unsigned max_link_rate = drm_dp_max_link_rate(dpcd); in radeon_dp_get_dp_link_config()
314 unsigned max_lane_num = drm_dp_max_lane_count(dpcd); in radeon_dp_get_dp_link_config()
396 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in radeon_dp_getdpcd()
399 dig_connector->dpcd); in radeon_dp_getdpcd()
406 dig_connector->dpcd[0] = 0; in radeon_dp_getdpcd()
529 if (dig_connector->dpcd[0] >= 0x11) { in radeon_dp_set_rx_power_state()
545 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
610 if (dp_info->dpcd[3] & 0x1) in radeon_dp_link_train_init()
622 if (drm_dp_enhanced_frame_cap(dp_info->dpcd)) in radeon_dp_link_train_init()
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/openbmc/linux/drivers/gpu/drm/tegra/
H A Ddp.c172 u8 dpcd[DP_RECEIVER_CAP_SIZE], value; in drm_dp_link_probe() local
178 err = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, sizeof(dpcd)); in drm_dp_link_probe()
182 link->revision = dpcd[DP_DPCD_REV]; in drm_dp_link_probe()
183 link->max_rate = drm_dp_max_link_rate(dpcd); in drm_dp_link_probe()
184 link->max_lanes = drm_dp_max_lane_count(dpcd); in drm_dp_link_probe()
186 link->caps.enhanced_framing = drm_dp_enhanced_frame_cap(dpcd); in drm_dp_link_probe()
187 link->caps.tps3_supported = drm_dp_tps3_supported(dpcd); in drm_dp_link_probe()
188 link->caps.fast_training = drm_dp_fast_training_cap(dpcd); in drm_dp_link_probe()
189 link->caps.channel_coding = drm_dp_channel_coding_supported(dpcd); in drm_dp_link_probe()
191 if (drm_dp_alternate_scrambler_reset_cap(dpcd)) { in drm_dp_link_probe()
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/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_link_training.c68 const u8 dpcd[DP_RECEIVER_CAP_SIZE], in intel_dp_read_lttpr_phy_caps()
84 const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in intel_dp_read_lttpr_common_caps()
136 if (!intel_dp_read_lttpr_common_caps(intel_dp, dpcd)) in intel_dp_init_lttpr_phys()
235 u8 dpcd[DP_RECEIVER_CAP_SIZE]; in intel_dp_init_lttpr_and_dprx_caps() local
240 if (drm_dp_read_dpcd_caps(&intel_dp->aux, dpcd)) in intel_dp_init_lttpr_and_dprx_caps()
243 lttpr_count = intel_dp_init_lttpr(intel_dp, dpcd); in intel_dp_init_lttpr_and_dprx_caps()
826 intel_dp->dpcd, dp_phy, in intel_dp_link_training_clock_recovery()
845 if (intel_dp->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) in intel_dp_link_training_clock_recovery()
927 drm_dp_tps4_supported(intel_dp->dpcd); in intel_dp_training_pattern()
945 drm_dp_tps3_supported(intel_dp->dpcd); in intel_dp_training_pattern()
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H A Dintel_dp.c897 if (!drm_dp_is_branch(intel_dp->dpcd)) in dfp_can_convert_from_rgb()
914 if (!drm_dp_is_branch(intel_dp->dpcd)) in dfp_can_convert_from_ycbcr444()
2435 drm_dp_is_branch(intel_dp->dpcd) && in downstream_hpd_needs_d0()
2564 if (intel_dp->dpcd[DP_DPCD_REV] == 0) in intel_dp_sync_state()
3136 drm_dp_is_branch(intel_dp->dpcd)); in intel_edp_init_dpcd()
3221 intel_dp->dpcd, in intel_dp_has_sink_count()
3999 intel_dp->dpcd[DP_DPCD_REV]); in intel_dp_process_phy_request()
4636 u8 *dpcd = intel_dp->dpcd; in intel_dp_detect_dpcd() local
4648 if (!drm_dp_is_branch(dpcd)) in intel_dp_detect_dpcd()
4987 intel_dp->dpcd, in intel_dp_detect()
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/openbmc/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c263 uint8_t dpcd[4]; member
326 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in cdv_intel_dp_max_lane_count()
1112 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in cdv_intel_dp_sink_dpms()
1672 sizeof (intel_dp->dpcd)) == sizeof (intel_dp->dpcd)) in cdv_dp_detect()
1674 if (intel_dp->dpcd[DP_DPCD_REV] != 0) in cdv_dp_detect()
1679 intel_dp->dpcd[0], intel_dp->dpcd[1], in cdv_dp_detect()
1680 intel_dp->dpcd[2], intel_dp->dpcd[3]); in cdv_dp_detect()
2069 intel_dp->dpcd, in cdv_intel_dp_init()
2070 sizeof(intel_dp->dpcd)); in cdv_intel_dp_init()
2080 intel_dp->dpcd[0], intel_dp->dpcd[1], in cdv_intel_dp_init()
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/openbmc/linux/drivers/gpu/drm/nouveau/nvif/
H A Doutp.c130 nvif_outp_acquire_dp(struct nvif_outp *outp, u8 dpcd[DP_RECEIVER_CAP_SIZE], in nvif_outp_acquire_dp()
140 memcpy(args.dp.dpcd, dpcd, sizeof(args.dp.dpcd)); in nvif_outp_acquire_dp()
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Ddisplay.c519 kfree(port->dpcd); in clean_virtual_dp_monitor()
520 port->dpcd = NULL; in clean_virtual_dp_monitor()
552 port->dpcd = kzalloc(sizeof(*(port->dpcd)), GFP_KERNEL); in setup_virtual_dp_monitor()
553 if (!port->dpcd) { in setup_virtual_dp_monitor()
562 memcpy(port->dpcd->data, dpcd_fix_data, DPCD_HEADER_SIZE); in setup_virtual_dp_monitor()
563 port->dpcd->data_valid = true; in setup_virtual_dp_monitor()
564 port->dpcd->data[DPCD_SINK_COUNT] = 0x1; in setup_virtual_dp_monitor()
H A Dhandlers.c1141 dpcd->data[DPCD_LANE_ALIGN_STATUS_UPDATED] |= in dp_aux_ch_ctl_link_training()
1147 dpcd->data[DPCD_SINK_STATUS] = DPCD_SINK_IN_SYNC; in dp_aux_ch_ctl_link_training()
1167 struct intel_vgpu_dpcd_data *dpcd = NULL; in dp_aux_ch_ctl_mmio_write() local
1196 dpcd = port->dpcd; in dp_aux_ch_ctl_mmio_write()
1245 if (dpcd && dpcd->data_valid) { in dp_aux_ch_ctl_mmio_write()
1249 dpcd->data[p] = buf[t]; in dp_aux_ch_ctl_mmio_write()
1252 dp_aux_ch_ctl_link_training(dpcd, in dp_aux_ch_ctl_mmio_write()
1260 dpcd && dpcd->data_valid); in dp_aux_ch_ctl_mmio_write()
1303 if (dpcd && dpcd->data_valid) { in dp_aux_ch_ctl_mmio_write()
1307 t = dpcd->data[addr + i - 1]; in dp_aux_ch_ctl_mmio_write()
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/openbmc/linux/drivers/gpu/drm/bridge/
H A Dite-it6505.c427 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
637 num, dpcd); in it6505_get_dpcd()
1459 if (it6505->dpcd[0] == 0) { in it6505_parse_link_capabilities()
1466 link->revision = it6505->dpcd[0]; in it6505_parse_link_capabilities()
2296 memset(it6505->dpcd, 0, sizeof(it6505->dpcd)); in it6505_process_hpd_irq()
2352 if (it6505->dpcd[0] == 0) { in it6505_irq_hpd()
2354 ARRAY_SIZE(it6505->dpcd)); in it6505_irq_hpd()
2384 memset(it6505->dpcd, 0, sizeof(it6505->dpcd)); in it6505_irq_hpd()
2700 memset(it6505->dpcd, 0, sizeof(it6505->dpcd)); in it6505_detect()
2760 memset(it6505->dpcd, 0, sizeof(it6505->dpcd)); in it6505_extcon_work()
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/openbmc/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c315 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
703 drm_dp_link_train_clock_recovery_delay(&dp->aux, dp->dpcd); in zynqmp_dp_link_train_cr()
751 if (dp->dpcd[DP_DPCD_REV] >= DP_V1_2 && in zynqmp_dp_link_train_ce()
752 dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED) in zynqmp_dp_link_train_ce()
768 drm_dp_link_train_channel_eq_delay(&dp->aux, dp->dpcd); in zynqmp_dp_link_train_ce()
802 enhanced = drm_dp_enhanced_frame_cap(dp->dpcd); in zynqmp_dp_train()
808 if (dp->dpcd[3] & 0x1) { in zynqmp_dp_train()
1540 ret = drm_dp_dpcd_read(&dp->aux, 0x0, dp->dpcd, in zynqmp_dp_bridge_detect()
1541 sizeof(dp->dpcd)); in zynqmp_dp_bridge_detect()
1548 drm_dp_max_link_rate(dp->dpcd), in zynqmp_dp_bridge_detect()
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/openbmc/linux/drivers/gpu/drm/nouveau/include/nvif/
H A Doutp.h25 int nvif_outp_acquire_dp(struct nvif_outp *outp, u8 dpcd[DP_RECEIVER_CAP_SIZE],
/openbmc/qemu/include/hw/display/
H A Dxlnx_dp.h109 DPCDState *dpcd; member
/openbmc/linux/Documentation/devicetree/bindings/display/exynos/
H A Dexynos_dp.txt67 -samsung,link-rate: deprecated prop that can reading from monitor by dpcd method.
68 -samsung,lane-count: deprecated prop that can reading from monitor by dpcd method.
/openbmc/linux/drivers/gpu/drm/rockchip/
H A Dcdn-dp-core.h103 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member

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