| /openbmc/u-boot/board/freescale/mpc8349itx/ |
| H A D | mpc8349itx.c | 35 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
37 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
56 debug("DDR:bar=0x%08x\n", im->sysconf.ddrlaw[0].bar); in fixed_sdram()
57 debug("DDR:ar=0x%08x\n", im->sysconf.ddrlaw[0].ar); in fixed_sdram()
132 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
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| /openbmc/u-boot/board/sbc8349/ |
| H A D | sbc8349.c | 48 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
82 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
83 im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); in fixed_sdram()
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| /openbmc/u-boot/arch/powerpc/cpu/mpc83xx/ |
| H A D | law.c | 14 law83xx_t *ecm = &immap->sysconf.ddrlaw[0]; in set_ddr_laws()
44 ecm = &immap->sysconf.ddrlaw[1]; in set_ddr_laws()
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| H A D | spd_sdram.c | 128 volatile law83xx_t *ecm = &immap->sysconf.ddrlaw[0]; in spd_sdram()
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| /openbmc/u-boot/board/mpc8308_p1m/ |
| H A D | sdram.c | 31 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
33 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
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| /openbmc/u-boot/board/gdsys/mpc8308/ |
| H A D | sdram.c | 36 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
38 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
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| /openbmc/u-boot/board/freescale/mpc8308rdb/ |
| H A D | sdram.c | 35 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
37 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
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| /openbmc/u-boot/board/freescale/mpc8349emds/ |
| H A D | mpc8349emds.c | 59 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
94 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
95 im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); in fixed_sdram()
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| /openbmc/u-boot/board/freescale/mpc8315erdb/ |
| H A D | sdram.c | 47 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
48 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
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| /openbmc/u-boot/board/freescale/mpc832xemds/ |
| H A D | mpc832xemds.c | 101 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
128 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
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| /openbmc/u-boot/board/freescale/mpc8313erdb/ |
| H A D | sdram.c | 50 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
51 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
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| /openbmc/u-boot/board/keymile/km83xx/ |
| H A D | km83xx.c | 296 out_be32(&im->sysconf.ddrlaw[0].ar, (LAWAR_EN | 0x1e)); in fixed_sdram()
323 out_be32(&im->sysconf.ddrlaw[0].ar, in fixed_sdram()
340 out_be32(&im->sysconf.ddrlaw[0].bar, in dram_init()
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| /openbmc/u-boot/board/freescale/mpc8323erdb/ |
| H A D | mpc8323erdb.c | 83 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
110 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
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| /openbmc/u-boot/board/freescale/mpc837xerdb/ |
| H A D | mpc837xerdb.c | 98 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
99 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
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| /openbmc/u-boot/board/ve8313/ |
| H A D | ve8313.c | 40 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
42 out_be32(&im->sysconf.ddrlaw[0].ar, (LBLAWAR_EN | (msize_log2 - 1))); in fixed_sdram()
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| /openbmc/u-boot/board/ids/ids8313/ |
| H A D | ids8313.c | 59 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
61 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
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| /openbmc/u-boot/board/tqc/tqm834x/ |
| H A D | tqm834x.c | 75 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE; in dram_init()
76 im->sysconf.ddrlaw[0].ar = (LAWAR_EN | LAWAR_SIZE_2G); in dram_init()
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| /openbmc/u-boot/board/freescale/mpc837xemds/ |
| H A D | mpc837xemds.c | 255 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
256 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
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| /openbmc/u-boot/board/esd/vme8349/ |
| H A D | vme8349.c | 41 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
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| /openbmc/u-boot/drivers/ram/ |
| H A D | mpc83xx_sdram.c | 153 out_be32(&im->sysconf.ddrlaw[cs].bar, mapaddr & 0xfffff000); in mpc83xx_sdram_static_init()
154 out_be32(&im->sysconf.ddrlaw[cs].ar, LBLAWAR_EN | (msize_log2 - 1)); in mpc83xx_sdram_static_init()
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | immap_83xx.h | 45 law83xx_t ddrlaw[2]; /* DDR local access window */ member
|