| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | hw_sequencer_private.h | 67 struct dce_hwseq;
110 void (*disable_vga)(struct dce_hwseq *hws);
116 void (*enable_power_gating_plane)(struct dce_hwseq *hws,
119 struct dce_hwseq *hws,
122 void (*dpp_pg_control)(struct dce_hwseq *hws,
125 void (*hubp_pg_control)(struct dce_hwseq *hws,
128 void (*dsc_pg_control)(struct dce_hwseq *hws,
131 bool (*dsc_pg_status)(struct dce_hwseq *hws,
145 void (*dccg_init)(struct dce_hwseq *hws);
154 void (*setup_hpo_hw_control)(const struct dce_hwseq *hws, bool enable);
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| H A D | hw_sequencer.h | 45 struct dce_hwseq;
207 void (*update_dchub)(struct dce_hwseq *hws,
295 int (*init_sys_ctx)(struct dce_hwseq *hws,
298 void (*init_vm_ctx)(struct dce_hwseq *hws,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_hwseq.h | 91 struct dce_hwseq *hws);
94 struct dce_hwseq *hws,
97 struct dce_hwseq *hws,
101 struct dce_hwseq *hws,
120 struct dce_hwseq *hws,
128 struct dce_hwseq *hws,
134 void dcn20_dccg_init(struct dce_hwseq *hws);
135 int dcn20_init_sys_ctx(struct dce_hwseq *hws,
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| H A D | dcn20_hwseq.c | 189 struct dce_hwseq *hws, in dcn20_enable_power_gating_plane()
238 void dcn20_dccg_init(struct dce_hwseq *hws) in dcn20_dccg_init()
263 struct dce_hwseq *hws) in dcn20_disable_vga()
290 struct dce_hwseq *hws = dc->hwseq; in dcn20_init_blank()
356 struct dce_hwseq *hws, in dcn20_dsc_pg_control()
433 struct dce_hwseq *hws, in dcn20_dpp_pg_control()
507 struct dce_hwseq *hws, in dcn20_hubp_pg_control()
585 struct dce_hwseq *hws = dc->hwseq; in dcn20_plane_atomic_disable()
676 struct dce_hwseq *hws = dc->hwseq; in dcn20_enable_stream_timing()
944 struct dce_hwseq *hws = dc->hwseq; in dcn20_set_input_transfer_func()
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| H A D | dcn20_resource.h | 71 struct dce_hwseq *dcn20_hwseq_create(
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_hwseq.h | 36 struct dce_hwseq *hws,
41 struct dce_hwseq *hws,
49 void dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
50 int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co…
57 void dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable);
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| H A D | dcn31_hwseq.c | 70 struct dce_hwseq *hws = dc->hwseq; in enable_memory_low_power()
111 struct dce_hwseq *hws = dc->hwseq; in dcn31_init_hw()
278 struct dce_hwseq *hws, in dcn31_dsc_pg_control()
342 struct dce_hwseq *hws, in dcn31_enable_power_gating_plane()
439 void dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn31_hubp_pg_control()
478 int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co… in dcn31_init_sys_ctx()
570 struct dce_hwseq *hws = dc->hwseq; in dcn31_reset_hw_ctx_wrap()
600 void dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable) in dcn31_setup_hpo_hw_control()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn303/ |
| H A D | dcn303_hwseq.h | 13 void dcn303_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on);
14 void dcn303_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
15 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
16 void dcn303_enable_power_gating_plane(struct dce_hwseq *hws, bool enable);
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| H A D | dcn303_hwseq.c | 27 void dcn303_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) in dcn303_dpp_pg_control()
32 void dcn303_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn303_hubp_pg_control()
37 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) in dcn303_dsc_pg_control()
42 void dcn303_enable_power_gating_plane(struct dce_hwseq *hws, bool enable) in dcn303_enable_power_gating_plane()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_hwseq.h | 36 void dcn314_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
38 void dcn314_enable_power_gating_plane(struct dce_hwseq *hws, bool enable);
44 void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context);
46 void dcn314_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on);
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| H A D | dcn314_hwseq.c | 238 struct dce_hwseq *hws, in dcn314_dsc_pg_control()
308 void dcn314_enable_power_gating_plane(struct dce_hwseq *hws, bool enable) in dcn314_enable_power_gating_plane()
393 void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context) in dcn314_resync_fifo_dccg_dio()
422 void dcn314_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on) in dcn314_dpp_root_clock_control()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_hwseq.c | 40 void dce_enable_fe_clock(struct dce_hwseq *hws, in dce_enable_fe_clock()
53 struct dce_hwseq *hws = dc->hwseq; in dce_pipe_control_lock()
97 void dce_set_blender_mode(struct dce_hwseq *hws, in dce_set_blender_mode()
138 static void dce_disable_sram_shut_down(struct dce_hwseq *hws) in dce_disable_sram_shut_down()
145 static void dce_underlay_clock_enable(struct dce_hwseq *hws) in dce_underlay_clock_enable()
163 void dce_clock_gating_power_up(struct dce_hwseq *hws, in dce_clock_gating_power_up()
175 void dce_crtc_switch_to_clk_src(struct dce_hwseq *hws, in dce_crtc_switch_to_clk_src()
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| H A D | Makefile | 29 DCE = dce_audio.o dce_stream_encoder.o dce_link_encoder.o dce_hwseq.o \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_hwseq.h | 34 struct dce_hwseq *hws,
39 struct dce_hwseq *hws,
42 void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
78 void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context);
105 struct dce_hwseq *hws,
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| H A D | dcn32_hwseq.c | 69 struct dce_hwseq *hws, in dcn32_dsc_pg_control()
131 struct dce_hwseq *hws, in dcn32_enable_power_gating_plane()
160 void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn32_hubp_pg_control()
524 struct dce_hwseq *hws = dc->hwseq; in dcn32_set_input_transfer_func()
711 struct dce_hwseq *hws = dc->hwseq; in dcn32_program_mall_pipe_config()
769 struct dce_hwseq *hws = dc->hwseq; in dcn32_init_hw()
1201 void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context) in dcn32_resync_fifo_dccg_dio()
1237 struct dce_hwseq *hws = link->dc->hwseq; in dcn32_unblank_stream()
1409 struct dce_hwseq *hws, in dcn32_dsc_pg_status()
1444 struct dce_hwseq *hws = dc->hwseq; in dcn32_update_dsc_pg()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/ |
| H A D | dcn302_hwseq.h | 31 void dcn302_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on);
32 void dcn302_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
33 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
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| H A D | dcn302_hwseq.c | 45 void dcn302_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) in dcn302_dpp_pg_control()
102 void dcn302_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn302_hubp_pg_control()
159 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) in dcn302_dsc_pg_control()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer.h | 87 struct dce_hwseq *hws,
91 struct dce_hwseq *hws,
95 struct dce_hwseq *hws,
99 struct dce_hwseq *hws);
112 void dcn10_update_dchub(struct dce_hwseq *hws, struct dchub_init_data *dh_data);
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| H A D | dcn10_hw_sequencer.c | 129 struct dce_hwseq *hws = dc->hwseq; in log_mpc_crc()
554 struct dce_hwseq *hws, in dcn10_enable_power_gating_plane()
576 struct dce_hwseq *hws) in dcn10_disable_vga()
618 struct dce_hwseq *hws, in dcn10_dpp_pg_control()
679 struct dce_hwseq *hws, in dcn10_hubp_pg_control()
731 struct dce_hwseq *hws, in power_on_plane_resources()
758 struct dce_hwseq *hws = dc->hwseq; in undo_DEGVIDCN10_253_wa()
778 struct dce_hwseq *hws = dc->hwseq; in apply_DEGVIDCN10_253_wa()
808 struct dce_hwseq *hws = dc->hwseq; in dcn10_bios_golden_init()
1183 struct dce_hwseq *hws = dc->hwseq; in dcn10_plane_atomic_disconnect()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_hwseq.c | 85 static bool gpu_addr_to_uma(struct dce_hwseq *hwseq, in gpu_addr_to_uma()
104 static void plane_address_in_gpu_space_to_uma(struct dce_hwseq *hwseq, in plane_address_in_gpu_space_to_uma()
135 struct dce_hwseq *hws = dc->hwseq; in dcn201_update_plane_addr()
165 struct dce_hwseq *hws = dc->hwseq; in dcn201_init_blank()
199 static void read_mmhub_vm_setup(struct dce_hwseq *hws) in read_mmhub_vm_setup()
224 struct dce_hwseq *hws = dc->hwseq; in dcn201_init_hw()
374 struct dce_hwseq *hws = dc->hwseq; in dcn201_plane_atomic_disconnect()
526 struct dce_hwseq *hws = dc->hwseq; in dcn201_pipe_control_lock()
593 struct dce_hwseq *hws = link->dc->hwseq; in dcn201_unblank_stream()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| H A D | dce120_hw_sequencer.c | 194 struct dce_hwseq *hws, in dce120_update_dchub()
250 bool dce121_xgmi_enabled(struct dce_hwseq *hws) in dce121_xgmi_enabled()
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| H A D | dce120_hw_sequencer.h | 34 bool dce121_xgmi_enabled(struct dce_hwseq *hws);
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| H A D | dce120_resource.c | 802 static struct dce_hwseq *dce120_hwseq_create( in dce120_hwseq_create()
805 struct dce_hwseq *hws = kzalloc(sizeof(struct dce_hwseq), GFP_KERNEL); in dce120_hwseq_create()
816 static struct dce_hwseq *dce121_hwseq_create( in dce121_hwseq_create()
819 struct dce_hwseq *hws = kzalloc(sizeof(struct dce_hwseq), GFP_KERNEL); in dce121_hwseq_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_hwseq.c | 53 struct dce_hwseq *hws) in mmhub_update_page_table_config()
67 int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co… in dcn21_init_sys_ctx()
90 struct dce_hwseq *hws = dc->hwseq; in dcn21_s0i3_golden_init_wa()
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| H A D | dcn21_hwseq.h | 33 int dcn21_init_sys_ctx(struct dce_hwseq *hws,
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