| /openbmc/u-boot/arch/arm/mach-omap2/am33xx/ |
| H A D | ti816x_emif4.c | 101 writel(data->datawdsratio0, (DDRPHY_CONFIG_BASE + 0x0DC)); in ddr3_sw_levelling()
102 writel(data->datawdsratio0, (DDRPHY_CONFIG_BASE + 0x180)); in ddr3_sw_levelling()
103 writel(data->datawdsratio0, (DDRPHY_CONFIG_BASE + 0x224)); in ddr3_sw_levelling()
104 writel(data->datawdsratio0, (DDRPHY_CONFIG_BASE + 0x2C8)); in ddr3_sw_levelling()
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| H A D | chilisom.c | 68 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
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| H A D | ddr.c | 360 writel(data->datawdsratio0, in config_ddr_data()
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| /openbmc/u-boot/board/phytec/pcm051/ |
| H A D | board.c | 63 .datawdsratio0 = MT41J256M8HX15E_WR_DQS,
106 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
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| /openbmc/u-boot/board/isee/igep003x/ |
| H A D | board.c | 70 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
77 .datawdsratio0 = K4B2G1646EBIH9_WR_DQS,
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| /openbmc/u-boot/board/compulab/cm_t335/ |
| H A D | spl.c | 32 .datawdsratio0 = MT41J128MJT125_WR_DQS,
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| /openbmc/u-boot/board/ti/am335x/ |
| H A D | board.c | 128 .datawdsratio0 = MT41J128MJT125_WR_DQS,
135 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
142 .datawdsratio0 = MT41J512M8RH125_WR_DQS,
149 .datawdsratio0 = MT41J128MJT125_WR_DQS_400MHz,
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| /openbmc/u-boot/board/ti/ti816x/ |
| H A D | evm.c | 115 .datawdsratio0 = ((WR_DQS<<10) | (WR_DQS<<0)),
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| /openbmc/u-boot/board/ti/ti814x/ |
| H A D | evm.c | 72 .datawdsratio0 = ((0x20<<10) | (0x20<<0)),
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| /openbmc/u-boot/board/BuR/brppt1/ |
| H A D | board.c | 41 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
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| /openbmc/u-boot/board/silica/pengwyn/ |
| H A D | board.c | 29 .datawdsratio0 = MT41K128MJT187E_WR_DQS,
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| /openbmc/u-boot/board/gumstix/pepper/ |
| H A D | board.c | 39 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
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| /openbmc/u-boot/board/BuR/brxre1/ |
| H A D | board.c | 75 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
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| /openbmc/u-boot/arch/arm/include/asm/arch-am33xx/ |
| H A D | ddr_defs.h | 301 unsigned long datawdsratio0; member
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| /openbmc/u-boot/board/tcl/sl50/ |
| H A D | board.c | 43 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
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| /openbmc/u-boot/board/birdland/bav335x/ |
| H A D | board.c | 129 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
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| /openbmc/u-boot/board/bosch/shc/ |
| H A D | board.c | 397 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
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| /openbmc/u-boot/board/siemens/draco/ |
| H A D | board.c | 227 draco_ddr3_data.datawdsratio0 = settings.ddr3.dt0wdsratio0; in board_init_ddr()
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| /openbmc/u-boot/board/siemens/rut/ |
| H A D | board.c | 60 .datawdsratio0 = 0x85, in board_init_ddr()
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| /openbmc/u-boot/board/siemens/pxm2/ |
| H A D | board.c | 56 .datawdsratio0 = 0, in board_init_ddr()
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| /openbmc/u-boot/board/vscom/baltos/ |
| H A D | board.c | 128 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
|