| /openbmc/qemu/hw/intc/ |
| H A D | arm_gicv3_redist.c | 17 static uint32_t mask_group(GICv3CPUState *cs, MemTxAttrs attrs) in mask_group() argument
24 if (!attrs.secure && !(cs->gic->gicd_ctlr & GICD_CTLR_DS)) { in mask_group()
26 return cs->gicr_igroupr0; in mask_group()
31 static int gicr_ns_access(GICv3CPUState *cs, int irq) in gicr_ns_access() argument
35 return extract32(cs->gicr_nsacr, irq * 2, 2); in gicr_ns_access()
38 static void gicr_write_bitmap_reg(GICv3CPUState *cs, MemTxAttrs attrs, in gicr_write_bitmap_reg() argument
42 val &= mask_group(cs, attrs); in gicr_write_bitmap_reg()
44 gicv3_redist_update(cs); in gicr_write_bitmap_reg()
47 static void gicr_write_set_bitmap_reg(GICv3CPUState *cs, MemTxAttrs attrs, in gicr_write_set_bitmap_reg() argument
51 val &= mask_group(cs, attrs); in gicr_write_set_bitmap_reg()
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| H A D | arm_gicv3_cpuif.c | 51 static inline int icv_min_vbpr(GICv3CPUState *cs) in icv_min_vbpr() argument
53 return 7 - cs->vprebits; in icv_min_vbpr()
56 static inline int ich_num_aprs(GICv3CPUState *cs) in ich_num_aprs() argument
59 int aprmax = 1 << (cs->vprebits - 5); in ich_num_aprs()
60 assert(aprmax <= ARRAY_SIZE(cs->ich_apr[0])); in ich_num_aprs()
108 static int read_vbpr(GICv3CPUState *cs, int grp) in read_vbpr() argument
114 return extract64(cs->ich_vmcr_el2, ICH_VMCR_EL2_VBPR0_SHIFT, in read_vbpr()
117 return extract64(cs->ich_vmcr_el2, ICH_VMCR_EL2_VBPR1_SHIFT, in read_vbpr()
122 static void write_vbpr(GICv3CPUState *cs, int grp, int value) in write_vbpr() argument
127 int min = icv_min_vbpr(cs); in write_vbpr()
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| H A D | arm_gicv3.c | 24 static bool irqbetter(GICv3CPUState *cs, int irq, uint8_t prio, bool nmi) in irqbetter() argument
33 if (prio != cs->hppi.prio) { in irqbetter()
34 return prio < cs->hppi.prio; in irqbetter()
41 if (nmi != cs->hppi.nmi) { in irqbetter()
49 if (irq <= cs->hppi.irq) { in irqbetter()
101 static uint32_t gicr_int_pending(GICv3CPUState *cs) in gicr_int_pending() argument
116 pend = cs->gicr_ipendr0 | (~cs->edge_trigger & cs->level); in gicr_int_pending()
117 pend &= cs->gicr_ienabler0; in gicr_int_pending()
118 pend &= ~cs->gicr_iactiver0; in gicr_int_pending()
120 if (cs->gic->gicd_ctlr & GICD_CTLR_DS) { in gicr_int_pending()
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| H A D | arm_gicv3_common.c | 37 static void gicv3_gicd_no_migration_shift_bug_post_load(GICv3State *cs) in gicv3_gicd_no_migration_shift_bug_post_load() argument
39 if (cs->gicd_no_migration_shift_bug) { in gicv3_gicd_no_migration_shift_bug_post_load()
50 memmove(cs->group, (uint8_t *)cs->group + GIC_INTERNAL / 8, in gicv3_gicd_no_migration_shift_bug_post_load()
51 sizeof(cs->group) - GIC_INTERNAL / 8); in gicv3_gicd_no_migration_shift_bug_post_load()
52 memmove(cs->grpmod, (uint8_t *)cs->grpmod + GIC_INTERNAL / 8, in gicv3_gicd_no_migration_shift_bug_post_load()
53 sizeof(cs->grpmod) - GIC_INTERNAL / 8); in gicv3_gicd_no_migration_shift_bug_post_load()
54 memmove(cs->enabled, (uint8_t *)cs->enabled + GIC_INTERNAL / 8, in gicv3_gicd_no_migration_shift_bug_post_load()
55 sizeof(cs->enabled) - GIC_INTERNAL / 8); in gicv3_gicd_no_migration_shift_bug_post_load()
56 memmove(cs->pending, (uint8_t *)cs->pending + GIC_INTERNAL / 8, in gicv3_gicd_no_migration_shift_bug_post_load()
57 sizeof(cs->pending) - GIC_INTERNAL / 8); in gicv3_gicd_no_migration_shift_bug_post_load()
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| /openbmc/qemu/target/i386/hvf/ |
| H A D | x86hvf.c | 35 void hvf_set_segment(CPUState *cs, struct vmx_segment *vmx_seg, in hvf_set_segment() argument
42 if (!qseg->selector && !x86_is_real(cs) && !is_tr) { in hvf_set_segment()
73 void hvf_put_xsave(CPUState *cs) in hvf_put_xsave() argument
75 void *xsave = X86_CPU(cs)->env.xsave_buf; in hvf_put_xsave()
76 uint32_t xsave_len = X86_CPU(cs)->env.xsave_buf_len; in hvf_put_xsave()
78 x86_cpu_xsave_all_areas(X86_CPU(cs), xsave, xsave_len); in hvf_put_xsave()
80 if (hv_vcpu_write_fpstate(cs->accel->fd, xsave, xsave_len)) { in hvf_put_xsave()
85 static void hvf_put_segments(CPUState *cs) in hvf_put_segments() argument
87 CPUX86State *env = &X86_CPU(cs)->env; in hvf_put_segments()
90 wvmcs(cs->accel->fd, VMCS_GUEST_IDTR_LIMIT, env->idt.limit); in hvf_put_segments()
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| /openbmc/qemu/target/i386/tcg/system/ |
| H A D | smm_helper.c | 38 CPUState *cs = CPU(cpu); in do_smm_enter() local
60 x86_stw_phys(cs, sm_state + offset, dt->selector); in do_smm_enter()
61 x86_stw_phys(cs, sm_state + offset + 2, (dt->flags >> 8) & 0xf0ff); in do_smm_enter()
62 x86_stl_phys(cs, sm_state + offset + 4, dt->limit); in do_smm_enter()
63 x86_stq_phys(cs, sm_state + offset + 8, dt->base); in do_smm_enter()
66 x86_stq_phys(cs, sm_state + 0x7e68, env->gdt.base); in do_smm_enter()
67 x86_stl_phys(cs, sm_state + 0x7e64, env->gdt.limit); in do_smm_enter()
69 x86_stw_phys(cs, sm_state + 0x7e70, env->ldt.selector); in do_smm_enter()
70 x86_stq_phys(cs, sm_state + 0x7e78, env->ldt.base); in do_smm_enter()
71 x86_stl_phys(cs, sm_state + 0x7e74, env->ldt.limit); in do_smm_enter()
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| /openbmc/qemu/target/loongarch/kvm/ |
| H A D | kvm.c | 38 static int kvm_get_stealtime(CPUState *cs) in kvm_get_stealtime() argument
40 CPULoongArchState *env = cpu_env(cs); in kvm_get_stealtime()
48 err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr); in kvm_get_stealtime()
53 err = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, attr); in kvm_get_stealtime()
62 static int kvm_set_stealtime(CPUState *cs) in kvm_set_stealtime() argument
64 CPULoongArchState *env = cpu_env(cs); in kvm_set_stealtime()
72 err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr); in kvm_set_stealtime()
77 err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr); in kvm_set_stealtime()
87 static int kvm_set_pv_features(CPUState *cs) in kvm_set_pv_features() argument
89 CPULoongArchState *env = cpu_env(cs); in kvm_set_pv_features()
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| /openbmc/qemu/semihosting/ |
| H A D | syscalls.c | 26 static int validate_strlen(CPUState *cs, target_ulong str, target_ulong tlen) in validate_strlen() argument
28 CPUArchState *env G_GNUC_UNUSED = cpu_env(cs); in validate_strlen()
54 static int validate_lock_user_string(char **pstr, CPUState *cs, in validate_lock_user_string() argument
57 int ret = validate_strlen(cs, tstr, tlen); in validate_lock_user_string()
58 CPUArchState *env G_GNUC_UNUSED = cpu_env(cs); in validate_lock_user_string()
75 static int copy_stat_to_user(CPUState *cs, target_ulong addr, in copy_stat_to_user() argument
78 CPUArchState *env G_GNUC_UNUSED = cpu_env(cs); in copy_stat_to_user()
121 static void gdb_open_cb(CPUState *cs, uint64_t ret, int err) in gdb_open_cb() argument
128 gdb_open_complete(cs, ret, err); in gdb_open_cb()
131 static void gdb_open(CPUState *cs, gdb_syscall_complete_cb complete, in gdb_open() argument
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| H A D | arm-compat-semi.c | 143 static LayoutInfo common_semi_find_bases(CPUState *cs) in common_semi_find_bases() argument
150 fv = address_space_to_flatview(cs->as); in common_semi_find_bases()
215 static inline uint32_t get_swi_errno(CPUState *cs) in get_swi_errno() argument
218 TaskState *ts = get_task_state(cs); in get_swi_errno()
226 static void common_semi_cb(CPUState *cs, uint64_t ret, int err) in common_semi_cb() argument
230 TaskState *ts = get_task_state(cs); in common_semi_cb()
236 common_semi_set_ret(cs, ret); in common_semi_cb()
243 static void common_semi_dead_cb(CPUState *cs, uint64_t ret, int err) in common_semi_dead_cb() argument
245 common_semi_set_ret(cs, 0xdeadbeef); in common_semi_dead_cb()
252 static void common_semi_rw_cb(CPUState *cs, uint64_t ret, int err) in common_semi_rw_cb() argument
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| /openbmc/u-boot/board/freescale/corenet_ds/ |
| H A D | p4080ds_ddr.c | 78 .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS,
79 .cs[1].bnds = CONFIG_SYS_DDR_CS1_BNDS,
80 .cs[2].bnds = CONFIG_SYS_DDR_CS2_BNDS,
81 .cs[3].bnds = CONFIG_SYS_DDR_CS3_BNDS,
82 .cs[0].config = CONFIG_SYS_DDR_CS0_CONFIG,
83 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
84 .cs[1].config = CONFIG_SYS_DDR_CS1_CONFIG,
85 .cs[2].config = CONFIG_SYS_DDR_CS2_CONFIG,
86 .cs[3].config = CONFIG_SYS_DDR_CS3_CONFIG,
110 .cs[0].bnds = CONFIG_SYS_DDR2_CS0_BNDS,
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| /openbmc/qemu/linux-user/ppc/ |
| H A D | cpu_loop.c | 70 CPUState *cs = env_cpu(env); in cpu_loop() local
77 cpu_exec_start(cs); in cpu_loop()
78 trapnr = cpu_exec(cs); in cpu_loop()
79 cpu_exec_end(cs); in cpu_loop()
80 process_queued_cpu_work(cs); in cpu_loop()
88 cpu_abort(cs, "Critical interrupt while in user mode. " in cpu_loop()
92 cpu_abort(cs, "Machine check exception while in user mode. " in cpu_loop()
102 cpu_abort(cs, "External interrupt while in user mode. " in cpu_loop()
188 cpu_abort(cs, "Unknown program exception (%02x)\n", in cpu_loop()
202 cpu_abort(cs, "Syscall exception while in user mode. " in cpu_loop()
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| /openbmc/qemu/target/mips/ |
| H A D | kvm.c | 42 unsigned long kvm_arch_vcpu_id(CPUState *cs) in kvm_arch_vcpu_id() argument
44 return cs->cpu_index; in kvm_arch_vcpu_id()
69 int kvm_arch_init_vcpu(CPUState *cs) in kvm_arch_init_vcpu() argument
71 CPUMIPSState *env = cpu_env(cs); in kvm_arch_init_vcpu()
74 qemu_add_vm_change_state_handler(kvm_mips_update_state, cs); in kvm_arch_init_vcpu()
77 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_MIPS_FPU, 0, 0); in kvm_arch_init_vcpu()
86 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_MIPS_MSA, 0, 0); in kvm_arch_init_vcpu()
98 int kvm_arch_destroy_vcpu(CPUState *cs) in kvm_arch_destroy_vcpu() argument
119 int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) in kvm_arch_insert_sw_breakpoint() argument
125 int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) in kvm_arch_remove_sw_breakpoint() argument
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| /openbmc/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_write_leveling.c | 46 static int ddr3_write_leveling_single_cs(u32 cs, u32 freq, int ratio_2to1,
66 u32 reg, phase, delay, cs, pup; in ddr3_write_leveling_hw() local
106 for (cs = 0; cs < MAX_CS; cs++) { in ddr3_write_leveling_hw()
107 if (dram_info->cs_ena & (1 << cs)) { in ddr3_write_leveling_hw()
115 ddr3_read_pup_reg(PUP_WL_MODE, cs, in ddr3_write_leveling_hw()
121 dram_info->wl_val[cs][pup][P] = phase; in ddr3_write_leveling_hw()
122 dram_info->wl_val[cs][pup][D] = delay; in ddr3_write_leveling_hw()
123 dram_info->wl_val[cs][pup][S] = in ddr3_write_leveling_hw()
127 cs, pup); in ddr3_write_leveling_hw()
128 dram_info->wl_val[cs][pup][DQS] = in ddr3_write_leveling_hw()
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| H A D | ddr3_read_leveling.c | 44 static int ddr3_read_leveling_single_cs_rl_mode(u32 cs, u32 freq,
48 static int ddr3_read_leveling_single_cs_window_mode(u32 cs, u32 freq,
91 u32 delay, phase, pup, cs; in ddr3_read_leveling_hw() local
97 for (cs = 0; cs < MAX_CS; cs++) { in ddr3_read_leveling_hw()
98 if (dram_info->cs_ena & (1 << cs)) { in ddr3_read_leveling_hw()
106 ddr3_read_pup_reg(PUP_RL_MODE, cs, in ddr3_read_leveling_hw()
111 dram_info->rl_val[cs][pup][P] = phase; in ddr3_read_leveling_hw()
116 dram_info->rl_val[cs][pup][D] = delay; in ddr3_read_leveling_hw()
117 dram_info->rl_val[cs][pup][S] = in ddr3_read_leveling_hw()
121 cs, pup); in ddr3_read_leveling_hw()
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| /openbmc/u-boot/arch/arm/mach-omap2/omap3/ |
| H A D | sdrc.c | 40 if (readl(&sdrc_base->cs[CS0].mr) == SDRC_MR_0_SDR) in is_mem_sdr()
68 u32 get_sdr_cs_size(u32 cs) in get_sdr_cs_size() argument
73 size = readl(&sdrc_base->cs[cs].mcfg) >> 8; in get_sdr_cs_size()
83 u32 get_sdr_cs_offset(u32 cs) in get_sdr_cs_offset() argument
87 if (!cs) in get_sdr_cs_offset()
101 static void write_sdrc_timings(u32 cs, struct sdrc_actim *sdrc_actim_base, in write_sdrc_timings() argument
105 writel(timings->mcfg, &sdrc_base->cs[cs].mcfg); in write_sdrc_timings()
108 writel(timings->rfr_ctrl, &sdrc_base->cs[cs].rfr_ctrl); in write_sdrc_timings()
109 writel(CMD_NOP, &sdrc_base->cs[cs].manual); in write_sdrc_timings()
110 writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual); in write_sdrc_timings()
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| /openbmc/qemu/target/s390x/ |
| H A D | gdbstub.c | 31 int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) in s390_cpu_gdb_read_register() argument
33 CPUS390XState *env = cpu_env(cs); in s390_cpu_gdb_read_register()
46 int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) in s390_cpu_gdb_write_register() argument
48 CPUS390XState *env = cpu_env(cs); in s390_cpu_gdb_write_register()
71 static int cpu_read_ac_reg(CPUState *cs, GByteArray *buf, int n) in cpu_read_ac_reg() argument
73 S390CPU *cpu = S390_CPU(cs); in cpu_read_ac_reg()
84 static int cpu_write_ac_reg(CPUState *cs, uint8_t *mem_buf, int n) in cpu_write_ac_reg() argument
86 S390CPU *cpu = S390_CPU(cs); in cpu_write_ac_reg()
104 static int cpu_read_fp_reg(CPUState *cs, GByteArray *buf, int n) in cpu_read_fp_reg() argument
106 S390CPU *cpu = S390_CPU(cs); in cpu_read_fp_reg()
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| /openbmc/qemu/qga/ |
| H A D | guest-agent-command-state.c | 26 void ga_command_state_add(GACommandState *cs, in ga_command_state_add() argument
33 cs->groups = g_slist_append(cs->groups, cg); in ga_command_state_add()
46 void ga_command_state_init_all(GACommandState *cs) in ga_command_state_init_all() argument
48 g_assert(cs); in ga_command_state_init_all()
49 g_slist_foreach(cs->groups, ga_command_group_init, NULL); in ga_command_state_init_all()
62 void ga_command_state_cleanup_all(GACommandState *cs) in ga_command_state_cleanup_all() argument
64 g_assert(cs); in ga_command_state_cleanup_all()
65 g_slist_foreach(cs->groups, ga_command_group_cleanup, NULL); in ga_command_state_cleanup_all()
70 GACommandState *cs = g_new0(GACommandState, 1); in ga_command_state_new() local
71 cs->groups = NULL; in ga_command_state_new()
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| /openbmc/qemu/target/i386/kvm/ |
| H A D | xen-emu.c | 48 static int vcpuop_stop_singleshot_timer(CPUState *cs);
56 static bool kvm_gva_to_gpa(CPUState *cs, uint64_t gva, uint64_t *gpa, in kvm_gva_to_gpa() argument
67 if (kvm_vcpu_ioctl(cs, KVM_TRANSLATE, &tr) || !tr.valid || in kvm_gva_to_gpa()
75 static int kvm_gva_rw(CPUState *cs, uint64_t gva, void *_buf, size_t sz, in kvm_gva_rw() argument
83 if (!kvm_gva_to_gpa(cs, gva, &gpa, &len, is_write)) { in kvm_gva_rw()
100 static inline int kvm_copy_from_gva(CPUState *cs, uint64_t gva, void *buf, in kvm_copy_from_gva() argument
103 return kvm_gva_rw(cs, gva, buf, sz, false); in kvm_copy_from_gva()
106 static inline int kvm_copy_to_gva(CPUState *cs, uint64_t gva, void *buf, in kvm_copy_to_gva() argument
109 return kvm_gva_rw(cs, gva, buf, sz, true); in kvm_copy_to_gva()
189 int kvm_xen_init_vcpu(CPUState *cs) in kvm_xen_init_vcpu() argument
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| /openbmc/qemu/hw/ssi/ |
| H A D | bcm2835_spi.c | 37 if (s->cs & BCM2835_SPI_CS_INTD && s->cs & BCM2835_SPI_CS_DONE) { in bcm2835_spi_update_int()
41 if (s->cs & BCM2835_SPI_CS_INTR && s->cs & BCM2835_SPI_CS_RXR) { in bcm2835_spi_update_int()
51 s->cs |= BCM2835_SPI_CS_RXD; in bcm2835_spi_update_rx_flags()
53 s->cs &= ~BCM2835_SPI_CS_RXD; in bcm2835_spi_update_rx_flags()
58 s->cs |= BCM2835_SPI_CS_RXF; in bcm2835_spi_update_rx_flags()
60 s->cs &= ~BCM2835_SPI_CS_RXF; in bcm2835_spi_update_rx_flags()
65 s->cs |= BCM2835_SPI_CS_RXR; in bcm2835_spi_update_rx_flags()
67 s->cs &= ~BCM2835_SPI_CS_RXR; in bcm2835_spi_update_rx_flags()
75 s->cs &= ~BCM2835_SPI_CS_TXD; in bcm2835_spi_update_tx_flags()
77 s->cs |= BCM2835_SPI_CS_TXD; in bcm2835_spi_update_tx_flags()
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| /openbmc/qemu/target/riscv/ |
| H A D | gdbstub.c | 50 int riscv_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) in riscv_cpu_gdb_read_register() argument
52 RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cs); in riscv_cpu_gdb_read_register()
53 RISCVCPU *cpu = RISCV_CPU(cs); in riscv_cpu_gdb_read_register()
77 int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) in riscv_cpu_gdb_write_register() argument
79 RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cs); in riscv_cpu_gdb_write_register()
80 RISCVCPU *cpu = RISCV_CPU(cs); in riscv_cpu_gdb_write_register()
111 static int riscv_gdb_get_fpu(CPUState *cs, GByteArray *buf, int n) in riscv_gdb_get_fpu() argument
113 RISCVCPU *cpu = RISCV_CPU(cs); in riscv_gdb_get_fpu()
127 static int riscv_gdb_set_fpu(CPUState *cs, uint8_t *mem_buf, int n) in riscv_gdb_set_fpu() argument
129 RISCVCPU *cpu = RISCV_CPU(cs); in riscv_gdb_set_fpu()
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| /openbmc/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_regs.h | 118 #define CS_STRUCT_OFFS(cs) (CS_STRUCT_BASE + (cs) * 4) argument
121 #define CS_SIZE_OFFS(cs) (CS_SIZE_BASE + (cs) * 4) argument
124 #define CS_SIZE_HIGH_OFFS(cs) (CS_SIZE_HIGH_BASE + (cs)) argument
135 #define SDRAM_OP_CMD_CS_OFFS(cs) (SDRAM_OP_CMD_CS_BASE + (cs)) argument
231 #define RD_SMPL_DLY_CS_OFFS(cs) (RD_SMPL_DLY_CS_BASE + (cs) * 8) argument
236 #define RD_RDY_DLY_CS_OFFS(cs) (RD_RDY_DLY_CS_BASE + (cs) * 8) argument
268 #define CS_EXIST_OFFS(cs) (CS_EXIST_BASE + (cs)) argument
389 #define WL_PHY_REG(cs) (WL_PHY_BASE + (cs) * 0x4) argument
401 #define CTX_PHY_REG(cs) (CTX_PHY_BASE + (cs) * 0x4) argument
404 #define RL_PHY_REG(cs) (RL_PHY_BASE + (cs) * 0x4) argument
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| /openbmc/qemu/target/arm/ |
| H A D | gdbstub.c | 31 CPUState *cs; member
42 int arm_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) in arm_cpu_gdb_read_register() argument
44 ARMCPU *cpu = ARM_CPU(cs); in arm_cpu_gdb_read_register()
49 return aarch64_cpu_gdb_read_register(cs, mem_buf, n); in arm_cpu_gdb_read_register()
69 int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) in arm_cpu_gdb_write_register() argument
71 ARMCPU *cpu = ARM_CPU(cs); in arm_cpu_gdb_write_register()
77 return aarch64_cpu_gdb_write_register(cs, mem_buf, n); in arm_cpu_gdb_write_register()
122 static int vfp_gdb_get_reg(CPUState *cs, GByteArray *buf, int reg) in vfp_gdb_get_reg() argument
124 ARMCPU *cpu = ARM_CPU(cs); in vfp_gdb_get_reg()
147 static int vfp_gdb_set_reg(CPUState *cs, uint8_t *buf, int reg) in vfp_gdb_set_reg() argument
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| /openbmc/qemu/target/avr/ |
| H A D | helper.c | 32 bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) in avr_cpu_exec_interrupt() argument
34 CPUAVRState *env = cpu_env(cs); in avr_cpu_exec_interrupt()
47 cs->exception_index = EXCP_RESET; in avr_cpu_exec_interrupt()
48 avr_cpu_do_interrupt(cs); in avr_cpu_exec_interrupt()
50 cs->interrupt_request &= ~CPU_INTERRUPT_RESET; in avr_cpu_exec_interrupt()
57 cs->exception_index = EXCP_INT(index); in avr_cpu_exec_interrupt()
58 avr_cpu_do_interrupt(cs); in avr_cpu_exec_interrupt()
62 cs->interrupt_request &= ~CPU_INTERRUPT_HARD; in avr_cpu_exec_interrupt()
75 void avr_cpu_do_interrupt(CPUState *cs) in avr_cpu_do_interrupt() argument
77 CPUAVRState *env = cpu_env(cs); in avr_cpu_do_interrupt()
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| /openbmc/qemu/target/loongarch/ |
| H A D | gdbstub.c | 34 int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) in loongarch_cpu_gdb_read_register() argument
36 CPULoongArchState *env = cpu_env(cs); in loongarch_cpu_gdb_read_register()
62 int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) in loongarch_cpu_gdb_write_register() argument
64 CPULoongArchState *env = cpu_env(cs); in loongarch_cpu_gdb_write_register()
88 static int loongarch_gdb_get_fpu(CPUState *cs, GByteArray *mem_buf, int n) in loongarch_gdb_get_fpu() argument
90 LoongArchCPU *cpu = LOONGARCH_CPU(cs); in loongarch_gdb_get_fpu()
103 static int loongarch_gdb_set_fpu(CPUState *cs, uint8_t *mem_buf, int n) in loongarch_gdb_set_fpu() argument
105 LoongArchCPU *cpu = LOONGARCH_CPU(cs); in loongarch_gdb_set_fpu()
125 static int loongarch_gdb_get_vec(CPUState *cs, GByteArray *mem_buf, int n, int vl) in loongarch_gdb_get_vec() argument
127 LoongArchCPU *cpu = LOONGARCH_CPU(cs); in loongarch_gdb_get_vec()
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| /openbmc/qemu/include/semihosting/ |
| H A D | syscalls.h | 26 void semihost_sys_open(CPUState *cs, gdb_syscall_complete_cb complete,
30 void semihost_sys_close(CPUState *cs, gdb_syscall_complete_cb complete,
33 void semihost_sys_read(CPUState *cs, gdb_syscall_complete_cb complete,
36 void semihost_sys_read_gf(CPUState *cs, gdb_syscall_complete_cb complete,
39 void semihost_sys_write(CPUState *cs, gdb_syscall_complete_cb complete,
42 void semihost_sys_write_gf(CPUState *cs, gdb_syscall_complete_cb complete,
45 void semihost_sys_lseek(CPUState *cs, gdb_syscall_complete_cb complete,
48 void semihost_sys_isatty(CPUState *cs, gdb_syscall_complete_cb complete,
51 void semihost_sys_flen(CPUState *cs, gdb_syscall_complete_cb fstat_cb,
55 void semihost_sys_fstat(CPUState *cs, gdb_syscall_complete_cb complete,
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