/openbmc/linux/tools/testing/selftests/powerpc/math/ |
H A D | fpu_asm.S | 13 fcmpu cr1,f0,f14 14 bne cr1,1f 16 fcmpu cr1,f0,f15 17 bne cr1,1f 19 fcmpu cr1,f0,f16 20 bne cr1,1f 22 fcmpu cr1,f0,f17 23 bne cr1,1f 25 fcmpu cr1,f0,f18 26 bne cr1,1f [all …]
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/openbmc/u-boot/drivers/spi/ |
H A D | sh_spi.c | 51 while (sh_spi_read(&ss->regs->cr1) & SH_SPI_RBE) { in recvbuf_wait() 61 while (!(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBE)) { in write_fifo_empty_wait() 97 sh_spi_write(0xfe, &ss->regs->cr1); in spi_setup_slave() 99 sh_spi_write(0x00, &ss->regs->cr1); in spi_setup_slave() 129 sh_spi_write(sh_spi_read(&ss->regs->cr1) & in spi_release_bus() 130 ~(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD), &ss->regs->cr1); in spi_release_bus() 140 sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); in sh_spi_send() 147 !(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBF); in sh_spi_send() 169 sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1); in sh_spi_send() 170 sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); in sh_spi_send() [all …]
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/openbmc/linux/drivers/spi/ |
H A D | spi-sh.c | 76 unsigned long cr1; member 185 ss->cr1 &= ~SPI_SH_TBE; in spi_sh_send() 188 ss->cr1 & SPI_SH_TBE, in spi_sh_send() 190 if (ret == 0 && !(ss->cr1 & SPI_SH_TBE)) { in spi_sh_send() 201 ss->cr1 &= ~SPI_SH_TBE; in spi_sh_send() 204 ss->cr1 & SPI_SH_TBE, in spi_sh_send() 206 if (ret == 0 && (ss->cr1 & SPI_SH_TBE)) { in spi_sh_send() 237 ss->cr1 &= ~SPI_SH_RBF; in spi_sh_receive() 240 ss->cr1 & SPI_SH_RBF, in spi_sh_receive() 360 unsigned long cr1; in spi_sh_irq() local [all …]
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/openbmc/qemu/tests/qtest/ |
H A D | stm32l4x5_usart-test.c | 175 uint32_t cr1; in init_uart() local 191 cr1 = qtest_readl(qts, (USART1_BASE_ADDR + A_CR1)); in init_uart() 192 cr1 &= ~(R_CR1_M1_MASK | R_CR1_M0_MASK | R_CR1_OVER8_MASK | R_CR1_PCE_MASK); in init_uart() 193 qtest_writel(qts, (USART1_BASE_ADDR + A_CR1), cr1); in init_uart() 197 cr1 | R_CR1_UE_MASK | R_CR1_RE_MASK | R_CR1_TE_MASK); in init_uart() 215 uint32_t cr1; in test_receive_char() local 227 cr1 = qtest_readl(qts, (USART1_BASE_ADDR + A_CR1)); in test_receive_char() 228 cr1 |= R_CR1_RXNEIE_MASK; in test_receive_char() 229 qtest_writel(qts, USART1_BASE_ADDR + A_CR1, cr1); in test_receive_char() 245 uint32_t cr1; in test_send_char() local [all …]
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/openbmc/linux/drivers/counter/ |
H A D | stm32-timer-cnt.c | 25 u32 cr1; member 103 u32 cr1, sms; in stm32_count_function_write() local 123 regmap_read(priv->regmap, TIM_CR1, &cr1); in stm32_count_function_write() 133 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, cr1); in stm32_count_function_write() 143 u32 cr1; in stm32_count_direction_read() local 145 regmap_read(priv->regmap, TIM_CR1, &cr1); in stm32_count_direction_read() 146 *direction = (cr1 & TIM_CR1_DIR) ? COUNTER_COUNT_DIRECTION_BACKWARD : in stm32_count_direction_read() 184 u32 cr1; in stm32_count_enable_read() local 186 regmap_read(priv->regmap, TIM_CR1, &cr1); in stm32_count_enable_read() 188 *enable = cr1 & TIM_CR1_CEN; in stm32_count_enable_read() [all …]
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/openbmc/qemu/hw/char/ |
H A D | stm32l4x5_usart.c | 159 if (s->cr1 & R_CR1_TE_MASK) { in stm32l4x5_update_isr() 165 if (s->cr1 & R_CR1_RE_MASK) { in stm32l4x5_update_isr() 175 ((s->isr & R_ISR_CMF_MASK) && (s->cr1 & R_CR1_CMIE_MASK)) || in stm32l4x5_update_irq() 176 ((s->isr & R_ISR_ABRF_MASK) && (s->cr1 & R_CR1_RXNEIE_MASK)) || in stm32l4x5_update_irq() 177 ((s->isr & R_ISR_EOBF_MASK) && (s->cr1 & R_CR1_EOBIE_MASK)) || in stm32l4x5_update_irq() 178 ((s->isr & R_ISR_RTOF_MASK) && (s->cr1 & R_CR1_RTOIE_MASK)) || in stm32l4x5_update_irq() 181 ((s->isr & R_ISR_TXE_MASK) && (s->cr1 & R_CR1_TXEIE_MASK)) || in stm32l4x5_update_irq() 182 ((s->isr & R_ISR_TC_MASK) && (s->cr1 & R_CR1_TCIE_MASK)) || in stm32l4x5_update_irq() 183 ((s->isr & R_ISR_RXNE_MASK) && (s->cr1 & R_CR1_RXNEIE_MASK)) || in stm32l4x5_update_irq() 184 ((s->isr & R_ISR_IDLE_MASK) && (s->cr1 & R_CR1_IDLEIE_MASK)) || in stm32l4x5_update_irq() [all …]
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/openbmc/u-boot/arch/arm/cpu/armv7/stv0991/ |
H A D | timer.c | 34 writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1); in timer_init() 37 writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD, in timer_init() 38 &gpt1_regs_ptr->cr1); in timer_init() 44 writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN, in timer_init() 45 &gpt1_regs_ptr->cr1); in timer_init()
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/openbmc/linux/drivers/tty/serial/ |
H A D | stm32-usart.c | 46 .cr1 = 0x0c, 63 .cr1 = 0x00, 85 .cr1 = 0x00, 181 static void stm32_usart_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE, in stm32_usart_config_reg_rs485() argument 189 over8 = *cr1 & USART_CR1_OVER8; in stm32_usart_config_reg_rs485() 191 *cr1 &= ~(USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK); in stm32_usart_config_reg_rs485() 203 *cr1 |= rs485_deat_dedt; in stm32_usart_config_reg_rs485() 215 *cr1 |= rs485_deat_dedt; in stm32_usart_config_reg_rs485() 224 u32 usartdiv, baud, cr1, cr3; in stm32_usart_config_rs485() local 227 stm32_usart_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); in stm32_usart_config_rs485() [all …]
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H A D | fsl_linflexuart.c | 316 unsigned long cr, ier, cr1; in linflex_setup_watermark() local 330 cr1 = LINFLEXD_LINCR1_BF | LINFLEXD_LINCR1_MME in linflex_setup_watermark() 332 writel(cr1, sport->membase + LINCR1); in linflex_setup_watermark() 356 cr1 &= ~(LINFLEXD_LINCR1_INIT); in linflex_setup_watermark() 358 writel(cr1, sport->membase + LINCR1); in linflex_setup_watermark() 406 unsigned long cr, old_cr, cr1; in linflex_set_termios() local 413 cr1 = readl(port->membase + LINCR1); in linflex_set_termios() 414 cr1 |= LINFLEXD_LINCR1_INIT; in linflex_set_termios() 415 writel(cr1, port->membase + LINCR1); in linflex_set_termios() 506 cr1 &= ~(LINFLEXD_LINCR1_INIT); in linflex_set_termios() [all …]
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/openbmc/linux/arch/powerpc/kernel/vdso/ |
H A D | getcpu.S | 23 PPC_LCMPI cr1,r4,0 30 beqlr cr1 39 cmpwi cr1, r4, 0 45 beqlr cr1
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/openbmc/linux/drivers/i2c/busses/ |
H A D | i2c-stm32f4.c | 489 u32 cr1; in stm32f4_i2c_handle_rx_addr() local 506 cr1 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR1); in stm32f4_i2c_handle_rx_addr() 507 cr1 &= ~(STM32F4_I2C_CR1_ACK | STM32F4_I2C_CR1_POS); in stm32f4_i2c_handle_rx_addr() 508 writel_relaxed(cr1, i2c_dev->base + STM32F4_I2C_CR1); in stm32f4_i2c_handle_rx_addr() 513 cr1 |= STM32F4_I2C_CR1_STOP; in stm32f4_i2c_handle_rx_addr() 515 cr1 |= STM32F4_I2C_CR1_START; in stm32f4_i2c_handle_rx_addr() 516 writel_relaxed(cr1, i2c_dev->base + STM32F4_I2C_CR1); in stm32f4_i2c_handle_rx_addr() 526 cr1 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR1); in stm32f4_i2c_handle_rx_addr() 527 cr1 &= ~STM32F4_I2C_CR1_ACK; in stm32f4_i2c_handle_rx_addr() 528 cr1 |= STM32F4_I2C_CR1_POS; in stm32f4_i2c_handle_rx_addr() [all …]
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H A D | i2c-stm32f7.c | 193 u32 cr1; member 870 u32 cr1, cr2; in stm32f7_i2c_xfer_msg() local 881 cr1 = readl_relaxed(base + STM32F7_I2C_CR1); in stm32f7_i2c_xfer_msg() 910 cr1 |= STM32F7_I2C_CR1_ERRIE | STM32F7_I2C_CR1_TCIE | in stm32f7_i2c_xfer_msg() 914 cr1 &= ~(STM32F7_I2C_CR1_RXIE | STM32F7_I2C_CR1_TXIE | in stm32f7_i2c_xfer_msg() 934 cr1 |= STM32F7_I2C_CR1_RXIE; in stm32f7_i2c_xfer_msg() 936 cr1 |= STM32F7_I2C_CR1_TXIE; in stm32f7_i2c_xfer_msg() 939 cr1 |= STM32F7_I2C_CR1_RXDMAEN; in stm32f7_i2c_xfer_msg() 941 cr1 |= STM32F7_I2C_CR1_TXDMAEN; in stm32f7_i2c_xfer_msg() 945 cr1 &= ~STM32F7_I2C_ALL_IRQ_MASK; /* Disable all interrupts */ in stm32f7_i2c_xfer_msg() [all …]
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/openbmc/linux/arch/powerpc/kernel/ |
H A D | head_8xx.S | 332 cmpwi cr1, r11, RPN_PATTERN 333 beq- cr1, FixupDAR /* must be a buggy dcbX, icbi insn. */ 359 cmplwi cr1, r11, (.Ldtlbie - PAGE_OFFSET)@l 361 cror 4*cr1+eq, 4*cr1+eq, 4*cr7+eq 362 bne cr1, 1f 407 cmpli cr1, r11, TASK_SIZE@h 409 blt+ cr1, 3f 431 cmpwi cr1, r10, 2028 /* Is dcbz? */ 432 beq+ cr1, 142f 433 cmpwi cr1, r10, 940 /* Is dcbi? */ [all …]
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H A D | cpu_setup_6xx.S | 215 cmpwi cr1,r10,9 217 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq 363 cmplwi cr1,r3,0x000c /* 7400 */ 371 cror 4*cr1+eq,4*cr1+eq,4*cr2+eq 375 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq 384 beq cr1,1f 434 cmplwi cr1,r3,0x000c /* 7400 */ 442 cror 4*cr1+eq,4*cr1+eq,4*cr2+eq 446 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq 465 1: beq cr1,2f
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/openbmc/linux/sound/soc/stm/ |
H A D | stm32_sai_sub.c | 338 int ret, cr1, mask; in stm32_sai_set_clk_div() local 346 cr1 = SAI_XCR1_MCKDIV_SET(div); in stm32_sai_set_clk_div() 347 ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, mask, cr1); in stm32_sai_set_clk_div() 646 int cr1, frcr = 0; in stm32_sai_set_dai_fmt() local 653 cr1 = SAI_XCR1_NODIV; in stm32_sai_set_dai_fmt() 658 cr1 |= SAI_XCR1_PRTCFG_SET(SAI_SPDIF_PROTOCOL); in stm32_sai_set_dai_fmt() 662 cr1 |= SAI_XCR1_PRTCFG_SET(SAI_FREE_PROTOCOL); in stm32_sai_set_dai_fmt() 667 cr1 |= SAI_XCR1_CKSTR; in stm32_sai_set_dai_fmt() 699 cr1 ^= SAI_XCR1_CKSTR; in stm32_sai_set_dai_fmt() 706 cr1 ^= SAI_XCR1_CKSTR; in stm32_sai_set_dai_fmt() [all …]
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/openbmc/linux/tools/testing/selftests/powerpc/stringloops/ |
H A D | memcmp_64.S | 48 cmpwi cr1,r3,0; \ 102 cmpdi cr1,r5,0 115 beq cr1,.Lzero 287 cmpld cr1,rC,rD 301 bne cr1,.LcmpCD 312 cmpld cr1,rC,rD 328 bne cr1,.LcmpCD 336 cmpld cr1,rC,rD 345 bne cr1,.LcmpCD 361 cmpld cr1,rC,rD [all …]
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H A D | memcmp_32.S | 29 cmplwi cr1, r3, 2 30 blt- cr1, 4f 35 beqlr cr1
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/openbmc/linux/arch/powerpc/lib/ |
H A D | memcmp_64.S | 48 cmpwi cr1,r3,0; \ 102 cmpdi cr1,r5,0 115 beq cr1,.Lzero 287 cmpld cr1,rC,rD 301 bne cr1,.LcmpCD 312 cmpld cr1,rC,rD 328 bne cr1,.LcmpCD 336 cmpld cr1,rC,rD 345 bne cr1,.LcmpCD 361 cmpld cr1,rC,rD [all …]
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H A D | memcmp_32.S | 29 cmplwi cr1, r3, 2 30 blt- cr1, 4f 35 beqlr cr1
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H A D | memcpy_64.S | 42 cmpldi cr1,r5,16 46 blt cr1,.Lshort_copy 75 blt cr1,3f 162 cmpwi cr1,r5,8 165 ble cr1,6f 188 cmpldi cr1,r5,16
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/openbmc/u-boot/drivers/timer/ |
H A D | stm32_timer.c | 26 u32 cr1; member 92 clrbits_le32(®s->cr1, CR1_CEN); in stm32_timer_probe() 105 setbits_le32(®s->cr1, CR1_ARPE); in stm32_timer_probe() 111 setbits_le32(®s->cr1, CR1_CEN); in stm32_timer_probe()
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/openbmc/qemu/hw/ssi/ |
H A D | pl022.c | 79 if ((s->cr1 & PL022_CR1_SSE) == 0) { in pl022_xfer() 103 if (s->cr1 & PL022_CR1_LBM) { in pl022_xfer() 131 return s->cr1; in pl022_read() 174 s->cr1 = value; in pl022_write() 175 if ((s->cr1 & (PL022_CR1_MS | PL022_CR1_SSE)) in pl022_write() 254 VMSTATE_UINT32(cr1, PL022State),
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/openbmc/linux/arch/s390/lib/ |
H A D | uaccess.c | 19 unsigned long cr1, cr7; in debug_user_asce() local 21 __ctl_store(cr1, 1, 1); in debug_user_asce() 23 if (cr1 == S390_lowcore.kernel_asce && cr7 == S390_lowcore.user_asce) in debug_user_asce() 28 exit ? "exit" : "entry", cr1, cr7, in debug_user_asce()
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/openbmc/linux/tools/testing/selftests/powerpc/copyloops/ |
H A D | memcpy_64.S | 42 cmpldi cr1,r5,16 46 blt cr1,.Lshort_copy 75 blt cr1,3f 162 cmpwi cr1,r5,8 165 ble cr1,6f 188 cmpldi cr1,r5,16
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/openbmc/linux/drivers/input/touchscreen/ |
H A D | mc13783_ts.c | 71 int cr0, cr1; in mc13783_ts_report_sample() local 84 cr1 = (priv->sample[3] >> 12) & 0xfff; in mc13783_ts_report_sample() 88 x0, x1, x2, y0, y1, y2, cr0, cr1); in mc13783_ts_report_sample() 93 cr0 = (cr0 + cr1) / 2; in mc13783_ts_report_sample()
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