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Searched refs:cpsr (Results 1 – 25 of 57) sorted by relevance

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/openbmc/linux/arch/arm/probes/
H A Ddecode.c86 return cpsr & PSR_Z_BIT; in __check_eq()
96 return cpsr & PSR_C_BIT; in __check_cs()
106 return cpsr & PSR_N_BIT; in __check_mi()
116 return cpsr & PSR_V_BIT; in __check_vs()
126 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ in __check_hi()
127 return cpsr & PSR_C_BIT; in __check_hi()
132 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ in __check_ls()
138 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_ge()
144 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_lt()
150 unsigned long temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_gt()
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H A Ddecode-thumb.h17 #define in_it_block(cpsr) ((cpsr & 0x06000c00) != 0x00000000) argument
24 #define current_cond(cpsr) ((cpsr >> 12) & 0xf) argument
H A Ddecode.h41 long cpsr = regs->ARM_cpsr; in bx_write_pc() local
43 cpsr |= PSR_T_BIT; in bx_write_pc()
46 cpsr &= ~PSR_T_BIT; in bx_write_pc()
49 regs->ARM_cpsr = cpsr; in bx_write_pc()
/openbmc/linux/arch/arm64/kvm/hyp/
H A Daarch32.c49 unsigned long cpsr; in kvm_condition_valid32() local
76 cpsr = *vcpu_cpsr(vcpu); in kvm_condition_valid32()
82 it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3); in kvm_condition_valid32()
92 cpsr_cond = cpsr >> 28; in kvm_condition_valid32()
119 cond = (cpsr & 0xe000) >> 13; in kvm_adjust_itstate()
120 itbits = (cpsr & 0x1c00) >> (10 - 2); in kvm_adjust_itstate()
129 cpsr &= ~PSR_AA32_IT_MASK; in kvm_adjust_itstate()
130 cpsr |= cond << 13; in kvm_adjust_itstate()
131 cpsr |= (itbits & 0x1c) << (10 - 2); in kvm_adjust_itstate()
132 cpsr |= (itbits & 0x3) << 25; in kvm_adjust_itstate()
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/openbmc/linux/arch/arm/probes/kprobes/
H A Dactions-arm.c170 unsigned long cpsr = regs->ARM_cpsr; in emulate_rd12rn16rm0rs8_rwflags() local
176 : "=r" (rdv), [cpsr] "=r" (cpsr) in emulate_rd12rn16rm0rs8_rwflags()
178 "1" (cpsr), [fn] "r" (asi->insn_fn) in emulate_rd12rn16rm0rs8_rwflags()
200 unsigned long cpsr = regs->ARM_cpsr; in emulate_rd12rn16rm0_rwflags_nopc() local
206 : "=r" (rdv), [cpsr] "=r" (cpsr) in emulate_rd12rn16rm0_rwflags_nopc()
208 "1" (cpsr), [fn] "r" (asi->insn_fn) in emulate_rd12rn16rm0_rwflags_nopc()
230 unsigned long cpsr = regs->ARM_cpsr; in emulate_rd16rn12rm0rs8_rwflags_nopc() local
236 : "=r" (rdv), [cpsr] "=r" (cpsr) in emulate_rd16rn12rm0rs8_rwflags_nopc()
238 "1" (cpsr), [fn] "r" (asi->insn_fn) in emulate_rd16rn12rm0rs8_rwflags_nopc()
280 unsigned long cpsr = regs->ARM_cpsr; in emulate_rdlo12rdhi16rn0rm8_rwflags_nopc() local
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H A Dactions-thumb.c221 unsigned long cpsr = regs->ARM_cpsr; in t32_emulate_rd8rn16rm0_rwflags() local
227 : "=r" (rdv), [cpsr] "=r" (cpsr) in t32_emulate_rd8rn16rm0_rwflags()
388 unsigned long cpsr = regs->ARM_cpsr; in t16_simulate_it() local
389 cpsr &= ~PSR_IT_MASK; in t16_simulate_it()
390 cpsr |= (insn & 0xfc) << 8; in t16_simulate_it()
391 cpsr |= (insn & 0x03) << 25; in t16_simulate_it()
392 regs->ARM_cpsr = cpsr; in t16_simulate_it()
478 if (!in_it_block(cpsr)) in t16_emulate_loregs_noitrwflags()
479 regs->ARM_cpsr = cpsr; in t16_emulate_loregs_noitrwflags()
492 unsigned long cpsr = regs->ARM_cpsr; in t16_emulate_hiregs() local
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H A Dtest-core.c1023 unsigned long cpsr; in test_context_cpsr() local
1064 cpsr |= cond_base << 13; /* ITSTATE<7:5> */ in test_context_cpsr()
1065 cpsr |= (mask & 0x1) << 12; /* ITSTATE<4> */ in test_context_cpsr()
1066 cpsr |= (mask & 0x2) << 10; /* ITSTATE<3> */ in test_context_cpsr()
1067 cpsr |= (mask & 0x4) << 8; /* ITSTATE<2> */ in test_context_cpsr()
1071 probe_should_run = test_check_cc((cpsr >> 12) & 0xf, cpsr) != 0; in test_context_cpsr()
1077 cpsr = 0x00000800; in test_context_cpsr()
1081 cpsr = 0xf0007800; in test_context_cpsr()
1085 cpsr = 0x00009800; in test_context_cpsr()
1088 cpsr = 0xf0002800; in test_context_cpsr()
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/openbmc/linux/drivers/firmware/efi/libstub/
H A Darm32-stub.c14 static void get_cpu_state(u32 *cpsr, u32 *sctlr) in get_cpu_state() argument
16 asm("mrs %0, cpsr" : "=r"(*cpsr)); in get_cpu_state()
17 if ((*cpsr & MODE_MASK) == HYP_MODE) in get_cpu_state()
26 u32 cpsr, sctlr; in check_platform_features() local
29 get_cpu_state(&cpsr, &sctlr); in check_platform_features()
32 ((cpsr & MODE_MASK) == HYP_MODE) ? "HYP" : "SVC", in check_platform_features()
43 efi_entry_state->cpsr_before_ebs = cpsr; in check_platform_features()
/openbmc/linux/arch/arm/include/asm/
H A Dptrace.h178 static inline unsigned long it_advance(unsigned long cpsr) in it_advance() argument
180 if ((cpsr & 0x06000400) == 0) { in it_advance()
182 cpsr &= ~PSR_IT_MASK; in it_advance()
186 unsigned long it = cpsr & mask; in it_advance()
190 cpsr &= ~mask; in it_advance()
191 cpsr |= it; in it_advance()
193 return cpsr; in it_advance()
/openbmc/qemu/linux-user/arm/
H A Dcpu_loop.c119 uint32_t oldval, newval, val, addr, cpsr, *host_addr; in arm_kernel_cmpxchg32_helper() local
136 cpsr = (val == oldval) * CPSR_C; in arm_kernel_cmpxchg32_helper()
137 cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr); in arm_kernel_cmpxchg32_helper()
138 env->regs[0] = cpsr ? 0 : -1; in arm_kernel_cmpxchg32_helper()
158 uint32_t addr, cpsr; in arm_kernel_cmpxchg64_helper() local
185 cpsr = (val == oldval) * CPSR_C; in arm_kernel_cmpxchg64_helper()
195 cpsr = CPSR_C; in arm_kernel_cmpxchg64_helper()
197 cpsr = 0; in arm_kernel_cmpxchg64_helper()
203 cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr); in arm_kernel_cmpxchg64_helper()
204 env->regs[0] = cpsr ? 0 : -1; in arm_kernel_cmpxchg64_helper()
H A Dsignal.c199 uint32_t cpsr = cpsr_read(env); in setup_return() local
201 cpsr &= ~CPSR_IT; in setup_return()
203 cpsr |= CPSR_T; in setup_return()
205 cpsr &= ~CPSR_T; in setup_return()
208 cpsr |= CPSR_E; in setup_return()
210 cpsr &= ~CPSR_E; in setup_return()
248 cpsr_write(env, cpsr, CPSR_IT | CPSR_T | CPSR_E, CPSRWriteByInstr); in setup_return()
382 uint32_t cpsr; in restore_sigcontext() local
400 __get_user(cpsr, &sc->arm_cpsr); in restore_sigcontext()
401 cpsr_write(env, cpsr, CPSR_USER | CPSR_EXEC, CPSRWriteByInstr); in restore_sigcontext()
/openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dstart.S67 mrs r2, cpsr
71 msr cpsr, r2
77 msr cpsr,r2
/openbmc/qemu/bsd-user/arm/
H A Dsignal.c144 uint32_t cpsr, ccpsr = cpsr_read(env); in set_mcontext() local
147 cpsr = tswap32(gr[TARGET_REG_CPSR]); in set_mcontext()
153 if ((ccpsr & ~CPSR_USER) != (cpsr & ~CPSR_USER)) { in set_mcontext()
156 if ((cpsr & CPSR_M) != ARM_CPU_MODE_USR || in set_mcontext()
157 (cpsr & (CPSR_I | CPSR_F)) != 0) { in set_mcontext()
165 mask = cpsr & CPSR_T ? 0x1 : 0x3; in set_mcontext()
210 cpsr_write(env, cpsr, CPSR_USER | CPSR_EXEC, CPSRWriteByInstr); in set_mcontext()
/openbmc/u-boot/drivers/spi/
H A Dpl022_spi.c214 u16 scr = SSP_SCR_MIN, cr0 = 0, cpsr = SSP_CPSR_MIN, best_scr = scr, in pl022_spi_set_speed() local
215 best_cpsr = cpsr; in pl022_spi_set_speed()
229 while (cpsr <= SSP_CPSR_MAX && !found) { in pl022_spi_set_speed()
231 tmp = spi_rate(rate, cpsr, scr); in pl022_spi_set_speed()
235 best_cpsr = cpsr; in pl022_spi_set_speed()
246 cpsr += 2; in pl022_spi_set_speed()
/openbmc/u-boot/arch/arm/cpu/arm720t/
H A Dstart.S31 mrs r0,cpsr
34 msr cpsr,r0
/openbmc/linux/arch/arm/kernel/
H A Dsignal.c328 unsigned long cpsr = regs->ARM_cpsr & ~(PSR_f | PSR_E_BIT); in setup_return() local
340 cpsr |= PSR_ENDSTATE; in setup_return()
346 cpsr = (cpsr & ~MODE_MASK) | USR_MODE; in setup_return()
367 cpsr &= ~PSR_IT_MASK; in setup_return()
370 cpsr |= PSR_T_BIT; in setup_return()
372 cpsr &= ~PSR_T_BIT; in setup_return()
411 if (cpsr & MODE32_BIT) { in setup_return()
441 regs->ARM_cpsr = cpsr; in setup_return()
H A Dfiqasm.S27 mrs r1, cpsr
40 mrs r1, cpsr
/openbmc/u-boot/arch/arm/cpu/arm946es/
H A Dstart.S39 mrs r0,cpsr
42 msr cpsr,r0
/openbmc/u-boot/arch/arm/cpu/arm1136/
H A Dstart.S36 mrs r0,cpsr
39 msr cpsr,r0
/openbmc/u-boot/arch/arm/cpu/arm926ejs/
H A Dstart.S40 mrs r0,cpsr
43 msr cpsr,r0
/openbmc/linux/arch/arm64/kvm/
H A Dtrace_arm.h120 unsigned long cpsr),
121 TP_ARGS(vcpu_pc, instr, cpsr),
126 __field( unsigned long, cpsr )
132 __entry->cpsr = cpsr;
136 __entry->vcpu_pc, __entry->instr, __entry->cpsr)
/openbmc/u-boot/arch/arm/cpu/arm1176/
H A Dstart.S48 mrs r0, cpsr
51 msr cpsr, r0
/openbmc/u-boot/arch/arm/cpu/armv7/sunxi/
H A Dfel_utils.S17 mrs lr, cpsr @ Read CPSR
39 msr cpsr, r1 @ Write CPSR
/openbmc/u-boot/arch/arm/cpu/arm920t/
H A Dstart.S33 mrs r0, cpsr
36 msr cpsr, r0
/openbmc/u-boot/arch/arm/cpu/sa1100/
H A Dstart.S33 mrs r0,cpsr
36 msr cpsr,r0

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