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12

/openbmc/u-boot/board/kmc/kzm9g/
H A Dkzm9g.c135 struct sh73a0_sbsc_cpg *cpg = (struct sh73a0_sbsc_cpg *)CPG_BASE; in s_init() local
151 clrbits_le32(&cpg->smstpcr3, (1 << 15)); in s_init()
153 clrbits_le32(&cpg->smstpcr2, (1 << 18)); in s_init()
155 writel(0x0, &cpg->pllecr); in s_init()
157 cmp_loop(&cpg->pllecr, 0x00000F00, 0x0); in s_init()
158 cmp_loop(&cpg->frqcrb, 0x80000000, 0x0); in s_init()
160 writel(0x2D000000, &cpg->pll0cr); in s_init()
161 writel(0x17100000, &cpg->pll1cr); in s_init()
162 writel(0x96235880, &cpg->frqcrb); in s_init()
163 cmp_loop(&cpg->frqcrb, 0x80000000, 0x0); in s_init()
[all …]
/openbmc/u-boot/drivers/clk/renesas/
H A DMakefile1 obj-$(CONFIG_CLK_RENESAS) += renesas-cpg-mssr.o
3 obj-$(CONFIG_CLK_R8A7790) += r8a7790-cpg-mssr.o
4 obj-$(CONFIG_CLK_R8A7791) += r8a7791-cpg-mssr.o
5 obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
6 obj-$(CONFIG_CLK_R8A7793) += r8a7791-cpg-mssr.o
7 obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o
9 obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
10 obj-$(CONFIG_CLK_R8A7796) += r8a7796-cpg-mssr.o
11 obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
12 obj-$(CONFIG_CLK_R8A77990) += r8a77990-cpg-mssr.o
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dr8a7792.dtsi8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
54 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
64 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
112 clocks = <&cpg CPG_MOD 402>;
114 resets = <&cpg 402>;
128 clocks = <&cpg CPG_MOD 912>;
130 resets = <&cpg 912>;
143 clocks = <&cpg CPG_MOD 911>;
145 resets = <&cpg 911>;
158 clocks = <&cpg CPG_MOD 910>;
[all …]
H A Dr8a77995.dtsi9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
80 clocks = <&cpg CPG_MOD 402>;
82 resets = <&cpg 402>;
96 clocks = <&cpg CPG_MOD 912>;
98 resets = <&cpg 912>;
111 clocks = <&cpg CPG_MOD 911>;
113 resets = <&cpg 911>;
126 clocks = <&cpg CPG_MOD 910>;
128 resets = <&cpg 910>;
141 clocks = <&cpg CPG_MOD 909>;
[all …]
H A Dr8a7796.dtsi8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
137 clocks =<&cpg CPG_CORE R8A7796_CLK_Z>;
149 clocks =<&cpg CPG_CORE R8A7796_CLK_Z>;
161 clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
172 clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
183 clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
194 clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
273 clocks = <&cpg CPG_MOD 402>;
275 resets = <&cpg 402>;
289 clocks = <&cpg CPG_MOD 912>;
[all …]
H A Dr8a7795.dtsi8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
126 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
138 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
150 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
162 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
174 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
185 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
196 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
207 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
294 clocks = <&cpg CPG_MOD 402>;
[all …]
H A Dr8a7793.dtsi8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
70 clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
90 clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
148 clocks = <&cpg CPG_MOD 402>;
150 resets = <&cpg 402>;
164 clocks = <&cpg CPG_MOD 912>;
166 resets = <&cpg 912>;
179 clocks = <&cpg CPG_MOD 911>;
181 resets = <&cpg 911>;
194 clocks = <&cpg CPG_MOD 910>;
[all …]
H A Dr8a7794.dtsi9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
72 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
82 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
130 clocks = <&cpg CPG_MOD 402>;
132 resets = <&cpg 402>;
146 clocks = <&cpg CPG_MOD 912>;
148 resets = <&cpg 912>;
161 clocks = <&cpg CPG_MOD 911>;
163 resets = <&cpg 911>;
176 clocks = <&cpg CPG_MOD 910>;
[all …]
H A Dr8a7791.dtsi10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
78 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
98 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
163 clocks = <&cpg CPG_MOD 402>;
165 resets = <&cpg 402>;
179 clocks = <&cpg CPG_MOD 912>;
181 resets = <&cpg 912>;
194 clocks = <&cpg CPG_MOD 911>;
196 resets = <&cpg 911>;
209 clocks = <&cpg CPG_MOD 910>;
[all …]
H A Dr8a7790.dtsi10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
79 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
121 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
142 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
163 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
174 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
185 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
196 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
270 clocks = <&cpg CPG_MOD 402>;
[all …]
H A Dr8a77965.dtsi11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
145 clocks = <&cpg CPG_MOD 402>;
147 resets = <&cpg 402>;
161 clocks = <&cpg CPG_MOD 912>;
163 resets = <&cpg 912>;
176 clocks = <&cpg CPG_MOD 911>;
178 resets = <&cpg 911>;
191 clocks = <&cpg CPG_MOD 910>;
193 resets = <&cpg 910>;
206 clocks = <&cpg CPG_MOD 909>;
[all …]
H A Dr8a77970.dtsi9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
35 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
45 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
111 clocks = <&cpg CPG_MOD 402>;
113 resets = <&cpg 402>;
127 clocks = <&cpg CPG_MOD 912>;
129 resets = <&cpg 912>;
142 clocks = <&cpg CPG_MOD 911>;
144 resets = <&cpg 911>;
157 clocks = <&cpg CPG_MOD 910>;
[all …]
H A Dulcb.dtsi372 clocks = <&cpg CPG_MOD 1005>,
373 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
374 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
375 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
376 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
377 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
378 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
379 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
380 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
381 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
[all …]
H A Dr8a77990.dtsi8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
77 clocks = <&cpg CPG_MOD 402>;
79 resets = <&cpg 402>;
93 clocks = <&cpg CPG_MOD 912>;
95 resets = <&cpg 912>;
108 clocks = <&cpg CPG_MOD 911>;
110 resets = <&cpg 911>;
123 clocks = <&cpg CPG_MOD 910>;
125 resets = <&cpg 910>;
138 clocks = <&cpg CPG_MOD 909>;
[all …]
H A Dr8a7795-h3ulcb.dts40 clocks = <&cpg CPG_MOD 724>,
41 <&cpg CPG_MOD 723>,
42 <&cpg CPG_MOD 722>,
43 <&cpg CPG_MOD 721>,
44 <&cpg CPG_MOD 727>,
H A Dsalvator-common.dtsi686 clocks = <&cpg CPG_MOD 1005>,
687 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
688 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
689 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
690 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
691 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
692 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
693 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
694 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
695 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
[all …]
H A Dr8a7796-m3ulcb.dts30 clocks = <&cpg CPG_MOD 724>,
31 <&cpg CPG_MOD 723>,
32 <&cpg CPG_MOD 722>,
33 <&cpg CPG_MOD 727>,
H A Dr8a77990-u-boot.dtsi14 clocks = <&cpg CPG_MOD 917>;
22 clocks = <&cpg CPG_MOD 314>;
30 clocks = <&cpg CPG_MOD 313>;
38 clocks = <&cpg CPG_MOD 311>;
H A Dr8a7796-salvator-x.dts29 clocks = <&cpg CPG_MOD 724>,
30 <&cpg CPG_MOD 723>,
31 <&cpg CPG_MOD 722>,
32 <&cpg CPG_MOD 727>,
H A Dr8a7795-salvator-x.dts39 clocks = <&cpg CPG_MOD 724>,
40 <&cpg CPG_MOD 723>,
41 <&cpg CPG_MOD 722>,
42 <&cpg CPG_MOD 721>,
43 <&cpg CPG_MOD 727>,
H A Dr8a77965-salvator-x.dts24 clocks = <&cpg CPG_MOD 724>,
25 <&cpg CPG_MOD 723>,
26 <&cpg CPG_MOD 721>,
H A Dr8a7790-stout.dts96 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
97 <&cpg CPG_MOD 726>, <&cpg CPG_MOD 725>,
H A Dr8a779x-u-boot.dtsi14 &cpg {
H A Dr8a77995-u-boot.dtsi14 clocks = <&cpg CPG_MOD 917>;
/openbmc/u-boot/board/atmark-techno/armadillo-800eva/
H A Darmadillo-800eva.c45 struct r8a7740_cpg *cpg = (struct r8a7740_cpg *)CPG_BASE; in s_init() local
55 writel(0xFF800080, &cpg->rmstpcr4); in s_init()
56 writel(0xFF800080, &cpg->smstpcr4); in s_init()
59 writel(0x00000080, &cpg->usbckcr); in s_init()
66 writel(0x00000000, &cpg->frqcrb); in s_init()
67 writel(0x62030533, &cpg->frqcra); in s_init()
68 writel(0x208A354E, &cpg->frqcrc); in s_init()
69 writel(0x80331050, &cpg->frqcrb); in s_init()
72 writel(0x00000000, &cpg->frqcrd); in s_init()
76 writel(0x0000010B, &cpg->subckcr); in s_init()
[all …]

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