183d290c5STom Rini// SPDX-License-Identifier: GPL-2.0 2a3fb9ff3SMarek Vasut/* 3a3fb9ff3SMarek Vasut * Device Tree Source for the r8a7792 SoC 4a3fb9ff3SMarek Vasut * 5a3fb9ff3SMarek Vasut * Copyright (C) 2016 Cogent Embedded Inc. 6a3fb9ff3SMarek Vasut */ 7a3fb9ff3SMarek Vasut 8a3fb9ff3SMarek Vasut#include <dt-bindings/clock/r8a7792-cpg-mssr.h> 9a3fb9ff3SMarek Vasut#include <dt-bindings/interrupt-controller/irq.h> 10a3fb9ff3SMarek Vasut#include <dt-bindings/interrupt-controller/arm-gic.h> 11a3fb9ff3SMarek Vasut#include <dt-bindings/power/r8a7792-sysc.h> 12a3fb9ff3SMarek Vasut 13a3fb9ff3SMarek Vasut/ { 14a3fb9ff3SMarek Vasut compatible = "renesas,r8a7792"; 15a3fb9ff3SMarek Vasut #address-cells = <2>; 16a3fb9ff3SMarek Vasut #size-cells = <2>; 17a3fb9ff3SMarek Vasut 18a3fb9ff3SMarek Vasut aliases { 19a3fb9ff3SMarek Vasut i2c0 = &i2c0; 20a3fb9ff3SMarek Vasut i2c1 = &i2c1; 21a3fb9ff3SMarek Vasut i2c2 = &i2c2; 22a3fb9ff3SMarek Vasut i2c3 = &i2c3; 23a3fb9ff3SMarek Vasut i2c4 = &i2c4; 24a3fb9ff3SMarek Vasut i2c5 = &i2c5; 25a3fb9ff3SMarek Vasut spi0 = &qspi; 26a3fb9ff3SMarek Vasut spi1 = &msiof0; 27a3fb9ff3SMarek Vasut spi2 = &msiof1; 28a3fb9ff3SMarek Vasut vin0 = &vin0; 29a3fb9ff3SMarek Vasut vin1 = &vin1; 30a3fb9ff3SMarek Vasut vin2 = &vin2; 31a3fb9ff3SMarek Vasut vin3 = &vin3; 32a3fb9ff3SMarek Vasut vin4 = &vin4; 33a3fb9ff3SMarek Vasut vin5 = &vin5; 34a3fb9ff3SMarek Vasut }; 35a3fb9ff3SMarek Vasut 36252c8b45SMarek Vasut /* External CAN clock */ 37252c8b45SMarek Vasut can_clk: can { 38252c8b45SMarek Vasut compatible = "fixed-clock"; 39252c8b45SMarek Vasut #clock-cells = <0>; 40252c8b45SMarek Vasut /* This value must be overridden by the board. */ 41252c8b45SMarek Vasut clock-frequency = <0>; 42252c8b45SMarek Vasut }; 43252c8b45SMarek Vasut 44a3fb9ff3SMarek Vasut cpus { 45a3fb9ff3SMarek Vasut #address-cells = <1>; 46a3fb9ff3SMarek Vasut #size-cells = <0>; 47a3fb9ff3SMarek Vasut enable-method = "renesas,apmu"; 48a3fb9ff3SMarek Vasut 49a3fb9ff3SMarek Vasut cpu0: cpu@0 { 50a3fb9ff3SMarek Vasut device_type = "cpu"; 51a3fb9ff3SMarek Vasut compatible = "arm,cortex-a15"; 52a3fb9ff3SMarek Vasut reg = <0>; 53a3fb9ff3SMarek Vasut clock-frequency = <1000000000>; 54a3fb9ff3SMarek Vasut clocks = <&cpg CPG_CORE R8A7792_CLK_Z>; 55a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_CA15_CPU0>; 56a3fb9ff3SMarek Vasut next-level-cache = <&L2_CA15>; 57a3fb9ff3SMarek Vasut }; 58a3fb9ff3SMarek Vasut 59a3fb9ff3SMarek Vasut cpu1: cpu@1 { 60a3fb9ff3SMarek Vasut device_type = "cpu"; 61a3fb9ff3SMarek Vasut compatible = "arm,cortex-a15"; 62a3fb9ff3SMarek Vasut reg = <1>; 63a3fb9ff3SMarek Vasut clock-frequency = <1000000000>; 64a3fb9ff3SMarek Vasut clocks = <&cpg CPG_CORE R8A7792_CLK_Z>; 65a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_CA15_CPU1>; 66a3fb9ff3SMarek Vasut next-level-cache = <&L2_CA15>; 67a3fb9ff3SMarek Vasut }; 68a3fb9ff3SMarek Vasut 69a3fb9ff3SMarek Vasut L2_CA15: cache-controller-0 { 70a3fb9ff3SMarek Vasut compatible = "cache"; 71a3fb9ff3SMarek Vasut cache-unified; 72a3fb9ff3SMarek Vasut cache-level = <2>; 73a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_CA15_SCU>; 74a3fb9ff3SMarek Vasut }; 75a3fb9ff3SMarek Vasut }; 76a3fb9ff3SMarek Vasut 77252c8b45SMarek Vasut /* External root clock */ 78252c8b45SMarek Vasut extal_clk: extal { 79252c8b45SMarek Vasut compatible = "fixed-clock"; 80252c8b45SMarek Vasut #clock-cells = <0>; 81252c8b45SMarek Vasut /* This value must be overridden by the board. */ 82252c8b45SMarek Vasut clock-frequency = <0>; 83252c8b45SMarek Vasut }; 84252c8b45SMarek Vasut 85*3b255531SMarek Vasut pmu { 86*3b255531SMarek Vasut compatible = "arm,cortex-a15-pmu"; 87*3b255531SMarek Vasut interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 88*3b255531SMarek Vasut <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 89*3b255531SMarek Vasut interrupt-affinity = <&cpu0>, <&cpu1>; 90*3b255531SMarek Vasut }; 91*3b255531SMarek Vasut 92252c8b45SMarek Vasut /* External SCIF clock */ 93252c8b45SMarek Vasut scif_clk: scif { 94252c8b45SMarek Vasut compatible = "fixed-clock"; 95252c8b45SMarek Vasut #clock-cells = <0>; 96252c8b45SMarek Vasut /* This value must be overridden by the board. */ 97252c8b45SMarek Vasut clock-frequency = <0>; 98252c8b45SMarek Vasut }; 99252c8b45SMarek Vasut 100a3fb9ff3SMarek Vasut soc { 101a3fb9ff3SMarek Vasut compatible = "simple-bus"; 102a3fb9ff3SMarek Vasut interrupt-parent = <&gic>; 103a3fb9ff3SMarek Vasut 104a3fb9ff3SMarek Vasut #address-cells = <2>; 105a3fb9ff3SMarek Vasut #size-cells = <2>; 106a3fb9ff3SMarek Vasut ranges; 107a3fb9ff3SMarek Vasut 108*3b255531SMarek Vasut rwdt: watchdog@e6020000 { 109*3b255531SMarek Vasut compatible = "renesas,r8a7792-wdt", 110*3b255531SMarek Vasut "renesas,rcar-gen2-wdt"; 111*3b255531SMarek Vasut reg = <0 0xe6020000 0 0x0c>; 112*3b255531SMarek Vasut clocks = <&cpg CPG_MOD 402>; 113*3b255531SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 114*3b255531SMarek Vasut resets = <&cpg 402>; 115*3b255531SMarek Vasut status = "disabled"; 116*3b255531SMarek Vasut }; 117*3b255531SMarek Vasut 118a3fb9ff3SMarek Vasut gpio0: gpio@e6050000 { 119a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 120a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 121a3fb9ff3SMarek Vasut reg = <0 0xe6050000 0 0x50>; 122a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 123a3fb9ff3SMarek Vasut #gpio-cells = <2>; 124a3fb9ff3SMarek Vasut gpio-controller; 125a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 0 29>; 126a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 127a3fb9ff3SMarek Vasut interrupt-controller; 128a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 912>; 129a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 130a3fb9ff3SMarek Vasut resets = <&cpg 912>; 131a3fb9ff3SMarek Vasut }; 132a3fb9ff3SMarek Vasut 133a3fb9ff3SMarek Vasut gpio1: gpio@e6051000 { 134a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 135a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 136a3fb9ff3SMarek Vasut reg = <0 0xe6051000 0 0x50>; 137a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 138a3fb9ff3SMarek Vasut #gpio-cells = <2>; 139a3fb9ff3SMarek Vasut gpio-controller; 140a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 32 23>; 141a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 142a3fb9ff3SMarek Vasut interrupt-controller; 143a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 911>; 144a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 145a3fb9ff3SMarek Vasut resets = <&cpg 911>; 146a3fb9ff3SMarek Vasut }; 147a3fb9ff3SMarek Vasut 148a3fb9ff3SMarek Vasut gpio2: gpio@e6052000 { 149a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 150a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 151a3fb9ff3SMarek Vasut reg = <0 0xe6052000 0 0x50>; 152a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 153a3fb9ff3SMarek Vasut #gpio-cells = <2>; 154a3fb9ff3SMarek Vasut gpio-controller; 155a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 64 32>; 156a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 157a3fb9ff3SMarek Vasut interrupt-controller; 158a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 910>; 159a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 160a3fb9ff3SMarek Vasut resets = <&cpg 910>; 161a3fb9ff3SMarek Vasut }; 162a3fb9ff3SMarek Vasut 163a3fb9ff3SMarek Vasut gpio3: gpio@e6053000 { 164a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 165a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 166a3fb9ff3SMarek Vasut reg = <0 0xe6053000 0 0x50>; 167a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 168a3fb9ff3SMarek Vasut #gpio-cells = <2>; 169a3fb9ff3SMarek Vasut gpio-controller; 170a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 96 28>; 171a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 172a3fb9ff3SMarek Vasut interrupt-controller; 173a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 909>; 174a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 175a3fb9ff3SMarek Vasut resets = <&cpg 909>; 176a3fb9ff3SMarek Vasut }; 177a3fb9ff3SMarek Vasut 178a3fb9ff3SMarek Vasut gpio4: gpio@e6054000 { 179a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 180a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 181a3fb9ff3SMarek Vasut reg = <0 0xe6054000 0 0x50>; 182a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 183a3fb9ff3SMarek Vasut #gpio-cells = <2>; 184a3fb9ff3SMarek Vasut gpio-controller; 185a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 128 17>; 186a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 187a3fb9ff3SMarek Vasut interrupt-controller; 188a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 908>; 189a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 190a3fb9ff3SMarek Vasut resets = <&cpg 908>; 191a3fb9ff3SMarek Vasut }; 192a3fb9ff3SMarek Vasut 193a3fb9ff3SMarek Vasut gpio5: gpio@e6055000 { 194a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 195a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 196a3fb9ff3SMarek Vasut reg = <0 0xe6055000 0 0x50>; 197a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 198a3fb9ff3SMarek Vasut #gpio-cells = <2>; 199a3fb9ff3SMarek Vasut gpio-controller; 200a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 160 17>; 201a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 202a3fb9ff3SMarek Vasut interrupt-controller; 203a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 907>; 204a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 205a3fb9ff3SMarek Vasut resets = <&cpg 907>; 206a3fb9ff3SMarek Vasut }; 207a3fb9ff3SMarek Vasut 208a3fb9ff3SMarek Vasut gpio6: gpio@e6055100 { 209a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 210a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 211a3fb9ff3SMarek Vasut reg = <0 0xe6055100 0 0x50>; 212a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 213a3fb9ff3SMarek Vasut #gpio-cells = <2>; 214a3fb9ff3SMarek Vasut gpio-controller; 215a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 192 17>; 216a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 217a3fb9ff3SMarek Vasut interrupt-controller; 218a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 905>; 219a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 220a3fb9ff3SMarek Vasut resets = <&cpg 905>; 221a3fb9ff3SMarek Vasut }; 222a3fb9ff3SMarek Vasut 223a3fb9ff3SMarek Vasut gpio7: gpio@e6055200 { 224a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 225a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 226a3fb9ff3SMarek Vasut reg = <0 0xe6055200 0 0x50>; 227a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 228a3fb9ff3SMarek Vasut #gpio-cells = <2>; 229a3fb9ff3SMarek Vasut gpio-controller; 230a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 224 17>; 231a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 232a3fb9ff3SMarek Vasut interrupt-controller; 233a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 904>; 234a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 235a3fb9ff3SMarek Vasut resets = <&cpg 904>; 236a3fb9ff3SMarek Vasut }; 237a3fb9ff3SMarek Vasut 238a3fb9ff3SMarek Vasut gpio8: gpio@e6055300 { 239a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 240a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 241a3fb9ff3SMarek Vasut reg = <0 0xe6055300 0 0x50>; 242a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 243a3fb9ff3SMarek Vasut #gpio-cells = <2>; 244a3fb9ff3SMarek Vasut gpio-controller; 245a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 256 17>; 246a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 247a3fb9ff3SMarek Vasut interrupt-controller; 248a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 921>; 249a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 250a3fb9ff3SMarek Vasut resets = <&cpg 921>; 251a3fb9ff3SMarek Vasut }; 252a3fb9ff3SMarek Vasut 253a3fb9ff3SMarek Vasut gpio9: gpio@e6055400 { 254a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 255a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 256a3fb9ff3SMarek Vasut reg = <0 0xe6055400 0 0x50>; 257a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 258a3fb9ff3SMarek Vasut #gpio-cells = <2>; 259a3fb9ff3SMarek Vasut gpio-controller; 260a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 288 17>; 261a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 262a3fb9ff3SMarek Vasut interrupt-controller; 263a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 919>; 264a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 265a3fb9ff3SMarek Vasut resets = <&cpg 919>; 266a3fb9ff3SMarek Vasut }; 267a3fb9ff3SMarek Vasut 268a3fb9ff3SMarek Vasut gpio10: gpio@e6055500 { 269a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 270a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 271a3fb9ff3SMarek Vasut reg = <0 0xe6055500 0 0x50>; 272a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 273a3fb9ff3SMarek Vasut #gpio-cells = <2>; 274a3fb9ff3SMarek Vasut gpio-controller; 275a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 320 32>; 276a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 277a3fb9ff3SMarek Vasut interrupt-controller; 278a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 914>; 279a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 280a3fb9ff3SMarek Vasut resets = <&cpg 914>; 281a3fb9ff3SMarek Vasut }; 282a3fb9ff3SMarek Vasut 283a3fb9ff3SMarek Vasut gpio11: gpio@e6055600 { 284a3fb9ff3SMarek Vasut compatible = "renesas,gpio-r8a7792", 285a3fb9ff3SMarek Vasut "renesas,rcar-gen2-gpio"; 286a3fb9ff3SMarek Vasut reg = <0 0xe6055600 0 0x50>; 287a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 288a3fb9ff3SMarek Vasut #gpio-cells = <2>; 289a3fb9ff3SMarek Vasut gpio-controller; 290a3fb9ff3SMarek Vasut gpio-ranges = <&pfc 0 352 30>; 291a3fb9ff3SMarek Vasut #interrupt-cells = <2>; 292a3fb9ff3SMarek Vasut interrupt-controller; 293a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 913>; 294a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 295a3fb9ff3SMarek Vasut resets = <&cpg 913>; 296a3fb9ff3SMarek Vasut }; 297a3fb9ff3SMarek Vasut 298252c8b45SMarek Vasut pfc: pin-controller@e6060000 { 299252c8b45SMarek Vasut compatible = "renesas,pfc-r8a7792"; 300252c8b45SMarek Vasut reg = <0 0xe6060000 0 0x144>; 301252c8b45SMarek Vasut }; 302252c8b45SMarek Vasut 303252c8b45SMarek Vasut cpg: clock-controller@e6150000 { 304252c8b45SMarek Vasut compatible = "renesas,r8a7792-cpg-mssr"; 305252c8b45SMarek Vasut reg = <0 0xe6150000 0 0x1000>; 306252c8b45SMarek Vasut clocks = <&extal_clk>; 307252c8b45SMarek Vasut clock-names = "extal"; 308252c8b45SMarek Vasut #clock-cells = <2>; 309252c8b45SMarek Vasut #power-domain-cells = <0>; 310252c8b45SMarek Vasut #reset-cells = <1>; 311252c8b45SMarek Vasut }; 312252c8b45SMarek Vasut 313252c8b45SMarek Vasut apmu@e6152000 { 314252c8b45SMarek Vasut compatible = "renesas,r8a7792-apmu", "renesas,apmu"; 315252c8b45SMarek Vasut reg = <0 0xe6152000 0 0x188>; 316252c8b45SMarek Vasut cpus = <&cpu0 &cpu1>; 317252c8b45SMarek Vasut }; 318252c8b45SMarek Vasut 319252c8b45SMarek Vasut rst: reset-controller@e6160000 { 320252c8b45SMarek Vasut compatible = "renesas,r8a7792-rst"; 321252c8b45SMarek Vasut reg = <0 0xe6160000 0 0x0100>; 322252c8b45SMarek Vasut }; 323252c8b45SMarek Vasut 324252c8b45SMarek Vasut sysc: system-controller@e6180000 { 325252c8b45SMarek Vasut compatible = "renesas,r8a7792-sysc"; 326252c8b45SMarek Vasut reg = <0 0xe6180000 0 0x0200>; 327252c8b45SMarek Vasut #power-domain-cells = <1>; 328252c8b45SMarek Vasut }; 329252c8b45SMarek Vasut 330252c8b45SMarek Vasut irqc: interrupt-controller@e61c0000 { 331252c8b45SMarek Vasut compatible = "renesas,irqc-r8a7792", "renesas,irqc"; 332252c8b45SMarek Vasut #interrupt-cells = <2>; 333252c8b45SMarek Vasut interrupt-controller; 334252c8b45SMarek Vasut reg = <0 0xe61c0000 0 0x200>; 335252c8b45SMarek Vasut interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 336252c8b45SMarek Vasut <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 337252c8b45SMarek Vasut <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 338252c8b45SMarek Vasut <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 339252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 407>; 340252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 341252c8b45SMarek Vasut resets = <&cpg 407>; 342252c8b45SMarek Vasut }; 343252c8b45SMarek Vasut 344252c8b45SMarek Vasut icram0: sram@e63a0000 { 345252c8b45SMarek Vasut compatible = "mmio-sram"; 346252c8b45SMarek Vasut reg = <0 0xe63a0000 0 0x12000>; 347252c8b45SMarek Vasut }; 348252c8b45SMarek Vasut 349252c8b45SMarek Vasut icram1: sram@e63c0000 { 350252c8b45SMarek Vasut compatible = "mmio-sram"; 351252c8b45SMarek Vasut reg = <0 0xe63c0000 0 0x1000>; 352252c8b45SMarek Vasut #address-cells = <1>; 353252c8b45SMarek Vasut #size-cells = <1>; 354252c8b45SMarek Vasut ranges = <0 0 0xe63c0000 0x1000>; 355252c8b45SMarek Vasut 356252c8b45SMarek Vasut smp-sram@0 { 357252c8b45SMarek Vasut compatible = "renesas,smp-sram"; 358*3b255531SMarek Vasut reg = <0 0x100>; 359252c8b45SMarek Vasut }; 360252c8b45SMarek Vasut }; 361252c8b45SMarek Vasut 362252c8b45SMarek Vasut /* I2C doesn't need pinmux */ 363252c8b45SMarek Vasut i2c0: i2c@e6508000 { 364252c8b45SMarek Vasut compatible = "renesas,i2c-r8a7792", 365252c8b45SMarek Vasut "renesas,rcar-gen2-i2c"; 366252c8b45SMarek Vasut reg = <0 0xe6508000 0 0x40>; 367252c8b45SMarek Vasut interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 368252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 931>; 369252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 370252c8b45SMarek Vasut resets = <&cpg 931>; 371252c8b45SMarek Vasut i2c-scl-internal-delay-ns = <6>; 372252c8b45SMarek Vasut #address-cells = <1>; 373252c8b45SMarek Vasut #size-cells = <0>; 374252c8b45SMarek Vasut status = "disabled"; 375252c8b45SMarek Vasut }; 376252c8b45SMarek Vasut 377252c8b45SMarek Vasut i2c1: i2c@e6518000 { 378252c8b45SMarek Vasut compatible = "renesas,i2c-r8a7792", 379252c8b45SMarek Vasut "renesas,rcar-gen2-i2c"; 380252c8b45SMarek Vasut reg = <0 0xe6518000 0 0x40>; 381252c8b45SMarek Vasut interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 382252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 930>; 383252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 384252c8b45SMarek Vasut resets = <&cpg 930>; 385252c8b45SMarek Vasut i2c-scl-internal-delay-ns = <6>; 386252c8b45SMarek Vasut #address-cells = <1>; 387252c8b45SMarek Vasut #size-cells = <0>; 388252c8b45SMarek Vasut status = "disabled"; 389252c8b45SMarek Vasut }; 390252c8b45SMarek Vasut 391252c8b45SMarek Vasut i2c2: i2c@e6530000 { 392252c8b45SMarek Vasut compatible = "renesas,i2c-r8a7792", 393252c8b45SMarek Vasut "renesas,rcar-gen2-i2c"; 394252c8b45SMarek Vasut reg = <0 0xe6530000 0 0x40>; 395252c8b45SMarek Vasut interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 396252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 929>; 397252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 398252c8b45SMarek Vasut resets = <&cpg 929>; 399252c8b45SMarek Vasut i2c-scl-internal-delay-ns = <6>; 400252c8b45SMarek Vasut #address-cells = <1>; 401252c8b45SMarek Vasut #size-cells = <0>; 402252c8b45SMarek Vasut status = "disabled"; 403252c8b45SMarek Vasut }; 404252c8b45SMarek Vasut 405252c8b45SMarek Vasut i2c3: i2c@e6540000 { 406252c8b45SMarek Vasut compatible = "renesas,i2c-r8a7792", 407252c8b45SMarek Vasut "renesas,rcar-gen2-i2c"; 408252c8b45SMarek Vasut reg = <0 0xe6540000 0 0x40>; 409252c8b45SMarek Vasut interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 410252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 928>; 411252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 412252c8b45SMarek Vasut resets = <&cpg 928>; 413252c8b45SMarek Vasut i2c-scl-internal-delay-ns = <6>; 414252c8b45SMarek Vasut #address-cells = <1>; 415252c8b45SMarek Vasut #size-cells = <0>; 416252c8b45SMarek Vasut status = "disabled"; 417252c8b45SMarek Vasut }; 418252c8b45SMarek Vasut 419252c8b45SMarek Vasut i2c4: i2c@e6520000 { 420252c8b45SMarek Vasut compatible = "renesas,i2c-r8a7792", 421252c8b45SMarek Vasut "renesas,rcar-gen2-i2c"; 422252c8b45SMarek Vasut reg = <0 0xe6520000 0 0x40>; 423252c8b45SMarek Vasut interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 424252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 927>; 425252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 426252c8b45SMarek Vasut resets = <&cpg 927>; 427252c8b45SMarek Vasut i2c-scl-internal-delay-ns = <6>; 428252c8b45SMarek Vasut #address-cells = <1>; 429252c8b45SMarek Vasut #size-cells = <0>; 430252c8b45SMarek Vasut status = "disabled"; 431252c8b45SMarek Vasut }; 432252c8b45SMarek Vasut 433252c8b45SMarek Vasut i2c5: i2c@e6528000 { 434252c8b45SMarek Vasut compatible = "renesas,i2c-r8a7792", 435252c8b45SMarek Vasut "renesas,rcar-gen2-i2c"; 436252c8b45SMarek Vasut reg = <0 0xe6528000 0 0x40>; 437252c8b45SMarek Vasut interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 438252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 925>; 439252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 440252c8b45SMarek Vasut resets = <&cpg 925>; 441252c8b45SMarek Vasut i2c-scl-internal-delay-ns = <110>; 442252c8b45SMarek Vasut #address-cells = <1>; 443252c8b45SMarek Vasut #size-cells = <0>; 444252c8b45SMarek Vasut status = "disabled"; 445252c8b45SMarek Vasut }; 446252c8b45SMarek Vasut 447a3fb9ff3SMarek Vasut dmac0: dma-controller@e6700000 { 448a3fb9ff3SMarek Vasut compatible = "renesas,dmac-r8a7792", 449a3fb9ff3SMarek Vasut "renesas,rcar-dmac"; 450a3fb9ff3SMarek Vasut reg = <0 0xe6700000 0 0x20000>; 451a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 452a3fb9ff3SMarek Vasut GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 453a3fb9ff3SMarek Vasut GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 454a3fb9ff3SMarek Vasut GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 455a3fb9ff3SMarek Vasut GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 456a3fb9ff3SMarek Vasut GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 457a3fb9ff3SMarek Vasut GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 458a3fb9ff3SMarek Vasut GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 459a3fb9ff3SMarek Vasut GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 460a3fb9ff3SMarek Vasut GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 461a3fb9ff3SMarek Vasut GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 462a3fb9ff3SMarek Vasut GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 463a3fb9ff3SMarek Vasut GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 464a3fb9ff3SMarek Vasut GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 465a3fb9ff3SMarek Vasut GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 466a3fb9ff3SMarek Vasut GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 467a3fb9ff3SMarek Vasut interrupt-names = "error", 468a3fb9ff3SMarek Vasut "ch0", "ch1", "ch2", "ch3", 469a3fb9ff3SMarek Vasut "ch4", "ch5", "ch6", "ch7", 470a3fb9ff3SMarek Vasut "ch8", "ch9", "ch10", "ch11", 471a3fb9ff3SMarek Vasut "ch12", "ch13", "ch14"; 472a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 219>; 473a3fb9ff3SMarek Vasut clock-names = "fck"; 474a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 475a3fb9ff3SMarek Vasut resets = <&cpg 219>; 476a3fb9ff3SMarek Vasut #dma-cells = <1>; 477a3fb9ff3SMarek Vasut dma-channels = <15>; 478a3fb9ff3SMarek Vasut }; 479a3fb9ff3SMarek Vasut 480a3fb9ff3SMarek Vasut dmac1: dma-controller@e6720000 { 481a3fb9ff3SMarek Vasut compatible = "renesas,dmac-r8a7792", 482a3fb9ff3SMarek Vasut "renesas,rcar-dmac"; 483a3fb9ff3SMarek Vasut reg = <0 0xe6720000 0 0x20000>; 484a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 485a3fb9ff3SMarek Vasut GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 486a3fb9ff3SMarek Vasut GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 487a3fb9ff3SMarek Vasut GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 488a3fb9ff3SMarek Vasut GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 489a3fb9ff3SMarek Vasut GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 490a3fb9ff3SMarek Vasut GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 491a3fb9ff3SMarek Vasut GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 492a3fb9ff3SMarek Vasut GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 493a3fb9ff3SMarek Vasut GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 494a3fb9ff3SMarek Vasut GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 495a3fb9ff3SMarek Vasut GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 496a3fb9ff3SMarek Vasut GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 497a3fb9ff3SMarek Vasut GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 498a3fb9ff3SMarek Vasut GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 499a3fb9ff3SMarek Vasut GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 500a3fb9ff3SMarek Vasut interrupt-names = "error", 501a3fb9ff3SMarek Vasut "ch0", "ch1", "ch2", "ch3", 502a3fb9ff3SMarek Vasut "ch4", "ch5", "ch6", "ch7", 503a3fb9ff3SMarek Vasut "ch8", "ch9", "ch10", "ch11", 504a3fb9ff3SMarek Vasut "ch12", "ch13", "ch14"; 505a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 218>; 506a3fb9ff3SMarek Vasut clock-names = "fck"; 507a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 508a3fb9ff3SMarek Vasut resets = <&cpg 218>; 509a3fb9ff3SMarek Vasut #dma-cells = <1>; 510a3fb9ff3SMarek Vasut dma-channels = <15>; 511a3fb9ff3SMarek Vasut }; 512a3fb9ff3SMarek Vasut 513252c8b45SMarek Vasut avb: ethernet@e6800000 { 514252c8b45SMarek Vasut compatible = "renesas,etheravb-r8a7792", 515252c8b45SMarek Vasut "renesas,etheravb-rcar-gen2"; 516252c8b45SMarek Vasut reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 517252c8b45SMarek Vasut interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 518252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 812>; 519252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 520252c8b45SMarek Vasut resets = <&cpg 812>; 521252c8b45SMarek Vasut #address-cells = <1>; 522252c8b45SMarek Vasut #size-cells = <0>; 523252c8b45SMarek Vasut status = "disabled"; 524252c8b45SMarek Vasut }; 525252c8b45SMarek Vasut 526252c8b45SMarek Vasut qspi: spi@e6b10000 { 527252c8b45SMarek Vasut compatible = "renesas,qspi-r8a7792", "renesas,qspi"; 528252c8b45SMarek Vasut reg = <0 0xe6b10000 0 0x2c>; 529252c8b45SMarek Vasut interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 530252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 917>; 531252c8b45SMarek Vasut dmas = <&dmac0 0x17>, <&dmac0 0x18>, 532252c8b45SMarek Vasut <&dmac1 0x17>, <&dmac1 0x18>; 533252c8b45SMarek Vasut dma-names = "tx", "rx", "tx", "rx"; 534252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 535252c8b45SMarek Vasut resets = <&cpg 917>; 536252c8b45SMarek Vasut num-cs = <1>; 537252c8b45SMarek Vasut #address-cells = <1>; 538252c8b45SMarek Vasut #size-cells = <0>; 539252c8b45SMarek Vasut status = "disabled"; 540252c8b45SMarek Vasut }; 541252c8b45SMarek Vasut 542a3fb9ff3SMarek Vasut scif0: serial@e6e60000 { 543a3fb9ff3SMarek Vasut compatible = "renesas,scif-r8a7792", 544a3fb9ff3SMarek Vasut "renesas,rcar-gen2-scif", "renesas,scif"; 545a3fb9ff3SMarek Vasut reg = <0 0xe6e60000 0 64>; 546a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 547a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 721>, 548a3fb9ff3SMarek Vasut <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; 549a3fb9ff3SMarek Vasut clock-names = "fck", "brg_int", "scif_clk"; 550a3fb9ff3SMarek Vasut dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 551a3fb9ff3SMarek Vasut <&dmac1 0x29>, <&dmac1 0x2a>; 552a3fb9ff3SMarek Vasut dma-names = "tx", "rx", "tx", "rx"; 553a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 554a3fb9ff3SMarek Vasut resets = <&cpg 721>; 555a3fb9ff3SMarek Vasut status = "disabled"; 556a3fb9ff3SMarek Vasut }; 557a3fb9ff3SMarek Vasut 558a3fb9ff3SMarek Vasut scif1: serial@e6e68000 { 559a3fb9ff3SMarek Vasut compatible = "renesas,scif-r8a7792", 560a3fb9ff3SMarek Vasut "renesas,rcar-gen2-scif", "renesas,scif"; 561a3fb9ff3SMarek Vasut reg = <0 0xe6e68000 0 64>; 562a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 563a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 720>, 564a3fb9ff3SMarek Vasut <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; 565a3fb9ff3SMarek Vasut clock-names = "fck", "brg_int", "scif_clk"; 566a3fb9ff3SMarek Vasut dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 567a3fb9ff3SMarek Vasut <&dmac1 0x2d>, <&dmac1 0x2e>; 568a3fb9ff3SMarek Vasut dma-names = "tx", "rx", "tx", "rx"; 569a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 570a3fb9ff3SMarek Vasut resets = <&cpg 720>; 571a3fb9ff3SMarek Vasut status = "disabled"; 572a3fb9ff3SMarek Vasut }; 573a3fb9ff3SMarek Vasut 574a3fb9ff3SMarek Vasut scif2: serial@e6e58000 { 575a3fb9ff3SMarek Vasut compatible = "renesas,scif-r8a7792", 576a3fb9ff3SMarek Vasut "renesas,rcar-gen2-scif", "renesas,scif"; 577a3fb9ff3SMarek Vasut reg = <0 0xe6e58000 0 64>; 578a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 579a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 719>, 580a3fb9ff3SMarek Vasut <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; 581a3fb9ff3SMarek Vasut clock-names = "fck", "brg_int", "scif_clk"; 582a3fb9ff3SMarek Vasut dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 583a3fb9ff3SMarek Vasut <&dmac1 0x2b>, <&dmac1 0x2c>; 584a3fb9ff3SMarek Vasut dma-names = "tx", "rx", "tx", "rx"; 585a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 586a3fb9ff3SMarek Vasut resets = <&cpg 719>; 587a3fb9ff3SMarek Vasut status = "disabled"; 588a3fb9ff3SMarek Vasut }; 589a3fb9ff3SMarek Vasut 590a3fb9ff3SMarek Vasut scif3: serial@e6ea8000 { 591a3fb9ff3SMarek Vasut compatible = "renesas,scif-r8a7792", 592a3fb9ff3SMarek Vasut "renesas,rcar-gen2-scif", "renesas,scif"; 593a3fb9ff3SMarek Vasut reg = <0 0xe6ea8000 0 64>; 594a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 595a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 718>, 596a3fb9ff3SMarek Vasut <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; 597a3fb9ff3SMarek Vasut clock-names = "fck", "brg_int", "scif_clk"; 598a3fb9ff3SMarek Vasut dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 599a3fb9ff3SMarek Vasut <&dmac1 0x2f>, <&dmac1 0x30>; 600a3fb9ff3SMarek Vasut dma-names = "tx", "rx", "tx", "rx"; 601a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 602a3fb9ff3SMarek Vasut resets = <&cpg 718>; 603a3fb9ff3SMarek Vasut status = "disabled"; 604a3fb9ff3SMarek Vasut }; 605a3fb9ff3SMarek Vasut 606a3fb9ff3SMarek Vasut hscif0: serial@e62c0000 { 607a3fb9ff3SMarek Vasut compatible = "renesas,hscif-r8a7792", 608a3fb9ff3SMarek Vasut "renesas,rcar-gen2-hscif", "renesas,hscif"; 609a3fb9ff3SMarek Vasut reg = <0 0xe62c0000 0 96>; 610a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 611a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 717>, 612a3fb9ff3SMarek Vasut <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; 613a3fb9ff3SMarek Vasut clock-names = "fck", "brg_int", "scif_clk"; 614a3fb9ff3SMarek Vasut dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 615a3fb9ff3SMarek Vasut <&dmac1 0x39>, <&dmac1 0x3a>; 616a3fb9ff3SMarek Vasut dma-names = "tx", "rx", "tx", "rx"; 617a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 618a3fb9ff3SMarek Vasut resets = <&cpg 717>; 619a3fb9ff3SMarek Vasut status = "disabled"; 620a3fb9ff3SMarek Vasut }; 621a3fb9ff3SMarek Vasut 622a3fb9ff3SMarek Vasut hscif1: serial@e62c8000 { 623a3fb9ff3SMarek Vasut compatible = "renesas,hscif-r8a7792", 624a3fb9ff3SMarek Vasut "renesas,rcar-gen2-hscif", "renesas,hscif"; 625a3fb9ff3SMarek Vasut reg = <0 0xe62c8000 0 96>; 626a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 627a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 716>, 628a3fb9ff3SMarek Vasut <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; 629a3fb9ff3SMarek Vasut clock-names = "fck", "brg_int", "scif_clk"; 630a3fb9ff3SMarek Vasut dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 631a3fb9ff3SMarek Vasut <&dmac1 0x4d>, <&dmac1 0x4e>; 632a3fb9ff3SMarek Vasut dma-names = "tx", "rx", "tx", "rx"; 633a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 634a3fb9ff3SMarek Vasut resets = <&cpg 716>; 635a3fb9ff3SMarek Vasut status = "disabled"; 636a3fb9ff3SMarek Vasut }; 637a3fb9ff3SMarek Vasut 638a3fb9ff3SMarek Vasut msiof0: spi@e6e20000 { 639a3fb9ff3SMarek Vasut compatible = "renesas,msiof-r8a7792", 640a3fb9ff3SMarek Vasut "renesas,rcar-gen2-msiof"; 641a3fb9ff3SMarek Vasut reg = <0 0xe6e20000 0 0x0064>; 642a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 643a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 000>; 644a3fb9ff3SMarek Vasut dmas = <&dmac0 0x51>, <&dmac0 0x52>, 645a3fb9ff3SMarek Vasut <&dmac1 0x51>, <&dmac1 0x52>; 646a3fb9ff3SMarek Vasut dma-names = "tx", "rx", "tx", "rx"; 647a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 648a3fb9ff3SMarek Vasut resets = <&cpg 000>; 649a3fb9ff3SMarek Vasut #address-cells = <1>; 650a3fb9ff3SMarek Vasut #size-cells = <0>; 651a3fb9ff3SMarek Vasut status = "disabled"; 652a3fb9ff3SMarek Vasut }; 653a3fb9ff3SMarek Vasut 654a3fb9ff3SMarek Vasut msiof1: spi@e6e10000 { 655a3fb9ff3SMarek Vasut compatible = "renesas,msiof-r8a7792", 656a3fb9ff3SMarek Vasut "renesas,rcar-gen2-msiof"; 657a3fb9ff3SMarek Vasut reg = <0 0xe6e10000 0 0x0064>; 658a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 659a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 208>; 660a3fb9ff3SMarek Vasut dmas = <&dmac0 0x55>, <&dmac0 0x56>, 661a3fb9ff3SMarek Vasut <&dmac1 0x55>, <&dmac1 0x56>; 662a3fb9ff3SMarek Vasut dma-names = "tx", "rx", "tx", "rx"; 663a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 664a3fb9ff3SMarek Vasut resets = <&cpg 208>; 665a3fb9ff3SMarek Vasut #address-cells = <1>; 666a3fb9ff3SMarek Vasut #size-cells = <0>; 667a3fb9ff3SMarek Vasut status = "disabled"; 668a3fb9ff3SMarek Vasut }; 669a3fb9ff3SMarek Vasut 670a3fb9ff3SMarek Vasut can0: can@e6e80000 { 671a3fb9ff3SMarek Vasut compatible = "renesas,can-r8a7792", 672a3fb9ff3SMarek Vasut "renesas,rcar-gen2-can"; 673a3fb9ff3SMarek Vasut reg = <0 0xe6e80000 0 0x1000>; 674a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 675a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 916>, 676a3fb9ff3SMarek Vasut <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>; 677a3fb9ff3SMarek Vasut clock-names = "clkp1", "clkp2", "can_clk"; 678a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 679a3fb9ff3SMarek Vasut resets = <&cpg 916>; 680a3fb9ff3SMarek Vasut status = "disabled"; 681a3fb9ff3SMarek Vasut }; 682a3fb9ff3SMarek Vasut 683a3fb9ff3SMarek Vasut can1: can@e6e88000 { 684a3fb9ff3SMarek Vasut compatible = "renesas,can-r8a7792", 685a3fb9ff3SMarek Vasut "renesas,rcar-gen2-can"; 686a3fb9ff3SMarek Vasut reg = <0 0xe6e88000 0 0x1000>; 687a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 688a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 915>, 689a3fb9ff3SMarek Vasut <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>; 690a3fb9ff3SMarek Vasut clock-names = "clkp1", "clkp2", "can_clk"; 691a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 692a3fb9ff3SMarek Vasut resets = <&cpg 915>; 693a3fb9ff3SMarek Vasut status = "disabled"; 694a3fb9ff3SMarek Vasut }; 695a3fb9ff3SMarek Vasut 696a3fb9ff3SMarek Vasut vin0: video@e6ef0000 { 697a3fb9ff3SMarek Vasut compatible = "renesas,vin-r8a7792", 698a3fb9ff3SMarek Vasut "renesas,rcar-gen2-vin"; 699a3fb9ff3SMarek Vasut reg = <0 0xe6ef0000 0 0x1000>; 700a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 701a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 811>; 702a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 703a3fb9ff3SMarek Vasut resets = <&cpg 811>; 704a3fb9ff3SMarek Vasut status = "disabled"; 705a3fb9ff3SMarek Vasut }; 706a3fb9ff3SMarek Vasut 707a3fb9ff3SMarek Vasut vin1: video@e6ef1000 { 708a3fb9ff3SMarek Vasut compatible = "renesas,vin-r8a7792", 709a3fb9ff3SMarek Vasut "renesas,rcar-gen2-vin"; 710a3fb9ff3SMarek Vasut reg = <0 0xe6ef1000 0 0x1000>; 711a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 712a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 810>; 713a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 714a3fb9ff3SMarek Vasut resets = <&cpg 810>; 715a3fb9ff3SMarek Vasut status = "disabled"; 716a3fb9ff3SMarek Vasut }; 717a3fb9ff3SMarek Vasut 718a3fb9ff3SMarek Vasut vin2: video@e6ef2000 { 719a3fb9ff3SMarek Vasut compatible = "renesas,vin-r8a7792", 720a3fb9ff3SMarek Vasut "renesas,rcar-gen2-vin"; 721a3fb9ff3SMarek Vasut reg = <0 0xe6ef2000 0 0x1000>; 722a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 723a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 809>; 724a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 725a3fb9ff3SMarek Vasut resets = <&cpg 809>; 726a3fb9ff3SMarek Vasut status = "disabled"; 727a3fb9ff3SMarek Vasut }; 728a3fb9ff3SMarek Vasut 729a3fb9ff3SMarek Vasut vin3: video@e6ef3000 { 730a3fb9ff3SMarek Vasut compatible = "renesas,vin-r8a7792", 731a3fb9ff3SMarek Vasut "renesas,rcar-gen2-vin"; 732a3fb9ff3SMarek Vasut reg = <0 0xe6ef3000 0 0x1000>; 733a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 734a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 808>; 735a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 736a3fb9ff3SMarek Vasut resets = <&cpg 808>; 737a3fb9ff3SMarek Vasut status = "disabled"; 738a3fb9ff3SMarek Vasut }; 739a3fb9ff3SMarek Vasut 740a3fb9ff3SMarek Vasut vin4: video@e6ef4000 { 741a3fb9ff3SMarek Vasut compatible = "renesas,vin-r8a7792", 742a3fb9ff3SMarek Vasut "renesas,rcar-gen2-vin"; 743a3fb9ff3SMarek Vasut reg = <0 0xe6ef4000 0 0x1000>; 744a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 745a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 805>; 746a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 747a3fb9ff3SMarek Vasut resets = <&cpg 805>; 748a3fb9ff3SMarek Vasut status = "disabled"; 749a3fb9ff3SMarek Vasut }; 750a3fb9ff3SMarek Vasut 751a3fb9ff3SMarek Vasut vin5: video@e6ef5000 { 752a3fb9ff3SMarek Vasut compatible = "renesas,vin-r8a7792", 753a3fb9ff3SMarek Vasut "renesas,rcar-gen2-vin"; 754a3fb9ff3SMarek Vasut reg = <0 0xe6ef5000 0 0x1000>; 755a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 756a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 804>; 757a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 758a3fb9ff3SMarek Vasut resets = <&cpg 804>; 759a3fb9ff3SMarek Vasut status = "disabled"; 760a3fb9ff3SMarek Vasut }; 761a3fb9ff3SMarek Vasut 762252c8b45SMarek Vasut sdhi0: sd@ee100000 { 763252c8b45SMarek Vasut compatible = "renesas,sdhi-r8a7792", 764252c8b45SMarek Vasut "renesas,rcar-gen2-sdhi"; 765252c8b45SMarek Vasut reg = <0 0xee100000 0 0x328>; 766252c8b45SMarek Vasut interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; 767252c8b45SMarek Vasut dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 768252c8b45SMarek Vasut <&dmac1 0xcd>, <&dmac1 0xce>; 769252c8b45SMarek Vasut dma-names = "tx", "rx", "tx", "rx"; 770252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 314>; 771252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 772252c8b45SMarek Vasut resets = <&cpg 314>; 773252c8b45SMarek Vasut status = "disabled"; 774252c8b45SMarek Vasut }; 775252c8b45SMarek Vasut 776252c8b45SMarek Vasut gic: interrupt-controller@f1001000 { 777252c8b45SMarek Vasut compatible = "arm,gic-400"; 778252c8b45SMarek Vasut #interrupt-cells = <3>; 779252c8b45SMarek Vasut interrupt-controller; 780252c8b45SMarek Vasut reg = <0 0xf1001000 0 0x1000>, 781252c8b45SMarek Vasut <0 0xf1002000 0 0x2000>, 782252c8b45SMarek Vasut <0 0xf1004000 0 0x2000>, 783252c8b45SMarek Vasut <0 0xf1006000 0 0x2000>; 784252c8b45SMarek Vasut interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | 785252c8b45SMarek Vasut IRQ_TYPE_LEVEL_HIGH)>; 786252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 408>; 787252c8b45SMarek Vasut clock-names = "clk"; 788252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 789252c8b45SMarek Vasut resets = <&cpg 408>; 790252c8b45SMarek Vasut }; 791252c8b45SMarek Vasut 792a3fb9ff3SMarek Vasut vsp@fe928000 { 793a3fb9ff3SMarek Vasut compatible = "renesas,vsp1"; 794a3fb9ff3SMarek Vasut reg = <0 0xfe928000 0 0x8000>; 795a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 796a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 131>; 797a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 798a3fb9ff3SMarek Vasut resets = <&cpg 131>; 799a3fb9ff3SMarek Vasut }; 800a3fb9ff3SMarek Vasut 801a3fb9ff3SMarek Vasut vsp@fe930000 { 802a3fb9ff3SMarek Vasut compatible = "renesas,vsp1"; 803a3fb9ff3SMarek Vasut reg = <0 0xfe930000 0 0x8000>; 804a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 805a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 128>; 806a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 807a3fb9ff3SMarek Vasut resets = <&cpg 128>; 808a3fb9ff3SMarek Vasut }; 809a3fb9ff3SMarek Vasut 810a3fb9ff3SMarek Vasut vsp@fe938000 { 811a3fb9ff3SMarek Vasut compatible = "renesas,vsp1"; 812a3fb9ff3SMarek Vasut reg = <0 0xfe938000 0 0x8000>; 813a3fb9ff3SMarek Vasut interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 814a3fb9ff3SMarek Vasut clocks = <&cpg CPG_MOD 127>; 815a3fb9ff3SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 816a3fb9ff3SMarek Vasut resets = <&cpg 127>; 817a3fb9ff3SMarek Vasut }; 818a3fb9ff3SMarek Vasut 819252c8b45SMarek Vasut jpu: jpeg-codec@fe980000 { 820252c8b45SMarek Vasut compatible = "renesas,jpu-r8a7792", 821252c8b45SMarek Vasut "renesas,rcar-gen2-jpu"; 822252c8b45SMarek Vasut reg = <0 0xfe980000 0 0x10300>; 823252c8b45SMarek Vasut interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; 824252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 106>; 825252c8b45SMarek Vasut power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 826252c8b45SMarek Vasut resets = <&cpg 106>; 827252c8b45SMarek Vasut }; 828252c8b45SMarek Vasut 829252c8b45SMarek Vasut du: display@feb00000 { 830252c8b45SMarek Vasut compatible = "renesas,du-r8a7792"; 831252c8b45SMarek Vasut reg = <0 0xfeb00000 0 0x40000>; 832252c8b45SMarek Vasut reg-names = "du"; 833252c8b45SMarek Vasut interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 834252c8b45SMarek Vasut <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 835252c8b45SMarek Vasut clocks = <&cpg CPG_MOD 724>, 836252c8b45SMarek Vasut <&cpg CPG_MOD 723>; 837252c8b45SMarek Vasut clock-names = "du.0", "du.1"; 838252c8b45SMarek Vasut status = "disabled"; 839252c8b45SMarek Vasut 840252c8b45SMarek Vasut ports { 841252c8b45SMarek Vasut #address-cells = <1>; 842252c8b45SMarek Vasut #size-cells = <0>; 843252c8b45SMarek Vasut 844252c8b45SMarek Vasut port@0 { 845252c8b45SMarek Vasut reg = <0>; 846252c8b45SMarek Vasut du_out_rgb0: endpoint { 847252c8b45SMarek Vasut }; 848252c8b45SMarek Vasut }; 849252c8b45SMarek Vasut port@1 { 850252c8b45SMarek Vasut reg = <1>; 851252c8b45SMarek Vasut du_out_rgb1: endpoint { 852252c8b45SMarek Vasut }; 853252c8b45SMarek Vasut }; 854a3fb9ff3SMarek Vasut }; 855a3fb9ff3SMarek Vasut }; 856a3fb9ff3SMarek Vasut 857252c8b45SMarek Vasut prr: chipid@ff000044 { 858252c8b45SMarek Vasut compatible = "renesas,prr"; 859252c8b45SMarek Vasut reg = <0 0xff000044 0 4>; 860252c8b45SMarek Vasut }; 861a3fb9ff3SMarek Vasut }; 862a3fb9ff3SMarek Vasut 863252c8b45SMarek Vasut timer { 864252c8b45SMarek Vasut compatible = "arm,armv7-timer"; 865252c8b45SMarek Vasut interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 866252c8b45SMarek Vasut <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 867252c8b45SMarek Vasut <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 868252c8b45SMarek Vasut <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 869a3fb9ff3SMarek Vasut }; 870a3fb9ff3SMarek Vasut}; 871