| /openbmc/linux/drivers/pwm/ |
| H A D | pwm-mtk-disp.c | 32 unsigned int con0; member
145 mtk_disp_pwm_update_bits(mdp, mdp->data->con0, in mtk_disp_pwm_apply()
150 mtk_disp_pwm_update_bits(mdp, mdp->data->con0, in mtk_disp_pwm_apply()
179 u32 clk_div, pwm_en, con0, con1; in mtk_disp_pwm_get_state() local
206 con0 = readl(mdp->base + mdp->data->con0); in mtk_disp_pwm_get_state()
210 clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0); in mtk_disp_pwm_get_state()
280 .con0 = 0xa8,
290 .con0 = 0x10,
300 .con0 = 0x18,
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-pll.c | 655 u32 con0, con1; in samsung_pll45xx_set_rate() local
665 con0 = readl_relaxed(pll->con_reg); in samsung_pll45xx_set_rate()
672 writel_relaxed(con0, pll->con_reg); in samsung_pll45xx_set_rate()
704 writel_relaxed(con0, pll->con_reg); in samsung_pll45xx_set_rate()
792 u32 con0, con1, lock; in samsung_pll46xx_set_rate() local
802 con0 = readl_relaxed(pll->con_reg); in samsung_pll46xx_set_rate()
809 writel_relaxed(con0, pll->con_reg); in samsung_pll46xx_set_rate()
848 writel_relaxed(con0, pll->con_reg); in samsung_pll46xx_set_rate()
1125 u32 con0, con1; in samsung_pll2650x_set_rate() local
1135 con0 = readl_relaxed(pll->con_reg); in samsung_pll2650x_set_rate()
[all …]
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| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rv1108.c | 93 rk_clrsetreg(&pll->con0, FBDIV_MASK, div->fbdiv << FBDIV_SHIFT); in rkclk_set_pll()
121 uint32_t con0, con1, con3; in rkclk_pll_get_rate() local
129 con0 = readl(&pll->con0); in rkclk_pll_get_rate()
131 fbdiv = (con0 >> FBDIV_SHIFT) & FBDIV_MASK; in rkclk_pll_get_rate()
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| H A D | clk_rk3036.c | 64 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
197 con = readl(&pll->con0); in rkclk_pll_get_rate()
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| H A D | clk_rk322x.c | 62 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
198 con = readl(&pll->con0); in rkclk_pll_get_rate()
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| H A D | clk_rk3188.c | 103 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
245 con = readl(&pll->con0); in rkclk_pll_get_rate()
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| H A D | clk_rk3128.c | 59 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
265 con = readl(&pll->con0); in rkclk_pll_get_rate()
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| H A D | clk_rk3368.c | 74 con = readl(&pll->con0); in rkclk_pll_get_rate()
103 rk_clrsetreg(&pll->con0, PLL_NR_MASK | PLL_OD_MASK, in rkclk_set_pll()
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| H A D | clk_rk3288.c | 162 rk_clrsetreg(&pll->con0, CLKR_MASK | PLL_OD_MASK, in rkclk_set_pll()
557 con = readl(&pll->con0); in rkclk_pll_get_rate()
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| /openbmc/u-boot/arch/arm/include/asm/arch-rockchip/ |
| H A D | cru_rk3188.h | 35 u32 con0; member
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| H A D | cru_rk3368.h | 25 unsigned int con0; member
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| H A D | cru_rk3036.h | 34 unsigned int con0; member
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| H A D | cru_rk322x.h | 35 unsigned int con0; member
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| H A D | cru_rk3128.h | 35 unsigned int con0; member
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| H A D | cru_rk3288.h | 36 u32 con0; member
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| H A D | cru_rv1108.h | 27 unsigned int con0; member
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| /openbmc/linux/sound/soc/mediatek/mt8195/ |
| H A D | mt8195-dai-etdm.c | 90 unsigned int con0; member
201 etdm_reg->con0 = ETDM_IN1_CON0; in get_etdm_reg()
209 etdm_reg->con0 = ETDM_IN2_CON0; in get_etdm_reg()
217 etdm_reg->con0 = ETDM_OUT1_CON0; in get_etdm_reg()
225 etdm_reg->con0 = ETDM_OUT2_CON0; in get_etdm_reg()
234 etdm_reg->con0 = ETDM_OUT3_CON0; in get_etdm_reg()
1335 regmap_update_bits(afe->regmap, etdm_reg.con0, in mt8195_afe_enable_etdm()
1363 regmap_update_bits(afe->regmap, etdm_reg.con0, in mt8195_afe_disable_etdm()
1847 regmap_update_bits(afe->regmap, etdm_reg.con0, mask, val); in mtk_dai_etdm_out_configure()
2028 regmap_update_bits(afe->regmap, etdm_reg.con0, mask, val); in mtk_dai_etdm_configure()
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| /openbmc/linux/sound/soc/mediatek/mt8188/ |
| H A D | mt8188-dai-etdm.c | 81 unsigned int con0; member
160 etdm_reg->con0 = ETDM_IN1_CON0; in get_etdm_reg()
168 etdm_reg->con0 = ETDM_IN2_CON0; in get_etdm_reg()
176 etdm_reg->con0 = ETDM_OUT1_CON0; in get_etdm_reg()
184 etdm_reg->con0 = ETDM_OUT2_CON0; in get_etdm_reg()
193 etdm_reg->con0 = ETDM_OUT3_CON0; in get_etdm_reg()
1838 regmap_set_bits(afe->regmap, etdm_reg.con0, ETDM_CON0_SYNC_MODE); in mt8188_etdm_sync_mode_mst()
2046 regmap_update_bits(afe->regmap, etdm_reg.con0, mask, val); in mtk_dai_etdm_out_configure()
2163 regmap_update_bits(afe->regmap, etdm_reg.con0, mask, val); in mtk_dai_etdm_configure()
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| /openbmc/linux/drivers/video/fbdev/ |
| H A D | pxa168fb.h | 357 #define CFG_COS0(con0) (con0) argument
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| /openbmc/linux/drivers/video/fbdev/mmp/hw/ |
| H A D | mmp_ctrl.h | 585 #define CFG_COS0(con0) (con0) argument
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| /openbmc/linux/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac-rk.c | 1043 u32 con0, con1; in rk3568_set_to_rgmii() local
1050 con0 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON0 : in rk3568_set_to_rgmii()
1055 regmap_write(bsp_priv->grf, con0, in rk3568_set_to_rgmii()
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| /openbmc/u-boot/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 338 rk_clrsetreg(&pll->con0, in rkdclk_init()
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| /openbmc/linux/Documentation/virt/uml/ |
| H A D | user_mode_linux_howto_v2.rst | 695 root=/dev/ubda con=null con0=null,fd:2 con1=fd:0,fd:1
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