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Searched refs:cntl (Results 1 – 25 of 49) sorted by relevance

12

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.c969 cntl.coherent = false; in dce110_link_encoder_hw_init()
1062 cntl.pll_id = clock_source; in dce110_link_encoder_enable_tmds_output()
1063 cntl.signal = signal; in dce110_link_encoder_enable_tmds_output()
1065 cntl.lanes_number = 8; in dce110_link_encoder_enable_tmds_output()
1067 cntl.lanes_number = 4; in dce110_link_encoder_enable_tmds_output()
1098 cntl.pll_id = clock_source; in dce110_link_encoder_enable_lvds_output()
1100 cntl.lanes_number = 4; in dce110_link_encoder_enable_lvds_output()
1136 cntl.pll_id = clock_source; in dce110_link_encoder_enable_dp_output()
1175 cntl.pll_id = clock_source; in dce110_link_encoder_enable_dp_mst_output()
1303 cntl.signal = signal; in dce110_link_encoder_disable_output()
[all …]
H A Ddce_stream_encoder.c542 cntl.action = ENCODER_CONTROL_SETUP; in dce110_stream_encoder_hdmi_set_stream_attribute()
543 cntl.engine_id = enc110->base.id; in dce110_stream_encoder_hdmi_set_stream_attribute()
545 cntl.enable_dp_audio = enable_audio; in dce110_stream_encoder_hdmi_set_stream_attribute()
547 cntl.lanes_number = LANE_COUNT_FOUR; in dce110_stream_encoder_hdmi_set_stream_attribute()
658 cntl.action = ENCODER_CONTROL_SETUP; in dce110_stream_encoder_dvi_set_stream_attribute()
659 cntl.engine_id = enc110->base.id; in dce110_stream_encoder_dvi_set_stream_attribute()
660 cntl.signal = is_dual_link ? in dce110_stream_encoder_dvi_set_stream_attribute()
662 cntl.enable_dp_audio = false; in dce110_stream_encoder_dvi_set_stream_attribute()
684 cntl.engine_id = enc110->base.id; in dce110_stream_encoder_lvds_set_stream_attribute()
685 cntl.signal = SIGNAL_TYPE_LVDS; in dce110_stream_encoder_lvds_set_stream_attribute()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/bios/
H A Dcommand_table.c175 if (cntl != NULL) in encoder_control_dig_v1()
176 switch (cntl->engine_id) { in encoder_control_dig_v1()
244 cntl->signal, in encoder_control_digx_v3()
290 cntl->signal, in encoder_control_digx_v4()
330 cntl->signal, in encoder_control_digx_v5()
454 switch (cntl->action) { in transmitter_control_v2()
541 cntl->transmitter); in transmitter_control_v2()
583 switch (cntl->action) { in transmitter_control_v3()
714 switch (cntl->action) { in transmitter_control_v4()
902 switch (cntl->signal) { in transmitter_control_v1_6()
[all …]
H A Dcommand_table2.c88 struct bp_encoder_control *cntl);
92 struct bp_encoder_control *cntl);
131 struct bp_encoder_control *cntl) in encoder_control_digx_v1_5() argument
142 cntl->signal, in encoder_control_digx_v1_5()
143 cntl->enable_dp_audio)); in encoder_control_digx_v1_5()
146 switch (cntl->color_depth) { in encoder_control_digx_v1_5()
164 switch (cntl->color_depth) { in encoder_control_digx_v1_5()
195 struct bp_encoder_control *cntl) in encoder_control_fallback() argument
267 struct bp_transmitter_control *cntl) in transmitter_control_v1_6() argument
329 struct bp_transmitter_control *cntl) in transmitter_control_v1_7() argument
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.c840 cntl.coherent = false; in dcn10_link_encoder_hw_init()
844 cntl.signal = SIGNAL_TYPE_EDP; in dcn10_link_encoder_hw_init()
934 cntl.pll_id = clock_source; in dcn10_link_encoder_enable_tmds_output()
935 cntl.signal = signal; in dcn10_link_encoder_enable_tmds_output()
937 cntl.lanes_number = 8; in dcn10_link_encoder_enable_tmds_output()
939 cntl.lanes_number = 4; in dcn10_link_encoder_enable_tmds_output()
943 cntl.pixel_clock = pixel_clock; in dcn10_link_encoder_enable_tmds_output()
991 cntl.pll_id = clock_source; in dcn10_link_encoder_enable_dp_output()
1030 cntl.pll_id = clock_source; in dcn10_link_encoder_enable_dp_mst_output()
1081 cntl.signal = signal; in dcn10_link_encoder_disable_output()
[all …]
H A Ddcn10_stream_encoder.c488 struct bp_encoder_control cntl = {0}; in enc1_stream_encoder_hdmi_set_stream_attribute() local
490 cntl.action = ENCODER_CONTROL_SETUP; in enc1_stream_encoder_hdmi_set_stream_attribute()
491 cntl.engine_id = enc1->base.id; in enc1_stream_encoder_hdmi_set_stream_attribute()
492 cntl.signal = SIGNAL_TYPE_HDMI_TYPE_A; in enc1_stream_encoder_hdmi_set_stream_attribute()
493 cntl.enable_dp_audio = enable_audio; in enc1_stream_encoder_hdmi_set_stream_attribute()
495 cntl.lanes_number = LANE_COUNT_FOUR; in enc1_stream_encoder_hdmi_set_stream_attribute()
607 struct bp_encoder_control cntl = {0}; in enc1_stream_encoder_dvi_set_stream_attribute() local
609 cntl.action = ENCODER_CONTROL_SETUP; in enc1_stream_encoder_dvi_set_stream_attribute()
610 cntl.engine_id = enc1->base.id; in enc1_stream_encoder_dvi_set_stream_attribute()
611 cntl.signal = is_dual_link ? in enc1_stream_encoder_dvi_set_stream_attribute()
[all …]
/openbmc/linux/drivers/gpu/drm/pl111/
H A Dpl111_display.c132 u32 cntl; in pl111_display_enable() local
274 cntl |= CNTL_LCDBPP24; in pl111_display_enable()
279 cntl |= CNTL_LCDBPP24; in pl111_display_enable()
301 cntl |= CNTL_LCDBPP16; in pl111_display_enable()
307 cntl |= CNTL_LCDBPP16; in pl111_display_enable()
311 cntl |= CNTL_BGR; in pl111_display_enable()
325 cntl |= CNTL_BGR; in pl111_display_enable()
335 cntl &= ~CNTL_BGR; in pl111_display_enable()
350 cntl |= CNTL_LCDPWR; in pl111_display_enable()
362 u32 cntl; in pl111_display_disable() local
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_hpo_dp_link_encoder.c496 struct bp_transmitter_control *cntl) in link_transmitter_control() argument
524 cntl.action = TRANSMITTER_CONTROL_ENABLE; in dcn31_hpo_dp_link_enc_enable_dp_output()
525 cntl.engine_id = ENGINE_ID_UNKNOWN; in dcn31_hpo_dp_link_enc_enable_dp_output()
526 cntl.transmitter = enc3->base.transmitter; in dcn31_hpo_dp_link_enc_enable_dp_output()
530 cntl.hpd_sel = enc3->base.hpd_source; in dcn31_hpo_dp_link_enc_enable_dp_output()
532 cntl.color_depth = COLOR_DEPTH_UNDEFINED; in dcn31_hpo_dp_link_enc_enable_dp_output()
553 cntl.action = TRANSMITTER_CONTROL_DISABLE; in dcn31_hpo_dp_link_enc_disable_output()
554 cntl.transmitter = enc3->base.transmitter; in dcn31_hpo_dp_link_enc_disable_output()
555 cntl.hpd_sel = enc3->base.hpd_source; in dcn31_hpo_dp_link_enc_disable_output()
556 cntl.signal = signal; in dcn31_hpo_dp_link_enc_disable_output()
[all …]
/openbmc/linux/arch/arm/mach-omap1/
H A Dtime.c65 u32 cntl; /* CNTL_TIMER, R/W */ member
84 writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl); in omap_mpu_set_autoreset()
91 writel(readl(&timer->cntl) & ~MPU_TIMER_AR, &timer->cntl); in omap_mpu_remove_autoreset()
103 writel(MPU_TIMER_CLOCK_ENABLE, &timer->cntl); in omap_mpu_timer_start()
107 writel(timerflags, &timer->cntl); in omap_mpu_timer_start()
114 writel(readl(&timer->cntl) & ~MPU_TIMER_ST, &timer->cntl); in omap_mpu_timer_stop()
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_cursor.c185 u32 cntl = 0; in i845_cursor_ctl_crtc() local
190 return cntl; in i845_cursor_ctl_crtc()
282 plane->cursor.cntl != cntl) { in i845_cursor_update_arm()
291 plane->cursor.cntl = cntl; in i845_cursor_update_arm()
337 u32 cntl = 0; in i9xx_cursor_ctl_crtc() local
340 return cntl; in i9xx_cursor_ctl_crtc()
351 return cntl; in i9xx_cursor_ctl_crtc()
359 u32 cntl = 0; in i9xx_cursor_ctl() local
386 return cntl; in i9xx_cursor_ctl()
541 plane->cursor.cntl != cntl) { in i9xx_cursor_update_arm()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dio_stream_encoder.c71 struct bp_encoder_control cntl = {0}; in enc32_stream_encoder_dvi_set_stream_attribute() local
73 cntl.action = ENCODER_CONTROL_SETUP; in enc32_stream_encoder_dvi_set_stream_attribute()
74 cntl.engine_id = enc1->base.id; in enc32_stream_encoder_dvi_set_stream_attribute()
75 cntl.signal = is_dual_link ? in enc32_stream_encoder_dvi_set_stream_attribute()
77 cntl.enable_dp_audio = false; in enc32_stream_encoder_dvi_set_stream_attribute()
112 struct bp_encoder_control cntl = {0}; in enc32_stream_encoder_hdmi_set_stream_attribute() local
114 cntl.action = ENCODER_CONTROL_SETUP; in enc32_stream_encoder_hdmi_set_stream_attribute()
115 cntl.engine_id = enc1->base.id; in enc32_stream_encoder_hdmi_set_stream_attribute()
116 cntl.signal = SIGNAL_TYPE_HDMI_TYPE_A; in enc32_stream_encoder_hdmi_set_stream_attribute()
117 cntl.enable_dp_audio = enable_audio; in enc32_stream_encoder_hdmi_set_stream_attribute()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dio_stream_encoder.c104 struct bp_encoder_control cntl = {0}; in enc314_stream_encoder_dvi_set_stream_attribute() local
106 cntl.action = ENCODER_CONTROL_SETUP; in enc314_stream_encoder_dvi_set_stream_attribute()
107 cntl.engine_id = enc1->base.id; in enc314_stream_encoder_dvi_set_stream_attribute()
108 cntl.signal = is_dual_link ? in enc314_stream_encoder_dvi_set_stream_attribute()
110 cntl.enable_dp_audio = false; in enc314_stream_encoder_dvi_set_stream_attribute()
145 struct bp_encoder_control cntl = {0}; in enc314_stream_encoder_hdmi_set_stream_attribute() local
147 cntl.action = ENCODER_CONTROL_SETUP; in enc314_stream_encoder_hdmi_set_stream_attribute()
148 cntl.engine_id = enc1->base.id; in enc314_stream_encoder_hdmi_set_stream_attribute()
149 cntl.signal = SIGNAL_TYPE_HDMI_TYPE_A; in enc314_stream_encoder_hdmi_set_stream_attribute()
150 cntl.enable_dp_audio = enable_audio; in enc314_stream_encoder_hdmi_set_stream_attribute()
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-bcm2835aux.c90 u32 cntl[2]; member
267 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1] | in __bcm2835aux_spi_transfer_one_irq()
285 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); in bcm2835aux_spi_transfer_one_irq()
286 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]); in bcm2835aux_spi_transfer_one_irq()
311 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); in bcm2835aux_spi_transfer_one_poll()
370 bs->cntl[0] &= ~(BCM2835_AUX_SPI_CNTL0_SPEED); in bcm2835aux_spi_transfer_one()
407 bs->cntl[0] = BCM2835_AUX_SPI_CNTL0_ENABLE | in bcm2835aux_spi_prepare_message()
410 bs->cntl[1] = BCM2835_AUX_SPI_CNTL1_MSBF_IN; in bcm2835aux_spi_prepare_message()
414 bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_CPOL; in bcm2835aux_spi_prepare_message()
415 bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_OUT_RISING; in bcm2835aux_spi_prepare_message()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce100/
H A Ddce100_hw_sequencer.c79 enum bp_pipe_control_action cntl; in dce100_enable_display_power_gating() local
83 cntl = ASIC_PIPE_INIT; in dce100_enable_display_power_gating()
85 cntl = ASIC_PIPE_ENABLE; in dce100_enable_display_power_gating()
87 cntl = ASIC_PIPE_DISABLE; in dce100_enable_display_power_gating()
92 dcb, controller_id + 1, cntl); in dce100_enable_display_power_gating()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce112/
H A Ddce112_hw_sequencer.c120 enum bp_pipe_control_action cntl; in dce112_enable_display_power_gating() local
124 cntl = ASIC_PIPE_INIT; in dce112_enable_display_power_gating()
126 cntl = ASIC_PIPE_ENABLE; in dce112_enable_display_power_gating()
128 cntl = ASIC_PIPE_DISABLE; in dce112_enable_display_power_gating()
133 dcb, controller_id + 1, cntl); in dce112_enable_display_power_gating()
/openbmc/linux/include/linux/amba/
H A Dclcd.h49 u32 cntl; member
69 u32 cntl; member
158 if (fb->panel->cntl & CNTL_LCDDUAL) in clcdfb_decode()
171 if (fb->panel->cntl & CNTL_LCDTFT) /* TFT */ in clcdfb_decode()
175 else if (fb->panel->cntl & CNTL_LCDMONO8) /* STN monochrome, 8bit */ in clcdfb_decode()
184 val = fb->panel->cntl; in clcdfb_decode()
238 regs->cntl = val; in clcdfb_decode()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_stream_encoder.c539 struct bp_encoder_control cntl = {0}; in enc3_stream_encoder_dvi_set_stream_attribute() local
541 cntl.action = ENCODER_CONTROL_SETUP; in enc3_stream_encoder_dvi_set_stream_attribute()
542 cntl.engine_id = enc1->base.id; in enc3_stream_encoder_dvi_set_stream_attribute()
543 cntl.signal = is_dual_link ? in enc3_stream_encoder_dvi_set_stream_attribute()
545 cntl.enable_dp_audio = false; in enc3_stream_encoder_dvi_set_stream_attribute()
586 struct bp_encoder_control cntl = {0}; in enc3_stream_encoder_hdmi_set_stream_attribute() local
588 cntl.action = ENCODER_CONTROL_SETUP; in enc3_stream_encoder_hdmi_set_stream_attribute()
589 cntl.engine_id = enc1->base.id; in enc3_stream_encoder_hdmi_set_stream_attribute()
590 cntl.signal = SIGNAL_TYPE_HDMI_TYPE_A; in enc3_stream_encoder_hdmi_set_stream_attribute()
591 cntl.enable_dp_audio = enable_audio; in enc3_stream_encoder_hdmi_set_stream_attribute()
[all …]
/openbmc/linux/drivers/tty/serial/8250/
H A D8250_bcm2835aux.c45 u32 cntl; member
57 data->cntl &= ~BCM2835_AUX_UART_CNTL_RXEN; in bcm2835aux_rs485_start_tx()
58 serial_out(up, BCM2835_AUX_UART_CNTL, data->cntl); in bcm2835aux_rs485_start_tx()
81 data->cntl |= BCM2835_AUX_UART_CNTL_RXEN; in bcm2835aux_rs485_stop_tx()
82 serial_out(up, BCM2835_AUX_UART_CNTL, data->cntl); in bcm2835aux_rs485_stop_tx()
116 data->cntl = BCM2835_AUX_UART_CNTL_RXEN | BCM2835_AUX_UART_CNTL_TXEN; in bcm2835aux_serial_probe()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_hw_sequencer.c159 enum bp_pipe_control_action cntl; in dce120_enable_display_power_gating()
163 cntl = ASIC_PIPE_INIT; in dce120_enable_display_power_gating()
165 cntl = ASIC_PIPE_ENABLE; in dce120_enable_display_power_gating()
167 cntl = ASIC_PIPE_DISABLE; in dce120_enable_display_power_gating()
172 dcb, controller_id + 1, cntl); in dce120_enable_display_power_gating()
/openbmc/linux/drivers/i2c/busses/
H A Di2c-ibm_iic.c90 in_8(&iic->cntl), in_8(&iic->mdcntl), in_8(&iic->sts), in dump_iic_regs()
163 out_8(&iic->cntl, 0); in iic_dev_init()
383 out_8(&iic->cntl, CNTL_HMT); in iic_abort_xfer()
466 u8 cntl = (in_8(&iic->cntl) & CNTL_AMD) | CNTL_PT; in iic_xfer_bytes() local
468 cntl |= CNTL_RW; in iic_xfer_bytes()
473 u8 cmd = cntl | ((count - 1) << CNTL_TCT_SHIFT); in iic_xfer_bytes()
475 if (!(cntl & CNTL_RW)) in iic_xfer_bytes()
487 out_8(&iic->cntl, cmd); in iic_xfer_bytes()
506 if (cntl & CNTL_RW) in iic_xfer_bytes()
526 out_8(&iic->cntl, CNTL_AMD); in iic_address()
[all …]
/openbmc/u-boot/drivers/i2c/
H A Ddesignware_i2c.c83 unsigned int cntl; in __dw_i2c_set_bus_speed() local
97 cntl = (readl(&i2c_base->ic_con) & (~IC_CON_SPD_MSK)); in __dw_i2c_set_bus_speed()
102 cntl |= IC_CON_SPD_SS; in __dw_i2c_set_bus_speed()
116 cntl |= IC_CON_SPD_SS; in __dw_i2c_set_bus_speed()
130 cntl |= IC_CON_SPD_FS; in __dw_i2c_set_bus_speed()
143 writel(cntl, &i2c_base->ic_con); in __dw_i2c_set_bus_speed()
/openbmc/linux/drivers/video/fbdev/
H A Damba-clcd.c83 static void clcdfb_enable(struct clcd_fb *fb, u32 cntl) in clcdfb_enable() argument
96 cntl |= CNTL_LCDEN; in clcdfb_enable()
97 writel(cntl, fb->regs + fb->off_cntl); in clcdfb_enable()
104 cntl |= CNTL_LCDPWR; in clcdfb_enable()
105 writel(cntl, fb->regs + fb->off_cntl); in clcdfb_enable()
132 caps = fb->panel->cntl & CNTL_BGR ? in clcdfb_set_bitfields()
139 if (!(fb->panel->cntl & CNTL_LCDTFT)) in clcdfb_set_bitfields()
305 fb->clcd_cntl = regs.cntl; in clcdfb_set_par()
307 clcdfb_enable(fb, regs.cntl); in clcdfb_set_par()
656 fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1); in clcdfb_of_init_tft_panel()
[all …]
/openbmc/linux/arch/arm/mach-footbridge/
H A Ddc21285.c182 unsigned int cntl; in dc21285_serr_irq() local
188 cntl = *CSR_SA110_CNTL & 0xffffdf07; in dc21285_serr_irq()
189 *CSR_SA110_CNTL = cntl | SA110_CNTL_RXSERR; in dc21285_serr_irq()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_hw_sequencer.c208 enum bp_pipe_control_action cntl; in dce110_enable_display_power_gating() local
213 cntl = ASIC_PIPE_INIT; in dce110_enable_display_power_gating()
215 cntl = ASIC_PIPE_ENABLE; in dce110_enable_display_power_gating()
217 cntl = ASIC_PIPE_DISABLE; in dce110_enable_display_power_gating()
225 dcb, controller_id + 1, cntl); in dce110_enable_display_power_gating()
696 struct bp_transmitter_control *cntl) in link_transmitter_control() argument
866 cntl.action = power_up ? in dce110_edp_power_control()
871 cntl.coherent = false; in dce110_edp_power_control()
986 cntl.action = enable ? in dce110_edp_backlight_control()
994 cntl.lanes_number = LANE_COUNT_FOUR; in dce110_edp_backlight_control()
[all …]
/openbmc/qemu/hw/timer/
H A Davr_timer16.c100 #define CNT(t16) VAL16(t16->cntl, t16->cnth)
123 t16->cntl = (uint8_t)(cnt & 0xff); in avr_timer16_update_cnt()
135 t16->cntl = 0; in avr_timer16_clock_reset()
331 retval = t16->cntl; in avr_timer16_read()
427 t16->cntl = val8; in avr_timer16_write()

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