Searched refs:clock_set_target_val (Results 1 – 8 of 8) sorted by relevance
/openbmc/u-boot/arch/arm/mach-imx/imx8m/ |
H A D | clock.c | 365 clock_set_target_val(WDOG_CLK_ROOT, CLK_ROOT_ON | in init_wdog_clk() 367 clock_set_target_val(WDOG_CLK_ROOT, CLK_ROOT_ON | in init_wdog_clk() 369 clock_set_target_val(WDOG_CLK_ROOT, CLK_ROOT_ON | in init_wdog_clk() 405 clock_set_target_val(UART1_CLK_ROOT, CLK_ROOT_ON | in init_uart_clk() 411 clock_set_target_val(UART2_CLK_ROOT, CLK_ROOT_ON | in init_uart_clk() 467 clock_set_target_val(QSPI_CLK_ROOT, CLK_ROOT_ON | in set_clk_qspi() 502 clock_set_target_val(ENET_AXI_CLK_ROOT, target); in set_clk_enet() 507 clock_set_target_val(ENET_REF_CLK_ROOT, target); in set_clk_enet() 513 clock_set_target_val(ENET_TIMER_CLK_ROOT, target); in set_clk_enet() 560 clock_set_target_val(DRAM_SEL_CFG, CLK_ROOT_ON | in dram_enable_bypass() [all …]
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H A D | clock_slice.c | 555 int clock_set_target_val(enum clk_root_index clock_id, u32 val) in clock_set_target_val() function
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/openbmc/u-boot/arch/arm/mach-imx/mx7/ |
H A D | clock.c | 89 clock_set_target_val(USB_HSIC_CLK_ROOT, target); in enable_usboh3_clk() 599 clock_set_target_val(UART1_CLK_ROOT, target); in init_clk_uart() 604 clock_set_target_val(UART2_CLK_ROOT, target); in init_clk_uart() 609 clock_set_target_val(UART3_CLK_ROOT, target); in init_clk_uart() 614 clock_set_target_val(UART4_CLK_ROOT, target); in init_clk_uart() 619 clock_set_target_val(UART5_CLK_ROOT, target); in init_clk_uart() 624 clock_set_target_val(UART6_CLK_ROOT, target); in init_clk_uart() 652 clock_set_target_val(EIM_CLK_ROOT, target); in init_clk_weim() 710 clock_set_target_val(WDOG_CLK_ROOT, target); in init_clk_wdog() 863 clock_set_target_val(QSPI_CLK_ROOT, target); in set_clk_qspi() [all …]
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H A D | clock_slice.c | 660 int clock_set_target_val(enum clk_root_index clock_id, u32 val) in clock_set_target_val() function
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/openbmc/u-boot/drivers/ddr/imx/imx8m/ |
H A D | ddr4_init.c | 40 clock_set_target_val(DRAM_APB_CLK_ROOT, CLK_ROOT_ON | in ddr_init()
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H A D | lpddr4_init.c | 48 clock_set_target_val(DRAM_APB_CLK_ROOT, CLK_ROOT_ON | in ddr_init()
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/openbmc/u-boot/arch/arm/include/asm/arch-mx7/ |
H A D | clock_slice.h | 109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
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/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/ |
H A D | clock.h | 667 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
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