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Searched refs:clock_data (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/clk/stm32/
H A Dclk-stm32-core.c260 return stm32_mux_get_parent(mux->base, mux->clock_data, mux->mux_id); in clk_stm32_mux_get_parent()
361 divider = &div->clock_data->dividers[div->div_id]; in clk_stm32_divider_round_rate()
439 divider = &composite->clock_data->dividers[composite->div_id]; in clk_stm32_composite_determine_rate()
486 if (composite->clock_data->is_multi_mux) { in clk_stm32_composite_set_parent()
526 if (composite->clock_data->is_multi_mux) { in clk_stm32_set_safe_position_mux()
529 other_mux_hw = composite->clock_data->is_multi_mux(hw); in clk_stm32_set_safe_position_mux()
537 stm32_mux_set_parent(composite->base, composite->clock_data, in clk_stm32_set_safe_position_mux()
636 mux->clock_data = data->clock_data; in clk_stm32_mux_register()
657 gate->clock_data = data->clock_data; in clk_stm32_gate_register()
678 div->clock_data = data->clock_data; in clk_stm32_div_register()
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H A Dclk-stm32-core.h72 struct clk_stm32_clock_data *clock_data; member
97 struct clk_stm32_clock_data *clock_data; member
107 struct clk_stm32_clock_data *clock_data; member
117 struct clk_stm32_clock_data *clock_data; member
129 struct clk_stm32_clock_data *clock_data; member
H A Dclk-stm32mp13.c1517 .clock_data = &stm32mp13_clock_data,
/openbmc/linux/drivers/clk/microchip/
H A Dclk-mpfs.c358 struct mpfs_clock_data *clock_data = dev_get_drvdata(dev->parent); in mpfs_reset_read() local
360 return readl_relaxed(clock_data->base + REG_SUBBLK_RESET_CR); in mpfs_reset_read()
366 struct mpfs_clock_data *clock_data = dev_get_drvdata(dev->parent); in mpfs_reset_write() local
368 writel_relaxed(val, clock_data->base + REG_SUBBLK_RESET_CR); in mpfs_reset_write()
/openbmc/linux/kernel/time/
H A Dsched_clock.c38 struct clock_data { struct
61 static struct clock_data cd ____cacheline_aligned = { argument
/openbmc/linux/arch/arm/mach-omap1/
H A DMakefile9 obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
/openbmc/linux/drivers/clk/bcm/
H A Dclk-bcm2835.c1436 const struct bcm2835_clock_data *clock_data = data; in bcm2835_register_clock() local
1447 for (i = 0; i < clock_data->num_mux_parents; i++) { in bcm2835_register_clock()
1448 parents[i] = clock_data->parents[i]; in bcm2835_register_clock()
1459 init.num_parents = clock_data->num_mux_parents; in bcm2835_register_clock()
1460 init.name = clock_data->name; in bcm2835_register_clock()
1461 init.flags = clock_data->flags | CLK_IGNORE_UNUSED; in bcm2835_register_clock()
1467 if (clock_data->set_rate_parent) in bcm2835_register_clock()
1470 if (clock_data->is_vpu_clock) { in bcm2835_register_clock()
1479 if (!(cprman_read(cprman, clock_data->ctl_reg) & CM_ENABLE)) in bcm2835_register_clock()
1488 clock->data = clock_data; in bcm2835_register_clock()
/openbmc/linux/drivers/media/platform/qcom/venus/
H A Dcore.h330 struct clock_data { struct
446 struct clock_data clk_data;
/openbmc/qemu/scripts/
H A Dreplay-dump.py241 clock_data = read_qword(dumpfile)
242 print_event(eid, name, "0x%x" % (clock_data))
/openbmc/linux/tools/perf/util/
H A Dheader.c3442 FEAT_OPR(CLOCK_DATA, clock_data, false),