260 	return stm32_mux_get_parent(mux->base, mux->clock_data, mux->mux_id);  in clk_stm32_mux_get_parent()
270 	stm32_mux_set_parent(mux->base, mux->clock_data, mux->mux_id, index);  in clk_stm32_mux_set_parent()
290 	stm32_gate_endisable(gate->base, gate->clock_data, gate->gate_id, enable);  in clk_stm32_gate_endisable()
311 	return stm32_gate_is_enabled(gate->base, gate->clock_data, gate->gate_id);  in clk_stm32_gate_is_enabled()
321 	stm32_gate_disable_unused(gate->base, gate->clock_data, gate->gate_id);  in clk_stm32_gate_disable_unused()
345 	ret = stm32_divider_set_rate(div->base, div->clock_data, div->div_id, rate, parent_rate);  in clk_stm32_divider_set_rate()
361 	divider = &div->clock_data->dividers[div->div_id];  in clk_stm32_divider_round_rate()
388 	return stm32_divider_get_rate(div->base, div->clock_data, div->div_id, parent_rate);  in clk_stm32_divider_recalc_rate()
409 	ret = stm32_divider_set_rate(composite->base, composite->clock_data,  in clk_stm32_composite_set_rate()
425 	return stm32_divider_get_rate(composite->base, composite->clock_data,  in clk_stm32_composite_recalc_rate()
439 	divider = &composite->clock_data->dividers[composite->div_id];  in clk_stm32_composite_determine_rate()
472 	return stm32_mux_get_parent(composite->base, composite->clock_data, composite->mux_id);  in clk_stm32_composite_get_parent()
482 	stm32_mux_set_parent(composite->base, composite->clock_data, composite->mux_id, index);  in clk_stm32_composite_set_parent()
486 	if (composite->clock_data->is_multi_mux) {  in clk_stm32_composite_set_parent()
487 		struct clk_hw *other_mux_hw = composite->clock_data->is_multi_mux(hw);  in clk_stm32_composite_set_parent()
506 	return stm32_gate_is_enabled(composite->base, composite->clock_data, composite->gate_id);  in clk_stm32_composite_is_enabled()
514 	const struct stm32_mux_cfg *mux = &composite->clock_data->muxes[composite->mux_id];  in clk_stm32_has_safe_mux()
526 		if (composite->clock_data->is_multi_mux) {  in clk_stm32_set_safe_position_mux()
529 			other_mux_hw = composite->clock_data->is_multi_mux(hw);  in clk_stm32_set_safe_position_mux()
537 		stm32_mux_set_parent(composite->base, composite->clock_data,  in clk_stm32_set_safe_position_mux()
552 	stm32_mux_set_parent(composite->base, composite->clock_data, composite->mux_id, sel);  in clk_stm32_safe_restore_position_mux()
564 	stm32_gate_endisable(composite->base, composite->clock_data, composite->gate_id, enable);  in clk_stm32_composite_gate_endisable()
607 	stm32_gate_disable_unused(composite->base, composite->clock_data, composite->gate_id);  in clk_stm32_composite_disable_unused()
636 	mux->clock_data = data->clock_data;  in clk_stm32_mux_register()
657 	gate->clock_data = data->clock_data;  in clk_stm32_gate_register()
678 	div->clock_data = data->clock_data;  in clk_stm32_div_register()
699 	composite->clock_data = data->clock_data;  in clk_stm32_composite_register()