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Searched refs:chan (Results 1 – 25 of 73) sorted by relevance

123

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dxor.c20 static int mv_xor_cmd_set(u32 chan, int command);
21 static int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl);
140 static int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl) in mv_xor_ctrl_set() argument
145 val = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))) in mv_xor_ctrl_set()
149 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), xor_ctrl); in mv_xor_ctrl_set()
154 int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, u32 init_val_high, in mv_xor_mem_init() argument
160 if (chan >= MV_XOR_MAX_CHAN) in mv_xor_mem_init()
163 if (MV_ACTIVE == mv_xor_state_get(chan)) in mv_xor_mem_init()
171 tmp = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))); in mv_xor_mem_init()
174 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), tmp); in mv_xor_mem_init()
[all …]
H A Dxor_regs.h13 #define XOR_UNIT(chan) ((chan) >> 1) argument
14 #define XOR_CHAN(chan) ((chan) & 1) argument
21 #define XOR_CONFIG_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x10 + ((chan) * 4))) argument
22 #define XOR_ACTIVATION_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x20 + ((chan) * 4))) argument
31 #define XOR_NEXT_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x200 + ((chan) * 4))) argument
32 #define XOR_CURR_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x210 + ((chan) * 4))) argument
33 #define XOR_BYTE_COUNT_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x220 + ((chan) * 4))) argument
35 #define XOR_DST_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x2B0 + ((chan) * 4))) argument
36 #define XOR_BLOCK_SIZE_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x2C0 + ((chan) * 4))) argument
96 #define XOR_WINDOW_CTRL_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x240 + ((chan) * 4))) argument
/openbmc/qemu/hw/dma/
H A Dsifive_pdma.c73 uint64_t bytes = s->chan[ch].next_bytes; in sifive_pdma_run()
74 uint64_t dst = s->chan[ch].next_dst; in sifive_pdma_run()
75 uint64_t src = s->chan[ch].next_src; in sifive_pdma_run()
76 uint32_t config = s->chan[ch].next_config; in sifive_pdma_run()
112 s->chan[ch].state = DMA_CHAN_STATE_STARTED; in sifive_pdma_run()
113 s->chan[ch].control &= ~CONTROL_DONE; in sifive_pdma_run()
114 s->chan[ch].control &= ~CONTROL_ERR; in sifive_pdma_run()
117 s->chan[ch].exec_config = config; in sifive_pdma_run()
118 s->chan[ch].exec_bytes = bytes; in sifive_pdma_run()
119 s->chan[ch].exec_dst = dst; in sifive_pdma_run()
[all …]
H A Dpl080.c68 VMSTATE_STRUCT_ARRAY(chan, PL080State, PL080_MAX_CHANNELS,
108 if (s->chan[c].conf & PL080_CCONF_ITC) in pl080_run()
110 if (s->chan[c].conf & PL080_CCONF_IE) in pl080_run()
126 ch = &s->chan[c]; in pl080_run()
237 return s->chan[i].src; in pl080_read()
239 return s->chan[i].dest; in pl080_read()
241 return s->chan[i].lli; in pl080_read()
243 return s->chan[i].ctrl; in pl080_read()
245 return s->chan[i].conf; in pl080_read()
264 if (s->chan[i].conf & PL080_CCONF_E) in pl080_read()
[all …]
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dxor.c151 int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl) in mv_xor_ctrl_set() argument
156 old_value = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))) & in mv_xor_ctrl_set()
160 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), xor_ctrl); in mv_xor_ctrl_set()
165 int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long block_size, in mv_xor_mem_init() argument
174 if (chan >= MV_XOR_MAX_CHAN) in mv_xor_mem_init()
177 if (MV_ACTIVE == mv_xor_state_get(chan)) in mv_xor_mem_init()
185 temp = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))); in mv_xor_mem_init()
188 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), temp); in mv_xor_mem_init()
194 reg_write(XOR_DST_PTR_REG(XOR_UNIT(chan), XOR_CHAN(chan)), start_ptr); in mv_xor_mem_init()
200 reg_write(XOR_BLOCK_SIZE_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_mem_init()
[all …]
H A Dxor_regs.h13 #define XOR_UNIT(chan) ((chan) >> 1) argument
14 #define XOR_CHAN(chan) ((chan) & 1) argument
21 #define XOR_CONFIG_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument
22 (0x10 + ((chan) * 4)))
23 #define XOR_ACTIVATION_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument
24 (0x20 + ((chan) * 4)))
33 #define XOR_NEXT_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument
34 (0x200 + ((chan) * 4)))
35 #define XOR_CURR_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument
36 (0x210 + ((chan) * 4)))
[all …]
H A Dxor.h82 enum mv_state mv_xor_state_get(u32 chan);
84 int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl);
85 int mv_xor_command_set(u32 chan, enum mv_command command);
86 int mv_xor_override_set(u32 chan, enum xor_override_target target, u32 win_num,
88 int mv_xor_transfer(u32 chan, enum xor_type type, u32 xor_chain_ptr);
/openbmc/u-boot/drivers/pwm/
H A Dsandbox_pwm.c33 struct sandbox_pwm_chan chan[NUM_CHANNELS]; member
40 struct sandbox_pwm_chan *chan; in sandbox_pwm_get_config() local
44 chan = &priv->chan[channel]; in sandbox_pwm_get_config()
45 *period_nsp = chan->period_ns; in sandbox_pwm_get_config()
46 *duty_nsp = chan->duty_ns; in sandbox_pwm_get_config()
47 *enablep = chan->enable; in sandbox_pwm_get_config()
48 *polarityp = chan->polarity; in sandbox_pwm_get_config()
57 struct sandbox_pwm_chan *chan; in sandbox_pwm_set_config() local
61 chan = &priv->chan[channel]; in sandbox_pwm_set_config()
62 chan->period_ns = period_ns; in sandbox_pwm_set_config()
[all …]
/openbmc/u-boot/drivers/mailbox/
H A Dmailbox-uclass.c16 static int mbox_of_xlate_default(struct mbox_chan *chan, in mbox_of_xlate_default() argument
19 debug("%s(chan=%p)\n", __func__, chan); in mbox_of_xlate_default()
26 chan->id = args->args[0]; in mbox_of_xlate_default()
31 int mbox_get_by_index(struct udevice *dev, int index, struct mbox_chan *chan) in mbox_get_by_index() argument
38 debug("%s(dev=%p, index=%d, chan=%p)\n", __func__, dev, index, chan); in mbox_get_by_index()
56 chan->dev = dev_mbox; in mbox_get_by_index()
58 ret = ops->of_xlate(chan, &args); in mbox_get_by_index()
60 ret = mbox_of_xlate_default(chan, &args); in mbox_get_by_index()
66 ret = ops->request(chan); in mbox_get_by_index()
76 struct mbox_chan *chan) in mbox_get_by_name() argument
[all …]
H A Dsandbox-mbox.c23 static int sandbox_mbox_request(struct mbox_chan *chan) in sandbox_mbox_request() argument
25 debug("%s(chan=%p)\n", __func__, chan); in sandbox_mbox_request()
27 if (chan->id >= SANDBOX_MBOX_CHANNELS) in sandbox_mbox_request()
33 static int sandbox_mbox_free(struct mbox_chan *chan) in sandbox_mbox_free() argument
35 debug("%s(chan=%p)\n", __func__, chan); in sandbox_mbox_free()
40 static int sandbox_mbox_send(struct mbox_chan *chan, const void *data) in sandbox_mbox_send() argument
42 struct sandbox_mbox *sbm = dev_get_priv(chan->dev); in sandbox_mbox_send()
45 debug("%s(chan=%p, data=%p)\n", __func__, chan, data); in sandbox_mbox_send()
47 sbm->chans[chan->id].rx_msg = *pmsg ^ SANDBOX_MBOX_PING_XOR; in sandbox_mbox_send()
48 sbm->chans[chan->id].rx_msg_valid = true; in sandbox_mbox_send()
[all …]
H A Dtegra-hsp.c71 static int tegra_hsp_of_xlate(struct mbox_chan *chan, in tegra_hsp_of_xlate() argument
74 debug("%s(chan=%p)\n", __func__, chan); in tegra_hsp_of_xlate()
81 chan->id = (args->args[0] << 16) | args->args[1]; in tegra_hsp_of_xlate()
86 static int tegra_hsp_request(struct mbox_chan *chan) in tegra_hsp_request() argument
90 debug("%s(chan=%p)\n", __func__, chan); in tegra_hsp_request()
92 db_id = tegra_hsp_db_id(chan->id); in tegra_hsp_request()
101 static int tegra_hsp_free(struct mbox_chan *chan) in tegra_hsp_free() argument
103 debug("%s(chan=%p)\n", __func__, chan); in tegra_hsp_free()
108 static int tegra_hsp_send(struct mbox_chan *chan, const void *data) in tegra_hsp_send() argument
110 struct tegra_hsp *thsp = dev_get_priv(chan->dev); in tegra_hsp_send()
[all …]
H A Dk3-sec-proxy.c80 struct mbox_chan chan; member
106 static int k3_sec_proxy_of_xlate(struct mbox_chan *chan, in k3_sec_proxy_of_xlate() argument
109 struct k3_sec_proxy_mbox *spm = dev_get_priv(chan->dev); in k3_sec_proxy_of_xlate()
112 debug("%s(chan=%p)\n", __func__, chan); in k3_sec_proxy_of_xlate()
122 chan->id = ind; in k3_sec_proxy_of_xlate()
123 chan->con_priv = &spm->chans[i]; in k3_sec_proxy_of_xlate()
127 dev_err(chan->dev, "%s: Invalid Thread ID %d\n", __func__, ind); in k3_sec_proxy_of_xlate()
135 static int k3_sec_proxy_request(struct mbox_chan *chan) in k3_sec_proxy_request() argument
137 debug("%s(chan=%p)\n", __func__, chan); in k3_sec_proxy_request()
146 static int k3_sec_proxy_free(struct mbox_chan *chan) in k3_sec_proxy_free() argument
[all …]
H A Dsandbox-mbox-test.c12 struct mbox_chan chan; member
19 return mbox_get_by_name(dev, "test", &sbmt->chan); in sandbox_mbox_test_get()
26 return mbox_send(&sbmt->chan, &msg); in sandbox_mbox_test_send()
33 return mbox_recv(&sbmt->chan, msg, 100); in sandbox_mbox_test_recv()
40 return mbox_free(&sbmt->chan); in sandbox_mbox_test_free()
/openbmc/qemu/hw/hyperv/
H A Dvmbus.c290 VMBusGpadl *vmbus_get_gpadl(VMBusChannel *chan, uint32_t gpadl_id) in vmbus_get_gpadl() argument
292 VMBusGpadl *gpadl = find_gpadl(chan->vmbus, gpadl_id); in vmbus_get_gpadl()
444 ssize_t vmbus_iov_to_gpadl(VMBusChannel *chan, VMBusGpadl *gpadl, uint32_t off, in vmbus_iov_to_gpadl() argument
451 gpadl_iter_init(&iter, gpadl, chan->dev->dma_as, in vmbus_iov_to_gpadl()
601 static int ringbufs_init(VMBusChannel *chan) in ringbufs_init() argument
604 VMBusSendRingBuf *send_ringbuf = &chan->send_ringbuf; in ringbufs_init()
605 VMBusRecvRingBuf *recv_ringbuf = &chan->recv_ringbuf; in ringbufs_init()
607 if (chan->ringbuf_send_offset <= 1 || in ringbufs_init()
608 chan->gpadl->num_gfns <= chan->ringbuf_send_offset + 1) { in ringbufs_init()
612 ringbuf_init_common(&recv_ringbuf->common, chan->gpadl, chan->dev->dma_as, in ringbufs_init()
[all …]
/openbmc/qemu/include/hw/hyperv/
H A Dvmbus.h44 typedef void(*VMBusChannelNotifyCb)(struct VMBusChannel *chan);
68 int (*open_channel)(VMBusChannel *chan);
72 void (*close_channel)(VMBusChannel *chan);
96 VMBusChannel *chan; member
105 VMBusDevice *vmbus_channel_device(VMBusChannel *chan);
107 uint32_t vmbus_channel_idx(VMBusChannel *chan);
108 bool vmbus_channel_is_open(VMBusChannel *chan);
114 void vmbus_channel_notify_host(VMBusChannel *chan);
123 int vmbus_channel_reserve(VMBusChannel *chan,
134 ssize_t vmbus_channel_send(VMBusChannel *chan, uint16_t pkt_type,
[all …]
/openbmc/ipmitool/lib/
H A Dipmi_lanp.c83 is_lan_channel(struct ipmi_intf * intf, uint8_t chan) in is_lan_channel() argument
87 if (chan < 1 || chan > IPMI_CHANNEL_NUMBER_MAX) in is_lan_channel()
90 medium = ipmi_get_channel_medium(intf, chan); in is_lan_channel()
110 uint8_t chan = 0; in find_lan_channel() local
112 for (chan = start; chan < IPMI_CHANNEL_NUMBER_MAX; chan++) { in find_lan_channel()
113 if (is_lan_channel(intf, chan)) { in find_lan_channel()
114 return chan; in find_lan_channel()
134 get_lan_param_select(struct ipmi_intf * intf, uint8_t chan, int param, int select) in get_lan_param_select() argument
154 msg_data[0] = chan; in get_lan_param_select()
214 get_lan_param(struct ipmi_intf * intf, uint8_t chan, int param) in get_lan_param() argument
[all …]
/openbmc/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3399.c34 struct chan_info chan[2]; member
111 static void set_memory_map(const struct chan_info *chan, u32 channel, in set_memory_map() argument
116 u32 *denali_ctl = chan->pctl->denali_ctl; in set_memory_map()
117 u32 *denali_pi = chan->pi->denali_pi; in set_memory_map()
155 static void set_ds_odt(const struct chan_info *chan, in set_ds_odt() argument
158 u32 *denali_phy = chan->publ->denali_phy; in set_ds_odt()
294 static int phy_io_config(const struct chan_info *chan, in phy_io_config() argument
297 u32 *denali_phy = chan->publ->denali_phy; in phy_io_config()
455 static int pctl_cfg(const struct chan_info *chan, u32 channel, in pctl_cfg() argument
458 u32 *denali_ctl = chan->pctl->denali_ctl; in pctl_cfg()
[all …]
H A Dsdram_rk3188.c34 struct chan_info chan[1]; member
255 static void phy_cfg(const struct chan_info *chan, int channel, in phy_cfg() argument
258 struct rk3288_ddr_publ *publ = chan->publ; in phy_cfg()
259 struct rk3188_msch *msch = chan->msch; in phy_cfg()
376 static void set_bandwidth_ratio(const struct chan_info *chan, int channel, in set_bandwidth_ratio() argument
379 struct rk3288_ddr_pctl *pctl = chan->pctl; in set_bandwidth_ratio()
380 struct rk3288_ddr_publ *publ = chan->publ; in set_bandwidth_ratio()
381 struct rk3188_msch *msch = chan->msch; in set_bandwidth_ratio()
414 static int data_training(const struct chan_info *chan, int channel, in data_training() argument
422 struct rk3288_ddr_publ *publ = chan->publ; in data_training()
[all …]
H A Dsdram_rk3288.c36 struct chan_info chan[2]; member
289 static void phy_cfg(const struct chan_info *chan, int channel, in phy_cfg() argument
292 struct rk3288_ddr_publ *publ = chan->publ; in phy_cfg()
293 struct rk3288_msch *msch = chan->msch; in phy_cfg()
434 static void set_bandwidth_ratio(const struct chan_info *chan, int channel, in set_bandwidth_ratio() argument
437 struct rk3288_ddr_pctl *pctl = chan->pctl; in set_bandwidth_ratio()
438 struct rk3288_ddr_publ *publ = chan->publ; in set_bandwidth_ratio()
439 struct rk3288_msch *msch = chan->msch; in set_bandwidth_ratio()
472 static int data_training(const struct chan_info *chan, int channel, in data_training() argument
480 struct rk3288_ddr_publ *publ = chan->publ; in data_training()
[all …]
H A Dsdram_rk322x.c33 struct chan_info chan[1]; member
162 static void memory_init(struct chan_info *chan, in memory_init() argument
165 struct rk322x_ddr_pctl *pctl = chan->pctl; in memory_init()
230 static u32 data_training(struct chan_info *chan) in data_training() argument
232 struct rk322x_ddr_phy *ddr_phy = chan->phy; in data_training()
233 struct rk322x_ddr_pctl *pctl = chan->pctl; in data_training()
365 struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy; in phy_softreset()
380 struct rk322x_ddr_pctl *pctl = dram->chan[0].pctl; in set_bw()
381 struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy; in set_bw()
468 static void phy_cfg(struct chan_info *chan, in phy_cfg() argument
[all …]
/openbmc/u-boot/include/
H A Dmailbox-uclass.h37 int (*of_xlate)(struct mbox_chan *chan,
50 int (*request)(struct mbox_chan *chan);
59 int (*free)(struct mbox_chan *chan);
67 int (*send)(struct mbox_chan *chan, const void *data);
79 int (*recv)(struct mbox_chan *chan, void *data);
H A Dmailbox.h81 int mbox_get_by_index(struct udevice *dev, int index, struct mbox_chan *chan);
100 struct mbox_chan *chan);
109 int mbox_free(struct mbox_chan *chan);
125 int mbox_send(struct mbox_chan *chan, const void *data);
145 int mbox_recv(struct mbox_chan *chan, void *data, ulong timeout_us);
/openbmc/u-boot/drivers/dma/
H A Dapbh_dma.c499 static int mxs_dma_wait_complete(uint32_t timeout, unsigned int chan) in mxs_dma_wait_complete() argument
505 ret = mxs_dma_validate_chan(chan); in mxs_dma_wait_complete()
510 1 << chan, timeout)) { in mxs_dma_wait_complete()
512 mxs_dma_reset(chan); in mxs_dma_wait_complete()
521 int mxs_dma_go(int chan) in mxs_dma_go() argument
528 mxs_dma_enable_irq(chan, 1); in mxs_dma_go()
529 mxs_dma_enable(chan); in mxs_dma_go()
532 ret = mxs_dma_wait_complete(timeout, chan); in mxs_dma_go()
535 mxs_dma_finish(chan, &tmp_desc_list); in mxs_dma_go()
538 mxs_dma_ack_irq(chan); in mxs_dma_go()
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-omap3/
H A Ddma.h11 int omap3_dma_conf_transfer(uint32_t chan, uint32_t *src, uint32_t *dst,
13 int omap3_dma_start_transfer(uint32_t chan);
14 int omap3_dma_wait_for_transfer(uint32_t chan);
15 int omap3_dma_conf_chan(uint32_t chan, struct dma4_chan *config);
16 int omap3_dma_get_conf_chan(uint32_t chan, struct dma4_chan *config);
/openbmc/phosphor-networkd/src/
H A Dncsi_netlink_main.cpp35 for (ChannelInfo& chan : pkg.channels) in printInfo()
37 lg2::debug(" Channel id : {ID}", "ID", chan.id); in printInfo()
38 if (chan.forced) in printInfo()
42 if (chan.active) in printInfo()
48 chan.version_major, "MINOR", chan.version_minor, "STR", in printInfo()
49 chan.version); in printInfo()
52 chan.link_state); in printInfo()
54 auto& vlans = chan.vlan_ids; in printInfo()

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