Home
last modified time | relevance | path

Searched refs:cfgPCIE_LANE_5_EQUALIZATION_CNTL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h162 #define cfgPCIE_LANE_5_EQUALIZATION_CNTL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_offset.h530 #define cfgPCIE_LANE_5_EQUALIZATION_CNTL … macro