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Searched refs:cci (Results 1 – 25 of 79) sorted by relevance

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/openbmc/linux/drivers/i2c/busses/
H A Di2c-qcom-cci.c116 struct cci *cci; member
139 struct cci *cci = dev; in cci_isr() argument
232 static int cci_reset(struct cci *cci) in cci_reset() argument
250 static int cci_init(struct cci *cci) in cci_init() argument
271 if (!cci->master[i].cci) in cci_init()
429 struct cci *cci = cci_master->cci; in cci_xfer() local
529 struct cci *cci; in cci_probe() local
565 master->cci = cci; in cci_probe()
647 if (!cci->master[i].cci) in cci_probe()
664 if (cci->master[i].cci) { in cci_probe()
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/openbmc/qemu/hw/cxl/
H A Dcxl-mailbox-utils.c1381 uint64_t total_time = cci->bg.starttime + cci->bg.runtime; in bg_timercb()
1443 &cci->cel_log[cci->cel_size]; in cxl_init_cci()
1453 cci->bg.runtime = 0; in cxl_init_cci()
1462 cci->d = d; in cxl_initialize_mailbox_swcci()
1463 cci->intf = intf; in cxl_initialize_mailbox_swcci()
1470 cci->d = d; in cxl_initialize_mailbox_t3()
1473 cci->intf = d; in cxl_initialize_mailbox_t3()
1488 cci->d = d; in cxl_initialize_t3_ld_cci()
1489 cci->intf = intf; in cxl_initialize_t3_ld_cci()
1508 cci->d = d; in cxl_initialize_t3_fm_owned_ld_mctpcci()
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H A Dcxl-device-utils.c66 CXLCCI *cci = opaque; in mailbox_reg_read() local
68 if (object_dynamic_cast(OBJECT(cci->intf), TYPE_CXL_TYPE3)) { in mailbox_reg_read()
69 cxl_dstate = &CXL_TYPE3(cci->intf)->cxl_dstate; in mailbox_reg_read()
70 } else if (object_dynamic_cast(OBJECT(cci->intf), in mailbox_reg_read()
88 cci->bg.opcode); in mailbox_reg_read()
98 if (cci->bg.complete_pct) { in mailbox_reg_read()
155 CXLCCI *cci = opaque; in mailbox_reg_write() local
158 cxl_dstate = &CXL_TYPE3(cci->intf)->cxl_dstate; in mailbox_reg_write()
159 } else if (object_dynamic_cast(OBJECT(cci->intf), in mailbox_reg_write()
304 CXLCCI *cci) in cxl_device_register_block_init() argument
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H A Dswitch-mailbox-cci.c43 cswmb->cci = &usp->swcci; in cswbcci_realize()
44 cxl_device_register_block_init(OBJECT(pci_dev), cxl_dstate, cswmb->cci); in cswbcci_realize()
58 cxl_initialize_mailbox_swcci(cswmb->cci, DEVICE(pci_dev), in cswbcci_realize()
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dqcom,i2c-cci.yaml17 - qcom,msm8226-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
28 - qcom,sdm845-cci
29 - qcom,sm6350-cci
115 - const: cci
134 - const: cci
154 - const: cci
174 - const: cci
185 cci@ac4a000 {
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/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Darm,cci-400.yaml24 pattern: "^cci(@[0-9a-f]+)?$"
28 - arm,cci-400
29 - arm,cci-500
30 - arm,cci-550
48 const: arm,cci-400-ctrl-if
71 - const: arm,cci-400-pmu,r0
72 - const: arm,cci-400-pmu,r1
73 - const: arm,cci-400-pmu
77 - const: arm,cci-500-pmu,r0
78 - const: arm,cci-550-pmu,r0
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H A Dcci-control-port.yaml4 $id: http://devicetree.org/schemas/arm/cci-control-port.yaml#
19 cci-control-port:
33 cci-control-port = <&cci_control1>;
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dsoc.c111 struct ccsr_cci400 __iomem *cci = (void *)(CONFIG_SYS_IMMR + in erratum_a008850_early() local
116 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); in erratum_a008850_early()
127 struct ccsr_cci400 __iomem *cci = (void *)(CONFIG_SYS_IMMR + in erratum_a008850_post() local
133 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in erratum_a008850_post()
162 struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR + in arch_soc_init() local
185 out_le32(&cci->slave[0].snoop_ctrl, in arch_soc_init()
187 out_le32(&cci->slave[1].snoop_ctrl, in arch_soc_init()
189 out_le32(&cci->slave[2].snoop_ctrl, in arch_soc_init()
191 out_le32(&cci->slave[4].snoop_ctrl, in arch_soc_init()
200 out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); in arch_soc_init()
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/openbmc/linux/drivers/usb/typec/ucsi/
H A Dtrace.c36 const char *ucsi_cci_str(u32 cci) in ucsi_cci_str() argument
38 if (UCSI_CCI_CONNECTOR(cci)) { in ucsi_cci_str()
39 if (cci & UCSI_CCI_ACK_COMPLETE) in ucsi_cci_str()
41 if (cci & UCSI_CCI_COMMAND_COMPLETE) in ucsi_cci_str()
45 if (cci & UCSI_CCI_ACK_COMPLETE) in ucsi_cci_str()
47 if (cci & UCSI_CCI_COMMAND_COMPLETE) in ucsi_cci_str()
H A Ducsi_acpi.c195 u32 cci; in ucsi_acpi_notify() local
198 ret = ua->ucsi->ops->read(ua->ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_acpi_notify()
202 if (UCSI_CCI_CONNECTOR(cci) && in ucsi_acpi_notify()
204 ucsi_connector_change(ua->ucsi, UCSI_CCI_CONNECTOR(cci)); in ucsi_acpi_notify()
206 if (cci & UCSI_CCI_ACK_COMPLETE && test_bit(ACK_PENDING, &ua->flags)) in ucsi_acpi_notify()
208 if (cci & UCSI_CCI_COMMAND_COMPLETE && in ucsi_acpi_notify()
H A Ducsi.c137 u32 cci; in ucsi_exec_command() local
144 ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_exec_command()
161 if (cci & UCSI_CCI_ERROR) { in ucsi_exec_command()
172 return UCSI_CCI_LENGTH(cci); in ucsi_exec_command()
988 u32 cci; in ucsi_reset_ppm() local
993 ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_reset_ppm()
1013 &cci, sizeof(cci)); in ucsi_reset_ppm()
1040 ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_reset_ppm()
1394 u32 cci; in ucsi_init() local
1449 ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_init()
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H A Ducsi_glink.c221 u32 cci; in pmic_glink_ucsi_notify() local
224 ret = pmic_glink_ucsi_read(ucsi->ucsi, UCSI_CCI, &cci, sizeof(cci)); in pmic_glink_ucsi_notify()
230 con_num = UCSI_CCI_CONNECTOR(cci); in pmic_glink_ucsi_notify()
247 (cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE))) { in pmic_glink_ucsi_notify()
/openbmc/linux/arch/ia64/kernel/
H A Dtopology.c110 pal_cache_config_info_t cci; member
173 return sprintf(buf, "%u\n", 1 << this_leaf->cci.pcci_line_size); in show_coherency_line_size()
179 return sprintf(buf, "%u\n", this_leaf->cci.pcci_assoc); in show_ways_of_associativity()
186 cache_mattrib[this_leaf->cci.pcci_cache_attr]); in show_attributes()
196 unsigned number_of_sets = this_leaf->cci.pcci_cache_size; in show_number_of_sets()
197 number_of_sets /= this_leaf->cci.pcci_assoc; in show_number_of_sets()
198 number_of_sets /= 1 << this_leaf->cci.pcci_line_size; in show_number_of_sets()
215 int type = this_leaf->type + this_leaf->cci.pcci_unified; in show_type()
297 pal_cache_config_info_t cci; in cpu_cache_sysfs_init() local
315 if ((status=ia64_pal_cache_config_info(i,j, &cci)) != in cpu_cache_sysfs_init()
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H A Dpalinfo.c215 pal_cache_config_info_t cci; in cache_info() local
238 cci.pcci_cache_size); in cache_info()
240 if (cci.pcci_unified) in cache_info()
249 cci.pcci_assoc, in cache_info()
250 1<<cci.pcci_line_size, in cache_info()
251 1<<cci.pcci_stride); in cache_info()
265 cci.pcci_st_hints >>=1; in cache_info()
272 cci.pcci_ld_hints >>=1; in cache_info()
278 1<<cci.pcci_alias_boundary, cci.pcci_tag_lsb, in cache_info()
279 cci.pcci_tag_msb); in cache_info()
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H A Dsetup.c879 pal_cache_config_info_t cci; in get_cache_info() local
896 status = ia64_pal_cache_config_info(l, 2, &cci); in get_cache_info()
903 cci.pcci_stride = I_CACHE_STRIDE_SHIFT; in get_cache_info()
906 cci.pcci_unified = 1; in get_cache_info()
908 if (cci.pcci_stride < ia64_cache_stride_shift) in get_cache_info()
909 ia64_cache_stride_shift = cci.pcci_stride; in get_cache_info()
911 line_size = 1 << cci.pcci_line_size; in get_cache_info()
916 if (!cci.pcci_unified) { in get_cache_info()
924 cci.pcci_stride = I_CACHE_STRIDE_SHIFT; in get_cache_info()
927 if (cci.pcci_stride < ia64_i_cache_stride_shift) in get_cache_info()
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/openbmc/linux/Documentation/devicetree/bindings/interconnect/
H A Dmediatek,cci.yaml4 $id: http://devicetree.org/schemas/interconnect/mediatek,cci.yaml#
21 - mediatek,mt8183-cci
22 - mediatek,mt8186-cci
35 - const: cci
66 cci: cci {
67 compatible = "mediatek,mt8183-cci";
70 clock-names = "cci", "intermediate";
75 cci_opp: opp-table-cci {
/openbmc/qemu/include/hw/cxl/
H A Dcxl_device.h120 CXLCCI *cci);
225 CXLCCI *cci);
278 void cxl_initialize_mailbox_swcci(CXLCCI *cci, DeviceState *intf,
280 void cxl_init_cci(CXLCCI *cci, size_t payload_max);
281 int cxl_process_cci_message(CXLCCI *cci, uint8_t set, uint8_t cmd,
285 void cxl_initialize_t3_fm_owned_ld_mctpcci(CXLCCI *cci, DeviceState *d,
289 void cxl_initialize_t3_ld_cci(CXLCCI *cci, DeviceState *d,
369 static inline bool sanitize_running(CXLCCI *cci) in sanitize_running() argument
371 return !!cci->bg.runtime && cci->bg.opcode == 0x4400; in sanitize_running()
410 CXLCCI cci; /* Primary PCI mailbox CCI */ member
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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420-cpus.dtsi63 cci-control-port = <&cci_control1>;
75 cci-control-port = <&cci_control1>;
87 cci-control-port = <&cci_control1>;
99 cci-control-port = <&cci_control1>;
111 cci-control-port = <&cci_control0>;
123 cci-control-port = <&cci_control0>;
135 cci-control-port = <&cci_control0>;
147 cci-control-port = <&cci_control0>;
H A Dexynos5422-cpus.dtsi62 cci-control-port = <&cci_control0>;
75 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
101 cci-control-port = <&cci_control0>;
114 cci-control-port = <&cci_control1>;
127 cci-control-port = <&cci_control1>;
140 cci-control-port = <&cci_control1>;
153 cci-control-port = <&cci_control1>;
H A Dexynos5260.dtsi67 cci-control-port = <&cci_control1>;
74 cci-control-port = <&cci_control1>;
81 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
95 cci-control-port = <&cci_control0>;
102 cci-control-port = <&cci_control0>;
355 cci: cci@10f00000 { label
356 compatible = "arm,cci-400";
363 compatible = "arm,cci-400-ctrl-if";
369 compatible = "arm,cci-400-ctrl-if";
/openbmc/linux/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-mediatek.txt23 - mediatek,cci:
24 Used to confirm the link status between cpufreq and mediatek cci. Because
25 cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs.
27 property to make sure mediatek cci is ready.
28 For details of mediatek cci, please refer to
29 Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi36 cci-control-port = <&cci_control2>;
45 cci-control-port = <&cci_control2>;
60 cci-control-port = <&cci_control2>;
75 cci-control-port = <&cci_control2>;
90 cci-control-port = <&cci_control1>;
105 cci-control-port = <&cci_control1>;
120 cci-control-port = <&cci_control1>;
135 cci-control-port = <&cci_control1>;
450 cci: cci@10390000 { label
451 compatible = "arm,cci-400";
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/openbmc/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15_a7.dts42 cci-control-port = <&cci_control1>;
52 cci-control-port = <&cci_control1>;
62 cci-control-port = <&cci_control2>;
72 cci-control-port = <&cci_control2>;
82 cci-control-port = <&cci_control2>;
161 cci@2c090000 {
162 compatible = "arm,cci-400";
169 compatible = "arm,cci-400-ctrl-if";
175 compatible = "arm,cci-400-ctrl-if";
181 compatible = "arm,cci-400-pmu,r0";
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi32 cci-control-port = <&cci_control2>;
40 cci-control-port = <&cci_control2>;
174 cci: cci@10390000 { label
175 compatible = "arm,cci-400";
182 compatible = "arm,cci-400-ctrl-if";
188 compatible = "arm,cci-400-ctrl-if";
194 compatible = "arm,cci-400-ctrl-if";
200 compatible = "arm,cci-400-pmu,r1";
/openbmc/u-boot/board/freescale/ls1012afrdm/
H A Dls1012afrdm.c160 struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR + in board_init() local
168 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in board_init()

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