183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
29d044fcbSPrabhakar Kushwaha /*
39d044fcbSPrabhakar Kushwaha * Copyright 2016 Freescale Semiconductor, Inc.
49d044fcbSPrabhakar Kushwaha */
59d044fcbSPrabhakar Kushwaha
69d044fcbSPrabhakar Kushwaha #include <common.h>
79d044fcbSPrabhakar Kushwaha #include <i2c.h>
89d044fcbSPrabhakar Kushwaha #include <fdt_support.h>
99d044fcbSPrabhakar Kushwaha #include <asm/io.h>
109d044fcbSPrabhakar Kushwaha #include <asm/arch/clock.h>
119d044fcbSPrabhakar Kushwaha #include <asm/arch/fsl_serdes.h>
125b404be6SPrabhakar Kushwaha #ifdef CONFIG_FSL_LS_PPA
135b404be6SPrabhakar Kushwaha #include <asm/arch/ppa.h>
145b404be6SPrabhakar Kushwaha #endif
159d044fcbSPrabhakar Kushwaha #include <asm/arch/fdt.h>
164961eafcSYork Sun #include <asm/arch/mmu.h>
179d044fcbSPrabhakar Kushwaha #include <asm/arch/soc.h>
189d044fcbSPrabhakar Kushwaha #include <ahci.h>
199d044fcbSPrabhakar Kushwaha #include <hwconfig.h>
209d044fcbSPrabhakar Kushwaha #include <mmc.h>
21e5141cbeSRajesh Bhagat #include <environment.h>
229d044fcbSPrabhakar Kushwaha #include <scsi.h>
239d044fcbSPrabhakar Kushwaha #include <fm_eth.h>
249d044fcbSPrabhakar Kushwaha #include <fsl_esdhc.h>
259d044fcbSPrabhakar Kushwaha #include <fsl_mmdc.h>
269d044fcbSPrabhakar Kushwaha #include <spl.h>
279d044fcbSPrabhakar Kushwaha #include <netdev.h>
28e5141cbeSRajesh Bhagat #include <fsl_sec.h>
299d044fcbSPrabhakar Kushwaha #include "../common/qixis.h"
309d044fcbSPrabhakar Kushwaha #include "ls1012aqds_qixis.h"
317a8df8baSCalvin Johnson #include "ls1012aqds_pfe.h"
329d044fcbSPrabhakar Kushwaha
339d044fcbSPrabhakar Kushwaha DECLARE_GLOBAL_DATA_PTR;
349d044fcbSPrabhakar Kushwaha
checkboard(void)359d044fcbSPrabhakar Kushwaha int checkboard(void)
369d044fcbSPrabhakar Kushwaha {
379d044fcbSPrabhakar Kushwaha char buf[64];
389d044fcbSPrabhakar Kushwaha u8 sw;
399d044fcbSPrabhakar Kushwaha
409d044fcbSPrabhakar Kushwaha sw = QIXIS_READ(arch);
419d044fcbSPrabhakar Kushwaha printf("Board Arch: V%d, ", sw >> 4);
429d044fcbSPrabhakar Kushwaha printf("Board version: %c, boot from ", (sw & 0xf) + 'A' - 1);
439d044fcbSPrabhakar Kushwaha
449d044fcbSPrabhakar Kushwaha sw = QIXIS_READ(brdcfg[QIXIS_LBMAP_BRDCFG_REG]);
459d044fcbSPrabhakar Kushwaha
469d044fcbSPrabhakar Kushwaha if (sw & QIXIS_LBMAP_ALTBANK)
479d044fcbSPrabhakar Kushwaha printf("flash: 2\n");
489d044fcbSPrabhakar Kushwaha else
499d044fcbSPrabhakar Kushwaha printf("flash: 1\n");
509d044fcbSPrabhakar Kushwaha
519d044fcbSPrabhakar Kushwaha printf("FPGA: v%d (%s), build %d",
529d044fcbSPrabhakar Kushwaha (int)QIXIS_READ(scver), qixis_read_tag(buf),
539d044fcbSPrabhakar Kushwaha (int)qixis_read_minor());
549d044fcbSPrabhakar Kushwaha
559d044fcbSPrabhakar Kushwaha /* the timestamp string contains "\n" at the end */
569d044fcbSPrabhakar Kushwaha printf(" on %s", qixis_read_time(buf));
579d044fcbSPrabhakar Kushwaha return 0;
589d044fcbSPrabhakar Kushwaha }
599d044fcbSPrabhakar Kushwaha
60*10c8aa16SRajesh Bhagat #ifdef CONFIG_TFABOOT
dram_init(void)61*10c8aa16SRajesh Bhagat int dram_init(void)
62*10c8aa16SRajesh Bhagat {
63*10c8aa16SRajesh Bhagat gd->ram_size = tfa_get_dram_size();
64*10c8aa16SRajesh Bhagat if (!gd->ram_size)
65*10c8aa16SRajesh Bhagat gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
66*10c8aa16SRajesh Bhagat
67*10c8aa16SRajesh Bhagat return 0;
68*10c8aa16SRajesh Bhagat }
69*10c8aa16SRajesh Bhagat #else
dram_init(void)709d044fcbSPrabhakar Kushwaha int dram_init(void)
719d044fcbSPrabhakar Kushwaha {
721fdcc8dfSYork Sun static const struct fsl_mmdc_info mparam = {
731fdcc8dfSYork Sun 0x05180000, /* mdctl */
741fdcc8dfSYork Sun 0x00030035, /* mdpdc */
751fdcc8dfSYork Sun 0x12554000, /* mdotc */
761fdcc8dfSYork Sun 0xbabf7954, /* mdcfg0 */
771fdcc8dfSYork Sun 0xdb328f64, /* mdcfg1 */
781fdcc8dfSYork Sun 0x01ff00db, /* mdcfg2 */
791fdcc8dfSYork Sun 0x00001680, /* mdmisc */
801fdcc8dfSYork Sun 0x0f3c8000, /* mdref */
811fdcc8dfSYork Sun 0x00002000, /* mdrwd */
821fdcc8dfSYork Sun 0x00bf1023, /* mdor */
831fdcc8dfSYork Sun 0x0000003f, /* mdasp */
841fdcc8dfSYork Sun 0x0000022a, /* mpodtctrl */
851fdcc8dfSYork Sun 0xa1390003, /* mpzqhwctrl */
861fdcc8dfSYork Sun };
871fdcc8dfSYork Sun
881fdcc8dfSYork Sun mmdc_init(&mparam);
899d044fcbSPrabhakar Kushwaha gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
904961eafcSYork Sun #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
914961eafcSYork Sun /* This will break-before-make MMU for DDR */
924961eafcSYork Sun update_early_mmu_table();
934961eafcSYork Sun #endif
949d044fcbSPrabhakar Kushwaha
959d044fcbSPrabhakar Kushwaha return 0;
969d044fcbSPrabhakar Kushwaha }
97*10c8aa16SRajesh Bhagat #endif
989d044fcbSPrabhakar Kushwaha
board_early_init_f(void)999d044fcbSPrabhakar Kushwaha int board_early_init_f(void)
1009d044fcbSPrabhakar Kushwaha {
1019d044fcbSPrabhakar Kushwaha fsl_lsch2_early_init_f();
1029d044fcbSPrabhakar Kushwaha
1039d044fcbSPrabhakar Kushwaha return 0;
1049d044fcbSPrabhakar Kushwaha }
1059d044fcbSPrabhakar Kushwaha
1069d044fcbSPrabhakar Kushwaha #ifdef CONFIG_MISC_INIT_R
misc_init_r(void)1079d044fcbSPrabhakar Kushwaha int misc_init_r(void)
1089d044fcbSPrabhakar Kushwaha {
1099d044fcbSPrabhakar Kushwaha u8 mux_sdhc_cd = 0x80;
1109d044fcbSPrabhakar Kushwaha
1119d044fcbSPrabhakar Kushwaha i2c_set_bus_num(0);
1129d044fcbSPrabhakar Kushwaha
1139d044fcbSPrabhakar Kushwaha i2c_write(CONFIG_SYS_I2C_FPGA_ADDR, 0x5a, 1, &mux_sdhc_cd, 1);
1149d044fcbSPrabhakar Kushwaha return 0;
1159d044fcbSPrabhakar Kushwaha }
1169d044fcbSPrabhakar Kushwaha #endif
1179d044fcbSPrabhakar Kushwaha
board_init(void)1189d044fcbSPrabhakar Kushwaha int board_init(void)
1199d044fcbSPrabhakar Kushwaha {
12063b2316cSAshish Kumar struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
12163b2316cSAshish Kumar CONFIG_SYS_CCI400_OFFSET);
1229d044fcbSPrabhakar Kushwaha
1239d044fcbSPrabhakar Kushwaha /* Set CCI-400 control override register to enable barrier
1249d044fcbSPrabhakar Kushwaha * transaction */
125*10c8aa16SRajesh Bhagat if (current_el() == 3)
1269d044fcbSPrabhakar Kushwaha out_le32(&cci->ctrl_ord,
1279d044fcbSPrabhakar Kushwaha CCI400_CTRLORD_EN_BARRIER);
1289d044fcbSPrabhakar Kushwaha
129b392a6d4SHou Zhiqiang #ifdef CONFIG_SYS_FSL_ERRATUM_A010315
130b392a6d4SHou Zhiqiang erratum_a010315();
131b392a6d4SHou Zhiqiang #endif
132b392a6d4SHou Zhiqiang
1339d044fcbSPrabhakar Kushwaha #ifdef CONFIG_ENV_IS_NOWHERE
1349d044fcbSPrabhakar Kushwaha gd->env_addr = (ulong)&default_environment[0];
1359d044fcbSPrabhakar Kushwaha #endif
1365b404be6SPrabhakar Kushwaha
137e5141cbeSRajesh Bhagat #ifdef CONFIG_FSL_CAAM
138e5141cbeSRajesh Bhagat sec_init();
139e5141cbeSRajesh Bhagat #endif
140e5141cbeSRajesh Bhagat
1415b404be6SPrabhakar Kushwaha #ifdef CONFIG_FSL_LS_PPA
1425b404be6SPrabhakar Kushwaha ppa_init();
1435b404be6SPrabhakar Kushwaha #endif
1449d044fcbSPrabhakar Kushwaha return 0;
1459d044fcbSPrabhakar Kushwaha }
1469d044fcbSPrabhakar Kushwaha
esdhc_status_fixup(void * blob,const char * compat)147208e1ae8SYangbo Lu int esdhc_status_fixup(void *blob, const char *compat)
148208e1ae8SYangbo Lu {
149208e1ae8SYangbo Lu char esdhc0_path[] = "/soc/esdhc@1560000";
150208e1ae8SYangbo Lu char esdhc1_path[] = "/soc/esdhc@1580000";
151208e1ae8SYangbo Lu u8 card_id;
152208e1ae8SYangbo Lu
153208e1ae8SYangbo Lu do_fixup_by_path(blob, esdhc0_path, "status", "okay",
154208e1ae8SYangbo Lu sizeof("okay"), 1);
155208e1ae8SYangbo Lu
156208e1ae8SYangbo Lu /*
157208e1ae8SYangbo Lu * The Presence Detect 2 register detects the installation
158208e1ae8SYangbo Lu * of cards in various PCI Express or SGMII slots.
159208e1ae8SYangbo Lu *
160208e1ae8SYangbo Lu * STAT_PRS2[7:5]: Specifies the type of card installed in the
161208e1ae8SYangbo Lu * SDHC2 Adapter slot. 0b111 indicates no adapter is installed.
162208e1ae8SYangbo Lu */
163208e1ae8SYangbo Lu card_id = (QIXIS_READ(present2) & 0xe0) >> 5;
164208e1ae8SYangbo Lu
165208e1ae8SYangbo Lu /* If no adapter is installed in SDHC2, disable SDHC2 */
166208e1ae8SYangbo Lu if (card_id == 0x7)
167208e1ae8SYangbo Lu do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
168208e1ae8SYangbo Lu sizeof("disabled"), 1);
169208e1ae8SYangbo Lu else
170208e1ae8SYangbo Lu do_fixup_by_path(blob, esdhc1_path, "status", "okay",
171208e1ae8SYangbo Lu sizeof("okay"), 1);
172208e1ae8SYangbo Lu return 0;
173208e1ae8SYangbo Lu }
174208e1ae8SYangbo Lu
pfe_set_properties(void * set_blob,struct pfe_prop_val prop_val,char * enet_path,char * mdio_path)1757a8df8baSCalvin Johnson static int pfe_set_properties(void *set_blob, struct pfe_prop_val prop_val,
1767a8df8baSCalvin Johnson char *enet_path, char *mdio_path)
1777a8df8baSCalvin Johnson {
1787a8df8baSCalvin Johnson do_fixup_by_path(set_blob, enet_path, "fsl,gemac-bus-id",
1797a8df8baSCalvin Johnson &prop_val.busid, PFE_PROP_LEN, 1);
1807a8df8baSCalvin Johnson do_fixup_by_path(set_blob, enet_path, "fsl,gemac-phy-id",
1817a8df8baSCalvin Johnson &prop_val.phyid, PFE_PROP_LEN, 1);
1827a8df8baSCalvin Johnson do_fixup_by_path(set_blob, enet_path, "fsl,mdio-mux-val",
1837a8df8baSCalvin Johnson &prop_val.mux_val, PFE_PROP_LEN, 1);
1847a8df8baSCalvin Johnson do_fixup_by_path(set_blob, enet_path, "phy-mode",
1857a8df8baSCalvin Johnson prop_val.phy_mode, strlen(prop_val.phy_mode) + 1, 1);
1867a8df8baSCalvin Johnson do_fixup_by_path(set_blob, mdio_path, "fsl,mdio-phy-mask",
1877a8df8baSCalvin Johnson &prop_val.phy_mask, PFE_PROP_LEN, 1);
1887a8df8baSCalvin Johnson return 0;
1897a8df8baSCalvin Johnson }
1907a8df8baSCalvin Johnson
fdt_fsl_fixup_of_pfe(void * blob)1917a8df8baSCalvin Johnson static void fdt_fsl_fixup_of_pfe(void *blob)
1927a8df8baSCalvin Johnson {
1937a8df8baSCalvin Johnson int i = 0;
1947a8df8baSCalvin Johnson struct pfe_prop_val prop_val;
1957a8df8baSCalvin Johnson void *l_blob = blob;
1967a8df8baSCalvin Johnson
1977a8df8baSCalvin Johnson struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
1987a8df8baSCalvin Johnson unsigned int srds_s1 = in_be32(&gur->rcwsr[4]) &
1997a8df8baSCalvin Johnson FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
2007a8df8baSCalvin Johnson srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
2017a8df8baSCalvin Johnson
2027a8df8baSCalvin Johnson for (i = 0; i < NUM_ETH_NODE; i++) {
2037a8df8baSCalvin Johnson switch (srds_s1) {
2047a8df8baSCalvin Johnson case SERDES_1_G_PROTOCOL:
2057a8df8baSCalvin Johnson if (i == 0) {
2067a8df8baSCalvin Johnson prop_val.busid = cpu_to_fdt32(
2077a8df8baSCalvin Johnson ETH_1_1G_BUS_ID);
2087a8df8baSCalvin Johnson prop_val.phyid = cpu_to_fdt32(
2097a8df8baSCalvin Johnson ETH_1_1G_PHY_ID);
2107a8df8baSCalvin Johnson prop_val.mux_val = cpu_to_fdt32(
2117a8df8baSCalvin Johnson ETH_1_1G_MDIO_MUX);
2127a8df8baSCalvin Johnson prop_val.phy_mask = cpu_to_fdt32(
2137a8df8baSCalvin Johnson ETH_1G_MDIO_PHY_MASK);
2147a8df8baSCalvin Johnson prop_val.phy_mode = "sgmii";
2157a8df8baSCalvin Johnson pfe_set_properties(l_blob, prop_val, ETH_1_PATH,
2167a8df8baSCalvin Johnson ETH_1_MDIO);
2177a8df8baSCalvin Johnson } else {
2187a8df8baSCalvin Johnson prop_val.busid = cpu_to_fdt32(
2197a8df8baSCalvin Johnson ETH_2_1G_BUS_ID);
2207a8df8baSCalvin Johnson prop_val.phyid = cpu_to_fdt32(
2217a8df8baSCalvin Johnson ETH_2_1G_PHY_ID);
2227a8df8baSCalvin Johnson prop_val.mux_val = cpu_to_fdt32(
2237a8df8baSCalvin Johnson ETH_2_1G_MDIO_MUX);
2247a8df8baSCalvin Johnson prop_val.phy_mask = cpu_to_fdt32(
2257a8df8baSCalvin Johnson ETH_1G_MDIO_PHY_MASK);
2267a8df8baSCalvin Johnson prop_val.phy_mode = "rgmii";
2277a8df8baSCalvin Johnson pfe_set_properties(l_blob, prop_val, ETH_2_PATH,
2287a8df8baSCalvin Johnson ETH_2_MDIO);
2297a8df8baSCalvin Johnson }
2307a8df8baSCalvin Johnson break;
2317a8df8baSCalvin Johnson case SERDES_2_5_G_PROTOCOL:
2327a8df8baSCalvin Johnson if (i == 0) {
2337a8df8baSCalvin Johnson prop_val.busid = cpu_to_fdt32(
2347a8df8baSCalvin Johnson ETH_1_2_5G_BUS_ID);
2357a8df8baSCalvin Johnson prop_val.phyid = cpu_to_fdt32(
2367a8df8baSCalvin Johnson ETH_1_2_5G_PHY_ID);
2377a8df8baSCalvin Johnson prop_val.mux_val = cpu_to_fdt32(
2387a8df8baSCalvin Johnson ETH_1_2_5G_MDIO_MUX);
2397a8df8baSCalvin Johnson prop_val.phy_mask = cpu_to_fdt32(
2407a8df8baSCalvin Johnson ETH_2_5G_MDIO_PHY_MASK);
2417a8df8baSCalvin Johnson prop_val.phy_mode = "sgmii-2500";
2427a8df8baSCalvin Johnson pfe_set_properties(l_blob, prop_val, ETH_1_PATH,
2437a8df8baSCalvin Johnson ETH_1_MDIO);
2447a8df8baSCalvin Johnson } else {
2457a8df8baSCalvin Johnson prop_val.busid = cpu_to_fdt32(
2467a8df8baSCalvin Johnson ETH_2_2_5G_BUS_ID);
2477a8df8baSCalvin Johnson prop_val.phyid = cpu_to_fdt32(
2487a8df8baSCalvin Johnson ETH_2_2_5G_PHY_ID);
2497a8df8baSCalvin Johnson prop_val.mux_val = cpu_to_fdt32(
2507a8df8baSCalvin Johnson ETH_2_2_5G_MDIO_MUX);
2517a8df8baSCalvin Johnson prop_val.phy_mask = cpu_to_fdt32(
2527a8df8baSCalvin Johnson ETH_2_5G_MDIO_PHY_MASK);
2537a8df8baSCalvin Johnson prop_val.phy_mode = "sgmii-2500";
2547a8df8baSCalvin Johnson pfe_set_properties(l_blob, prop_val, ETH_2_PATH,
2557a8df8baSCalvin Johnson ETH_2_MDIO);
2567a8df8baSCalvin Johnson }
2577a8df8baSCalvin Johnson break;
2587a8df8baSCalvin Johnson default:
2597a8df8baSCalvin Johnson printf("serdes:[%d]\n", srds_s1);
2607a8df8baSCalvin Johnson }
2617a8df8baSCalvin Johnson }
2627a8df8baSCalvin Johnson }
2637a8df8baSCalvin Johnson
2649d044fcbSPrabhakar Kushwaha #ifdef CONFIG_OF_BOARD_SETUP
ft_board_setup(void * blob,bd_t * bd)2659d044fcbSPrabhakar Kushwaha int ft_board_setup(void *blob, bd_t *bd)
2669d044fcbSPrabhakar Kushwaha {
2679d044fcbSPrabhakar Kushwaha arch_fixup_fdt(blob);
2689d044fcbSPrabhakar Kushwaha
2699d044fcbSPrabhakar Kushwaha ft_cpu_setup(blob, bd);
2707a8df8baSCalvin Johnson fdt_fsl_fixup_of_pfe(blob);
2719d044fcbSPrabhakar Kushwaha
2729d044fcbSPrabhakar Kushwaha return 0;
2739d044fcbSPrabhakar Kushwaha }
2749d044fcbSPrabhakar Kushwaha #endif
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