Searched refs:cascaded (Results 1 – 25 of 60) sorted by relevance
123
51 unsigned int cascaded = offset / 16; in exar_offset_to_sel_addr() local54 return addr + (cascaded ? exar_gpio->cascaded_offset : 0); in exar_offset_to_sel_addr()61 unsigned int cascaded = offset / 16; in exar_offset_to_lvl_addr() local64 return addr + (cascaded ? exar_gpio->cascaded_offset : 0); in exar_offset_to_lvl_addr()
17 it is considered as an interrupt controller cascaded to the SoC one.34 interrupts = <39>; /* IRQ_SYS_1N cascaded to gic */
32 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
40 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
24 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
168 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */175 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
176 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */188 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
69 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
86 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
114 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
61 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
83 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
410 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */422 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
145 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
151 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
17 - interrupts: empty for MIC interrupt controller, cascaded MIC
36 - interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ
16 The GPIO module may serve as another interrupt controller (cascaded to
82 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
191 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
47 /* Secondary IC cascaded to intc0 */
50 /* Secondary IC cascaded to intc0 */
51 /* Secondary IC cascaded to intc0 */