1/* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License version 2 as 4 * published by the Free Software Foundation. 5 */ 6 7#include <dt-bindings/input/input.h> 8 9/ { 10 chosen { 11 stdout-path = &uart1; 12 }; 13 14 cpus { 15 cpu@0 { 16 cpu0-supply = <&vcc>; 17 }; 18 }; 19 20 memory@80000000 { 21 device_type = "memory"; 22 reg = <0x80000000 0>; 23 }; 24 25 leds { 26 compatible = "gpio-leds"; 27 user0 { 28 label = "user0"; 29 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* LEDA */ 30 linux,default-trigger = "none"; 31 }; 32 }; 33 34 /* fixed 26MHz oscillator */ 35 hfclk_26m: oscillator { 36 #clock-cells = <0>; 37 compatible = "fixed-clock"; 38 clock-frequency = <26000000>; 39 }; 40}; 41 42&gpmc { 43 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */ 44 45 nand@0,0 { 46 compatible = "ti,omap2-nand"; 47 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 48 interrupt-parent = <&gpmc>; 49 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 50 <1 IRQ_TYPE_NONE>; /* termcount */ 51 linux,mtd-name = "micron,mt29f4g16abbda3w"; 52 nand-bus-width = <16>; 53 ti,nand-ecc-opt = "bch8"; 54 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ 55 gpmc,sync-clk-ps = <0>; 56 gpmc,cs-on-ns = <0>; 57 gpmc,cs-rd-off-ns = <44>; 58 gpmc,cs-wr-off-ns = <44>; 59 gpmc,adv-on-ns = <6>; 60 gpmc,adv-rd-off-ns = <34>; 61 gpmc,adv-wr-off-ns = <44>; 62 gpmc,we-off-ns = <40>; 63 gpmc,oe-off-ns = <54>; 64 gpmc,access-ns = <64>; 65 gpmc,rd-cycle-ns = <82>; 66 gpmc,wr-cycle-ns = <82>; 67 gpmc,wr-access-ns = <40>; 68 gpmc,wr-data-mux-bus-ns = <0>; 69 gpmc,device-width = <2>; 70 #address-cells = <1>; 71 #size-cells = <1>; 72 }; 73}; 74 75&i2c1 { 76 pinctrl-names = "default"; 77 pinctrl-0 = <&i2c1_pins>; 78 clock-frequency = <2600000>; 79 80 twl: twl@48 { 81 reg = <0x48>; 82 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 83 interrupt-parent = <&intc>; 84 clocks = <&hfclk_26m>; 85 clock-names = "fck"; 86 87 twl_audio: audio { 88 compatible = "ti,twl4030-audio"; 89 codec { 90 }; 91 }; 92 }; 93}; 94 95&i2c2 { 96 pinctrl-names = "default"; 97 pinctrl-0 = <&i2c2_pins>; 98 clock-frequency = <400000>; 99}; 100 101&i2c3 { 102 pinctrl-names = "default"; 103 pinctrl-0 = <&i2c3_pins>; 104 clock-frequency = <400000>; 105 at24@50 { 106 compatible = "atmel,24c64"; 107 readonly; 108 reg = <0x50>; 109 }; 110}; 111 112&omap3_pmx_core { 113 mcbsp2_pins: pinmux_mcbsp2_pins { 114 pinctrl-single,pins = < 115 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */ 116 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */ 117 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */ 118 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */ 119 >; 120 }; 121 uart2_pins: pinmux_uart2_pins { 122 pinctrl-single,pins = < 123 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ 124 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ 125 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ 126 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ 127 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */ 128 >; 129 }; 130 mcspi1_pins: pinmux_mcspi1_pins { 131 pinctrl-single,pins = < 132 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ 133 OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */ 134 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */ 135 OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */ 136 >; 137 }; 138 hsusb_otg_pins: pinmux_hsusb_otg_pins { 139 pinctrl-single,pins = < 140 OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ 141 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ 142 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ 143 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ 144 145 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */ 146 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ 147 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ 148 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */ 149 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */ 150 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */ 151 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */ 152 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ 153 >; 154 }; 155 i2c1_pins: pinmux_i2c1_pins { 156 pinctrl-single,pins = < 157 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ 158 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ 159 >; 160 }; 161 i2c2_pins: pinmux_i2c2_pins { 162 pinctrl-single,pins = < 163 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ 164 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ 165 >; 166 }; 167 i2c3_pins: pinmux_i2c3_pins { 168 pinctrl-single,pins = < 169 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */ 170 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */ 171 >; 172 }; 173}; 174 175&uart2 { 176 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>; 177 pinctrl-names = "default"; 178 pinctrl-0 = <&uart2_pins>; 179}; 180 181&mcspi1 { 182 pinctrl-names = "default"; 183 pinctrl-0 = <&mcspi1_pins>; 184}; 185 186#include "twl4030.dtsi" 187#include "twl4030_omap3.dtsi" 188 189&twl { 190 twl_power: power { 191 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle"; 192 ti,use_poweroff; 193 }; 194}; 195 196&twl_gpio { 197 ti,use-leds; 198}; 199