Home
last modified time | relevance | path

Searched refs:cache_mem_regs_write_mask (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/hw/cxl/
H A Dcxl-component-utils.c130 QEMU_BUILD_BUG_ON(sizeof(*cregs->cache_mem_regs_write_mask) != 4); in cxl_cache_mem_write_reg()
132 mask = cregs->cache_mem_regs_write_mask[offset / 4]; in cxl_cache_mem_write_reg()
/openbmc/qemu/hw/pci-bridge/
H A Dcxl_downstream.c39 uint32_t *write_msk = dsp->cxl_cstate.crb.cache_mem_regs_write_mask; in latch_registers()
H A Dcxl_root_port.c102 uint32_t *write_msk = crp->cxl_cstate.crb.cache_mem_regs_write_mask; in latch_registers()
H A Dcxl_upstream.c90 uint32_t *write_msk = usp->cxl_cstate.crb.cache_mem_regs_write_mask; in latch_registers()
/openbmc/qemu/include/hw/cxl/
H A Dcxl_component.h225 uint32_t cache_mem_regs_write_mask[CXL2_COMPONENT_CM_REGION_SIZE >> 2]; member