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Searched refs:bus_act_mask (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c81 tm->bus_act_mask = mv_ddr_bus_bit_mask_get(); in mv_ddr_topology_map_update()
176 switch (tm->bus_act_mask) { in mv_ddr_if_bus_width_get()
208 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sphy); in mv_ddr_cs_num_get()
224 if (DDR3_IS_ECC_PUP4_MODE(tm->bus_act_mask) || in mv_ddr_is_ecc_ena()
225 DDR3_IS_ECC_PUP3_MODE(tm->bus_act_mask) || in mv_ddr_is_ecc_ena()
226 DDR3_IS_ECC_PUP8_MODE(tm->bus_act_mask)) in mv_ddr_is_ecc_ena()
252 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, i); in mv_ddr_mem_sz_per_cs_get()
H A Dddr3_training_pbs.c87 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
100 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
176 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
335 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
350 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
373 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
400 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
461 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
478 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
627 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
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H A Dddr3_training_leveling.c206 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_read_leveling()
272 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_read_leveling()
420 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_per_bit_read_leveling()
577 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_per_bit_read_leveling()
651 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, in ddr3_tip_dynamic_per_bit_read_leveling()
683 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_per_bit_read_leveling()
784 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_calc_cs_mask()
919 if (tm->bus_act_mask == 0xb) /* set to data to 0 to skip the check */ in ddr3_tip_dynamic_write_leveling()
927 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_dynamic_write_leveling()
954 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_dynamic_write_leveling()
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H A Dddr3_debug.c140 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_reg_dump()
151 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_reg_dump()
526 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_print_stability_log()
567 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_print_stability_log()
688 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_read_adll_value()
722 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_write_adll_value()
753 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in read_phase_value()
781 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in write_leveling_value()
842 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_print_adll()
876 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, j); in print_adll()
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H A Dddr3_training_ip_engine.c509 if (IS_BUS_ACTIVE(tm->bus_act_mask, pup_id) == 1) in ddr3_tip_ip_training()
582 …if (MV_DDR_IS_64BIT_DRAM_MODE(tm->bus_act_mask)/* || tm->bus_act_mask == MV_DDR_32BIT_ECC_PUP8_BUS… in ddr3_tip_load_pattern_to_odpg()
756 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup_cnt); in ddr3_tip_read_training_result()
1164 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper()
1285 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper()
1322 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper()
1352 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper()
1400 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper()
1467 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_load_phy_values()
1558 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, in ddr3_tip_training_ip_test()
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H A Dddr3_training.c191 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sphy); in ddr3_tip_pad_inv()
371 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_index); in hws_ddr3_tip_init_controller()
391 if (MV_DDR_IS_HALF_BUS_DRAM_MODE(tm->bus_act_mask, octets_per_if_num)) in hws_ddr3_tip_init_controller()
480 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in hws_ddr3_tip_init_controller()
683 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_rev2_rank_control()
737 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_rev3_rank_control()
847 if (DDR3_IS_ECC_PUP3_MODE(tm->bus_act_mask)) { in ddr3_pre_algo_config()
855 if ((DDR3_IS_ECC_PUP4_MODE(tm->bus_act_mask)) || in ddr3_pre_algo_config()
856 (DDR3_IS_ECC_PUP3_MODE(tm->bus_act_mask)) || in ddr3_pre_algo_config()
857 (DDR3_IS_ECC_PUP8_MODE(tm->bus_act_mask))) { in ddr3_pre_algo_config()
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H A Dddr3_training_centralization.c107 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization()
137 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization()
354 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization()
549 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup_id); in ddr3_tip_special_rx()
710 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_print_centralization_result()
H A Dddr3_training_hw_algo.c239 (tm->bus_act_mask, pup); in ddr3_tip_vref()
263 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_vref()
277 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_vref()
605 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_vref()
H A Dddr3_training_bist.c499 u32 burst_len = (MV_DDR_IS_64BIT_DRAM_MODE(tm->bus_act_mask) ? in mv_ddr_dm_vw_get()
574 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get()
588 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get()
596 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get()
H A Dddr_topology_def.h111 u16 bus_act_mask; member
H A Dmv_ddr_plat.c623 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, i); in prfa_read()
925 if (DDR3_IS_16BIT_DRAM_MODE(tm->bus_act_mask)) { in ddr3_silicon_post_init()
1418 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, phy_id); in ddr3_tip_configure_phy()
H A Dddr3_training_db.c668 if (DDR3_IS_16BIT_DRAM_MODE(tm->bus_act_mask) == 0) { in pattern_table_get_word()