| /openbmc/qemu/tests/qtest/ |
| H A D | npcm7xx_adc-test.c | 98 static uint32_t adc_read_con(QTestState *qts, const ADC *adc) in adc_read_con() argument
100 return qtest_readl(qts, adc->base_addr + CON_OFFSET); in adc_read_con()
103 static void adc_write_con(QTestState *qts, const ADC *adc, uint32_t value) in adc_write_con() argument
105 qtest_writel(qts, adc->base_addr + CON_OFFSET, value); in adc_write_con()
108 static uint32_t adc_read_data(QTestState *qts, const ADC *adc) in adc_read_data() argument
110 return qtest_readl(qts, adc->base_addr + DATA_OFFSET); in adc_read_data()
119 static void adc_qom_set(QTestState *qts, const ADC *adc, in adc_qom_set() argument
135 static void adc_write_input(QTestState *qts, const ADC *adc, in adc_write_input() argument
141 adc_qom_set(qts, adc, name, value); in adc_write_input()
144 static void adc_write_vref(QTestState *qts, const ADC *adc, uint32_t value) in adc_write_vref() argument
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| /openbmc/u-boot/drivers/adc/ |
| H A D | stm32-adc.c | 66 struct stm32_adc *adc = dev_get_priv(dev); in stm32_adc_stop() local
68 setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADDIS); in stm32_adc_stop()
69 clrbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_BOOST); in stm32_adc_stop()
71 setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_DEEPPWD); in stm32_adc_stop()
72 adc->active_channel = -1; in stm32_adc_stop()
81 struct stm32_adc *adc = dev_get_priv(dev); in stm32_adc_start_channel() local
86 clrbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_DEEPPWD); in stm32_adc_start_channel()
87 setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADVREGEN); in stm32_adc_start_channel()
89 setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_BOOST); in stm32_adc_start_channel()
92 if (!adc->cfg->has_vregready) { in stm32_adc_start_channel()
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| H A D | Makefile | 7 obj-$(CONFIG_ADC) += adc-uclass.o
8 obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
12 obj-$(CONFIG_STM32_ADC) += stm32-adc.o stm32-adc-core.o
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| /openbmc/u-boot/doc/device-tree-bindings/adc/ |
| H A D | st,stm32-adc.txt | 21 Contents of a stm32 adc root node:
25 "st,stm32f4-adc-core"
26 "st,stm32h7-adc-core"
27 "st,stm32mp1-adc-core"
33 - "adc" clock: for the analog circuitry, common to all ADCs.
39 - clock-names: Must be "adc" and/or "bus" depending on part used.
50 Contents of a stm32 adc child node:
57 "st,stm32f4-adc"
58 "st,stm32h7-adc"
59 "st,stm32mp1-adc"
[all …]
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| H A D | adc.txt | 24 adc@1000000 {
25 compatible = "some-adc";
55 adc@0 {
56 compatible = "sandbox,adc";
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| /openbmc/u-boot/board/samsung/universal_c210/ |
| H A D | universal.c | 49 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc(); in get_adc_value() local
54 writel(channel & 0xF, &adc->adcmux); in get_adc_value()
55 writel((1 << 14) | (49 << 6), &adc->adccon); in get_adc_value()
56 writel(1000 & 0xffff, &adc->adcdly); in get_adc_value()
57 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */ in get_adc_value()
59 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */ in get_adc_value()
64 reg = readl(&adc->adccon); in get_adc_value()
67 ret = readl(&adc->adcdat0) & 0xFFF; in get_adc_value()
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | at91sam9x5dm.dtsi | 50 adc0: adc@f804c000 {
51 atmel,adc-ts-wires = <4>;
52 atmel,adc-ts-pressure-threshold = <10000>;
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| H A D | sama5d3xdm.dtsi | 51 adc0: adc@f8018000 {
52 atmel,adc-ts-wires = <4>;
53 atmel,adc-ts-pressure-threshold = <10000>;
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| H A D | at91sam9g20.dtsi | 38 adc0: adc@fffe0000 {
39 atmel,adc-startup-time = <40>;
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| H A D | stm32f429.dtsi | 459 adc: adc@40012000 { label
460 compatible = "st,stm32f4-adc-core";
464 clock-names = "adc";
471 adc1: adc@0 {
472 compatible = "st,stm32f4-adc";
476 interrupt-parent = <&adc>;
483 adc2: adc@100 {
484 compatible = "st,stm32f4-adc";
488 interrupt-parent = <&adc>;
495 adc3: adc@200 {
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| H A D | at91sam9x5ek.dtsi | 74 adc0: adc@f804c000 {
75 atmel,adc-ts-wires = <4>;
76 atmel,adc-ts-pressure-threshold = <10000>;
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| H A D | stm32429i-eval.dts | 114 &adc {
119 adc3: adc@200 {
120 st,adc-channels = <8>;
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| H A D | stm32mp157c.dtsi | 631 adc: adc@48003000 { label
632 compatible = "st,stm32mp1-adc-core";
637 clock-names = "bus", "adc";
644 adc1: adc@0 {
645 compatible = "st,stm32mp1-adc";
648 interrupt-parent = <&adc>;
653 adc2: adc@100 {
654 compatible = "st,stm32mp1-adc";
657 interrupt-parent = <&adc>;
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| /openbmc/u-boot/arch/arm/lib/ |
| H A D | muldi3.S | 40 adc xh, xh, yh, lsr #16
42 adc xh, xh, ip, lsr #16
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| /openbmc/qemu/hw/adc/ |
| H A D | npcm7xx_adc.c | 114 static void npcm7xx_adc_calibrate(NPCM7xxADCState *adc) in npcm7xx_adc_calibrate() argument
116 adc->calibration_r_values[0] = npcm7xx_adc_convert(NPCM7XX_ADC_R0_INPUT, in npcm7xx_adc_calibrate()
117 adc->iref); in npcm7xx_adc_calibrate()
118 adc->calibration_r_values[1] = npcm7xx_adc_convert(NPCM7XX_ADC_R1_INPUT, in npcm7xx_adc_calibrate()
119 adc->iref); in npcm7xx_adc_calibrate()
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| /openbmc/qemu/hw/input/ |
| H A D | adb.c | 53 ADBDeviceClass *adc; in do_adb_request() local
69 adc = ADB_DEVICE_GET_CLASS(d); in do_adb_request()
71 if (adc->devhasdata(d)) { in do_adb_request()
80 adc = ADB_DEVICE_GET_CLASS(d); in do_adb_request()
83 olen = adc->devreq(d, obuf, buf, len); in do_adb_request()
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| H A D | adb-mouse.c | 293 ADBDeviceClass *adc = ADB_DEVICE_CLASS(oc); in adb_mouse_class_init() local
300 adc->devreq = adb_mouse_request; in adb_mouse_class_init()
301 adc->devhasdata = adb_mouse_has_data; in adb_mouse_class_init()
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| /openbmc/openbmc-tools/adcapp/src/ |
| H A D | Makefile.am | 2 adcapp_SOURCES = adcapp.c adcifc.c adcifc.h adc.h EINTR_wrappers.c EINTR_wrappers.h
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| /openbmc/dbus-sensors/src/adc/ |
| H A D | meson.build | 1 if not get_option('adc').allowed()
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| /openbmc/qemu/hw/arm/ |
| H A D | stm32f205_soc.c | 72 object_initialize_child(obj, "adc[*]", &s->adc[i], TYPE_STM32F2XX_ADC); in stm32f205_soc_initfn()
183 dev = DEVICE(&(s->adc[i])); in stm32f205_soc_realize()
184 if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc[i]), errp)) { in stm32f205_soc_realize()
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| H A D | npcm7xx.c | 402 QEMU_BUILD_BUG_ON(sizeof(s->adc.calibration_r_values) != 4); in npcm7xx_write_adc_calibration()
403 npcm7xx_otp_array_write(&s->fuse_array, s->adc.calibration_r_values, in npcm7xx_write_adc_calibration()
404 NPCM7XX_FUSE_ADC_CALIB, sizeof(s->adc.calibration_r_values)); in npcm7xx_write_adc_calibration()
433 object_initialize_child(obj, "adc", &s->adc, TYPE_NPCM7XX_ADC); in npcm7xx_init()
551 qdev_connect_clock_in(DEVICE(&s->adc), "clock", qdev_get_clock_out( in npcm7xx_realize()
553 sysbus_realize(SYS_BUS_DEVICE(&s->adc), &error_abort); in npcm7xx_realize()
554 sysbus_mmio_map(SYS_BUS_DEVICE(&s->adc), 0, NPCM7XX_ADC_BA); in npcm7xx_realize()
555 sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0, in npcm7xx_realize()
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| H A D | npcm8xx.c | 395 QEMU_BUILD_BUG_ON(sizeof(s->adc.calibration_r_values) != 4); in npcm8xx_write_adc_calibration()
396 npcm7xx_otp_array_write(&s->fuse_array, s->adc.calibration_r_values, in npcm8xx_write_adc_calibration()
397 NPCM7XX_FUSE_ADC_CALIB, sizeof(s->adc.calibration_r_values)); in npcm8xx_write_adc_calibration()
425 object_initialize_child(obj, "adc", &s->adc, TYPE_NPCM7XX_ADC); in npcm8xx_init()
565 qdev_connect_clock_in(DEVICE(&s->adc), "clock", qdev_get_clock_out( in npcm8xx_realize()
567 sysbus_realize(SYS_BUS_DEVICE(&s->adc), &error_abort); in npcm8xx_realize()
568 sysbus_mmio_map(SYS_BUS_DEVICE(&s->adc), 0, NPCM8XX_ADC_BA); in npcm8xx_realize()
569 sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0, in npcm8xx_realize()
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| /openbmc/openbmc-tools/adcapp/ |
| H A D | README | 5 --read-adc-channel: Get ADC value for all the ADC channels
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| /openbmc/qemu/include/hw/arm/ |
| H A D | stm32f205_soc.h | 59 STM32F2XXADCState adc[STM_NUM_ADCS]; member
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| H A D | stm32f405_soc.h | 65 STM32F2XXADCState adc[STM_NUM_ADCS]; member
|