/openbmc/qemu/linux-user/mips/ |
H A D | signal.c | 228 regs->active_tc.gpr[ 4] = sig; in setup_frame() 229 regs->active_tc.gpr[ 5] = 0; in setup_frame() 236 regs->active_tc.PC = regs->active_tc.gpr[25] = ka->_sa_handler; in setup_frame() 279 regs->active_tc.PC = regs->CP0_EPC; in do_sigreturn() 328 env->active_tc.gpr[ 4] = sig; in setup_rt_frame() 329 env->active_tc.gpr[ 5] = frame_addr in setup_rt_frame() 331 env->active_tc.gpr[ 6] = frame_addr in setup_rt_frame() 333 env->active_tc.gpr[29] = frame_addr; in setup_rt_frame() 341 env->active_tc.PC = env->active_tc.gpr[25] = ka->_sa_handler; in setup_rt_frame() 357 frame_addr = env->active_tc.gpr[29]; in do_rt_sigreturn() [all …]
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H A D | cpu_loop.c | 44 target_ulong pc = env->active_tc.PC; in do_tr_or_bp() 81 env->active_tc.PC += 4; in cpu_loop() 98 sp_reg = env->active_tc.gpr[29]; in cpu_loop() 134 env->active_tc.gpr[4], env->active_tc.gpr[5], in cpu_loop() 135 env->active_tc.gpr[6], env->active_tc.gpr[7], in cpu_loop() 136 env->active_tc.gpr[8], env->active_tc.gpr[9], in cpu_loop() 137 env->active_tc.gpr[10], env->active_tc.gpr[11]); in cpu_loop() 140 env->active_tc.PC -= 4; in cpu_loop() 154 env->active_tc.gpr[2] = ret; in cpu_loop() 166 env->active_tc.PC); in cpu_loop() [all …]
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H A D | target_cpu.h | 26 env->active_tc.gpr[29] = newsp; in cpu_clone_regs_child() 28 env->active_tc.gpr[7] = 0; in cpu_clone_regs_child() 29 env->active_tc.gpr[2] = 0; in cpu_clone_regs_child() 38 env->active_tc.CP0_UserLocal = newtls; in cpu_set_tls() 43 return state->active_tc.gpr[29]; in get_sp_from_cpustate()
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/openbmc/qemu/target/mips/ |
H A D | msa.c | 44 env->active_tc.msacsr = 0; in msa_reset() 50 &env->active_tc.msa_fp_status); in msa_reset() 53 set_float_exception_flags(0, &env->active_tc.msa_fp_status); in msa_reset() 56 set_default_nan_mode(0, &env->active_tc.msa_fp_status); in msa_reset() 59 set_snan_bit_is_one(0, &env->active_tc.msa_fp_status); in msa_reset()
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H A D | gdbstub.c | 31 return gdb_get_regl(mem_buf, env->active_tc.gpr[n]); in mips_cpu_gdb_read_register() 53 return gdb_get_regl(mem_buf, env->active_tc.LO[0]); in mips_cpu_gdb_read_register() 55 return gdb_get_regl(mem_buf, env->active_tc.HI[0]); in mips_cpu_gdb_read_register() 61 return gdb_get_regl(mem_buf, env->active_tc.PC | in mips_cpu_gdb_read_register() 86 env->active_tc.gpr[n] = tmp; in mips_cpu_gdb_write_register() 116 env->active_tc.LO[0] = tmp; in mips_cpu_gdb_write_register() 119 env->active_tc.HI[0] = tmp; in mips_cpu_gdb_write_register() 130 env->active_tc.PC = tmp & ~(target_ulong)1; in mips_cpu_gdb_write_register()
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H A D | fpu_helper.h | 58 float_status *status = &env->active_tc.msa_fp_status; in restore_msa_fp_status() 59 int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM; in restore_msa_fp_status() 60 bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0; in restore_msa_fp_status()
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H A D | cpu.c | 89 env->active_tc.PC, env->active_tc.HI[0], env->active_tc.LO[0], in mips_cpu_dump_state() 96 regnames[i], env->active_tc.gpr[i]); in mips_cpu_dump_state() 132 return cpu->env.active_tc.PC; in mips_cpu_get_pc() 290 env->CP0_ErrorEPC = (env->active_tc.PC in mips_cpu_reset_hold() 293 env->CP0_ErrorEPC = env->active_tc.PC; in mips_cpu_reset_hold() 295 env->active_tc.PC = env->exception_base; in mips_cpu_reset_hold() 341 env->active_tc.CP0_TCHalt = 1; in mips_cpu_reset_hold() 351 env->active_tc.CP0_TCHalt = 0; in mips_cpu_reset_hold() 354 env->active_tc.CP0_TCStatus = (1 << CP0TCSt_A); in mips_cpu_reset_hold() 420 env->active_tc.gpr[4] = -1; in mips_cpu_reset_hold()
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H A D | kvm.c | 646 &env->active_tc.msacsr); in kvm_mips_put_fpu_registers() 723 &env->active_tc.msacsr); in kvm_mips_get_fpu_registers() 771 &env->active_tc.CP0_UserLocal); in kvm_mips_put_cp0_registers() 991 &env->active_tc.CP0_UserLocal); in kvm_mips_get_cp0_registers() 1187 regs.hi = (int64_t)(target_long)env->active_tc.HI[0]; in kvm_arch_put_registers() 1188 regs.lo = (int64_t)(target_long)env->active_tc.LO[0]; in kvm_arch_put_registers() 1189 regs.pc = (int64_t)(target_long)env->active_tc.PC; in kvm_arch_put_registers() 1225 env->active_tc.gpr[i] = regs.gpr[i]; in kvm_arch_get_registers() 1228 env->active_tc.HI[0] = regs.hi; in kvm_arch_get_registers() 1229 env->active_tc.LO[0] = regs.lo; in kvm_arch_get_registers() [all …]
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H A D | internal.h | 178 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled() 220 env->active_tc.PC = value & ~(target_ulong)1; in mips_env_set_pc() 258 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active() 262 if (env->active_tc.CP0_TCHalt & 1) { in mips_vpe_active()
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H A D | cpu.h | 529 TCState active_tc; member 1366 *pc = env->active_tc.PC; in cpu_get_tb_cpu_state()
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/openbmc/qemu/target/mips/tcg/sysemu/ |
H A D | cp0_helper.c | 251 return env->active_tc.CP0_TCStatus; in helper_mfc0_tcstatus() 268 return env->active_tc.CP0_TCBind; in helper_mfc0_tcbind() 285 return env->active_tc.PC; in helper_mfc0_tcrestart() 294 return other->active_tc.PC; in helper_mftc0_tcrestart() 302 return env->active_tc.CP0_TCHalt; in helper_mfc0_tchalt() 319 return env->active_tc.CP0_TCContext; in helper_mfc0_tccontext() 457 return env->active_tc.PC; in helper_dmfc0_tcrestart() 462 return env->active_tc.CP0_TCHalt; in helper_dmfc0_tchalt() 698 env->active_tc.CP0_TCBind = newval; in helper_mtc0_tcbind() 722 env->active_tc.PC = arg1; in helper_mtc0_tcrestart() [all …]
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H A D | special_helper.c | 49 env->active_tc.PC, env->CP0_EPC); in debug_pre_eret() 64 env->active_tc.PC, env->CP0_EPC); in debug_post_eret() 96 && !tcg_cflags_has(cs, CF_PCREL) && env->active_tc.PC != tb->pc) { in mips_io_recompile_replay_branch() 97 env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); in mips_io_recompile_replay_branch()
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H A D | mips-semi.c | 122 int op = env->active_tc.gpr[25]; in report_fault() 161 env->active_tc.gpr[2] = ret; in uhi_cb() 162 env->active_tc.gpr[3] = err; in uhi_cb() 171 target_ulong addr = env->active_tc.gpr[5]; in uhi_fstat_cb() 205 target_ulong *gpr = env->active_tc.gpr; in mips_semihosting()
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H A D | tlb_helper.c | 1004 instr |= cpu_lduw_code(env, env->active_tc.PC + 2); in set_badinstr_registers() 1021 env->CP0_BadInstr = cpu_ldl_code(env, env->active_tc.PC); in set_badinstr_registers() 1025 env->CP0_BadInstrP = cpu_ldl_code(env, env->active_tc.PC - 4); in set_badinstr_registers() 1041 __func__, env->active_tc.PC, env->CP0_EPC, in mips_cpu_do_interrupt() 1053 env->active_tc.PC += env->error_code; in mips_cpu_do_interrupt() 1099 env->active_tc.PC = env->exception_base + 0x480; in mips_cpu_do_interrupt() 1127 env->active_tc.PC = env->exception_base; in mips_cpu_do_interrupt() 1313 env->active_tc.PC = env->exception_base + 0x200; in mips_cpu_do_interrupt() 1319 env->active_tc.PC = env->CP0_EBase & ~0xfff; in mips_cpu_do_interrupt() 1322 env->active_tc.PC += offset; in mips_cpu_do_interrupt() [all …]
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/openbmc/linux/drivers/scsi/ |
H A D | initio.c | 1295 struct target_control *active_tc = host->active_tc; in initio_state_1() local 1350 struct target_control *active_tc = host->active_tc; in initio_state_2() local 1379 struct target_control *active_tc = host->active_tc; in initio_state_3() local 1730 struct target_control *active_tc = host->active_tc; in initio_xpad_in() local 1754 struct target_control *active_tc = host->active_tc; in initio_xpad_out() local 1842 host->active_tc = NULL; in int_initio_busfree() 1880 host->active_tc = NULL; in int_initio_scsi_rst() 1916 host->active_tc = active_tc; in int_initio_resel() 2073 active_tc = host->active_tc; in initio_msgin() 2284 host->active_tc = NULL; in initio_post_scsi_rst() [all …]
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H A D | initio.h | 500 struct target_control *active_tc; /* 34 */ member
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/openbmc/qemu/target/mips/tcg/ |
H A D | dsp_helper.c | 78 env->active_tc.DSPControl &= filter; in set_DSPControl_24() 86 dspc = env->active_tc.DSPControl; in set_DSPControl_pos() 94 env->active_tc.DSPControl = dspc; in set_DSPControl_pos() 102 dspc = env->active_tc.DSPControl; in get_DSPControl_pos() 525 tempB = env->active_tc.HI[ac]; in mipsdsp_rashift_acc() 526 tempA = env->active_tc.LO[ac]; in mipsdsp_rashift_acc() 546 tempB = env->active_tc.HI[ac]; in mipsdsp_rndrashift_acc() 547 tempA = env->active_tc.LO[ac]; in mipsdsp_rndrashift_acc() 3473 tempB = env->active_tc.HI[ac]; in helper_dextp() 3474 tempA = env->active_tc.LO[ac]; in helper_dextp() [all …]
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H A D | vr54xx_helper.c | 29 return ((uint64_t)(env->active_tc.HI[0]) << 32) | in get_HILO() 30 (uint32_t)env->active_tc.LO[0]; in get_HILO() 35 env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF); in set_HIT0_LO() 36 return env->active_tc.HI[0] = (int32_t)(HILO >> 32); in set_HIT0_LO() 41 target_ulong tmp = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF); in set_HI_LOT0() 42 env->active_tc.HI[0] = (int32_t)(HILO >> 32); in set_HI_LOT0()
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H A D | ldst_helper.c | 230 env->active_tc.gpr[multiple_regs[i]] = in helper_lwm() 237 env->active_tc.gpr[31] = in helper_lwm() 252 cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], in helper_swm() 259 cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); in helper_swm() 274 env->active_tc.gpr[multiple_regs[i]] = in helper_ldm() 281 env->active_tc.gpr[31] = in helper_ldm() 296 cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], in helper_sdm() 303 cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); in helper_sdm()
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H A D | op_helper.c | 162 env->active_tc.CP0_TCStatus & (1 << CP0TCSt_DT)) { in helper_yield() 238 if (env->active_tc.gpr[4] == 0) { in helper_pmon() 239 env->active_tc.gpr[2] = -1; in helper_pmon() 243 env->active_tc.gpr[2] = -1; in helper_pmon() 247 printf("%c", (char)(env->active_tc.gpr[4] & 0xFF)); in helper_pmon() 253 unsigned char *fmt = (void *)(uintptr_t)env->active_tc.gpr[4]; in helper_pmon()
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H A D | exception.c | 34 bad_pc = env->active_tc.PC | isa_mode; in exception_resume_pc() 85 env->active_tc.PC = tb->pc; in mips_cpu_synchronize_from_tb()
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H A D | msa_helper.c | 6021 target_ulong rs = env->active_tc.gpr[rs_num]; in helper_msa_insert_b() 6037 target_ulong rs = env->active_tc.gpr[rs_num]; in helper_msa_insert_h() 6053 target_ulong rs = env->active_tc.gpr[rs_num]; in helper_msa_insert_w() 6069 target_ulong rs = env->active_tc.gpr[rs_num]; in helper_msa_insert_d() 6108 & GET_FP_CAUSE(env->active_tc.msacsr)) { in helper_msa_ctcmsa() 6121 return env->active_tc.msacsr & MSACSR_MASK; in helper_msa_cfcmsa() 6171 SET_FP_CAUSE(env->active_tc.msacsr, 0); in clear_msacsr_cause() 6176 if ((GET_FP_CAUSE(env->active_tc.msacsr) & in check_msacsr_cause() 6178 UPDATE_FP_FLAGS(env->active_tc.msacsr, in check_msacsr_cause() 6283 SET_FP_CAUSE(env->active_tc.msacsr, in update_msacsr() [all …]
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/openbmc/qemu/hw/mips/ |
H A D | mipssim.c | 115 env->active_tc.PC = s->vector & ~(target_ulong)1; in main_cpu_reset() 168 reset_info->vector = env->active_tc.PC; in mips_mipssim_init() 194 env->active_tc.PC = (target_long)(int32_t)0xbfc00000; in mips_mipssim_init()
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H A D | loongson3_virt.c | 412 env->active_tc.gpr[4] = loaderparams.a0; in main_cpu_reset() 413 env->active_tc.gpr[5] = loaderparams.a1; in main_cpu_reset() 414 env->active_tc.gpr[6] = loaderparams.a2; in main_cpu_reset() 415 env->active_tc.PC = loaderparams.kernel_entry; in main_cpu_reset()
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/openbmc/qemu/target/mips/sysemu/ |
H A D | cp0.c | 51 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_status()
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