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Searched refs:active_fpu (Results 1 – 11 of 11) sorted by relevance

/openbmc/qemu/target/mips/tcg/
H A Dfpu_helper.c45 arg1 = (int32_t)env->active_fpu.fcr0; in helper_cfc1()
49 if (env->active_fpu.fcr0 & (1 << FCR0_UFRP)) { in helper_cfc1()
60 if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) { in helper_cfc1()
69 arg1 = ((env->active_fpu.fcr31 >> 24) & 0xfe) | in helper_cfc1()
70 ((env->active_fpu.fcr31 >> 23) & 0x1); in helper_cfc1()
73 arg1 = env->active_fpu.fcr31 & 0x0003f07c; in helper_cfc1()
76 arg1 = (env->active_fpu.fcr31 & 0x00000f83) | in helper_cfc1()
77 ((env->active_fpu.fcr31 >> 22) & 0x4); in helper_cfc1()
80 arg1 = (int32_t)env->active_fpu.fcr31; in helper_cfc1()
92 if (!((env->active_fpu.fcr0 & (1 << FCR0_UFRP)) && (rt == 0))) { in helper_ctc1()
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H A Dmsa_helper.c101 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); in helper_msa_nloc_b()
102 wr_t *pws = &(env->active_fpu.fpr[ws].wr); in helper_msa_nloc_b()
124 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); in helper_msa_nloc_h()
125 wr_t *pws = &(env->active_fpu.fpr[ws].wr); in helper_msa_nloc_h()
139 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); in helper_msa_nloc_w()
140 wr_t *pws = &(env->active_fpu.fpr[ws].wr); in helper_msa_nloc_w()
150 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); in helper_msa_nloc_d()
151 wr_t *pws = &(env->active_fpu.fpr[ws].wr); in helper_msa_nloc_d()
159 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); in helper_msa_nlzc_b()
160 wr_t *pws = &(env->active_fpu.fpr[ws].wr); in helper_msa_nlzc_b()
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H A Dmsa_translate.c138 off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); in msa_translate_init()
141 off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); in msa_translate_init()
/openbmc/qemu/target/mips/
H A Dfpu_helper.h18 set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], in restore_rounding_mode()
19 &env->active_fpu.fp_status); in restore_rounding_mode()
24 set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0, in restore_flush_mode()
25 &env->active_fpu.fp_status); in restore_flush_mode()
30 bool nan2008 = env->active_fpu.fcr31 & (1 << FCR31_NAN2008); in restore_snan_bit_mode()
38 set_snan_bit_is_one(!nan2008, &env->active_fpu.fp_status); in restore_snan_bit_mode()
39 set_default_nan_mode(!nan2008, &env->active_fpu.fp_status); in restore_snan_bit_mode()
47 set_float_infzeronan_rule(izn_rule, &env->active_fpu.fp_status); in restore_snan_bit_mode()
49 set_float_3nan_prop_rule(nan3_rule, &env->active_fpu.fp_status); in restore_snan_bit_mode()
56 &env->active_fpu.fp_status); in restore_snan_bit_mode()
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H A Dgdbstub.c36 return gdb_get_regl(mem_buf, (int32_t)env->active_fpu.fcr31); in mips_cpu_gdb_read_register()
38 return gdb_get_regl(mem_buf, (int32_t)env->active_fpu.fcr0); in mips_cpu_gdb_read_register()
42 env->active_fpu.fpr[n - 38].d); in mips_cpu_gdb_read_register()
45 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]); in mips_cpu_gdb_read_register()
92 env->active_fpu.fcr31 = (tmp & env->active_fpu.fcr31_rw_bitmask) | in mips_cpu_gdb_write_register()
93 (env->active_fpu.fcr31 & ~(env->active_fpu.fcr31_rw_bitmask)); in mips_cpu_gdb_write_register()
101 env->active_fpu.fpr[n - 38].d = tmp; in mips_cpu_gdb_write_register()
103 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp; in mips_cpu_gdb_write_register()
H A Dinternal.h383 if (env->active_fpu.fcr0 & (1 << FCR0_F64)) { in compute_hflags()
406 if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) { in compute_hflags()
H A Dcpu.h530 CPUMIPSFPUContext active_fpu; member
1322 return env->active_fpu.fcr0 & (1 << FCR0_3D); in ase_3d_available()
H A Dcpu-defs.c.inc1032 memcpy(&env->active_fpu, &env->fpus[0], sizeof(env->active_fpu));
/openbmc/qemu/linux-user/mips/
H A Dtarget_prctl.h43 if (new_fr && !(env->active_fpu.fcr0 & (1 << FCR0_F64))) { in do_prctl_set_fp_mode()
47 if (!new_fr && (env->active_fpu.fcr0 & (1 << FCR0_F64)) in do_prctl_set_fp_mode()
52 if (new_fre && !(env->active_fpu.fcr0 & (1 << FCR0_FREP))) { in do_prctl_set_fp_mode()
58 fpr_t *fpr = env->active_fpu.fpr; in do_prctl_set_fp_mode()
76 if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) { in do_prctl_set_fp_mode()
H A Dsignal.c135 __put_user(regs->active_fpu.fpr[i].d, &sc->sc_fpregs[i]); in setup_sigcontext()
166 __get_user(regs->active_fpu.fpr[i].d, &sc->sc_fpregs[i]); in restore_sigcontext()
/openbmc/qemu/target/mips/system/
H A Dmachine.c232 VMSTATE_STRUCT(env.active_fpu, MIPSCPU, 1, vmstate_fpu,