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Searched refs:XCHAL_HAVE_ICACHE_TEST (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h226 #define XCHAL_HAVE_ICACHE_TEST 1 /* Icache test instructions */ macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h225 #define XCHAL_HAVE_ICACHE_TEST 1 /* Icache test instructions */ macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h225 #define XCHAL_HAVE_ICACHE_TEST 1 /* Icache test instructions */ macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h225 #define XCHAL_HAVE_ICACHE_TEST 1 /* Icache test instructions */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h203 #define XCHAL_HAVE_ICACHE_TEST 1 /* Icache test instructions */ macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h234 #define XCHAL_HAVE_ICACHE_TEST 1 /* Icache test instructions */ macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h248 #define XCHAL_HAVE_ICACHE_TEST 0 /* Icache test instructions */ macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h300 #define XCHAL_HAVE_ICACHE_TEST 1 /* Icache test instructions */ macro