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Searched refs:XCHAL_HAVE_DCACHE_DYN_WAYS (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h228 #define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */ macro
275 XCHAL_HAVE_DCACHE_DYN_WAYS) && \
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h228 #define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */ macro
275 XCHAL_HAVE_DCACHE_DYN_WAYS) && \
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h228 #define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */ macro
275 XCHAL_HAVE_DCACHE_DYN_WAYS) && \
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h206 #define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */ macro
253 XCHAL_HAVE_DCACHE_DYN_WAYS) && \
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h229 #define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */ macro
276 XCHAL_HAVE_DCACHE_DYN_WAYS) && \
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h237 #define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */ macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h251 #define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */ macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h303 #define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */ macro