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Searched refs:VM_L2_CNTL__ENABLE_L2_CACHE_MASK (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgmc_v6_0.c485 VM_L2_CNTL__ENABLE_L2_CACHE_MASK | in gmc_v6_0_gart_enable()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_sh_mask.h5267 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x1 macro
H A Dgmc_8_2_sh_mask.h6389 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x1 macro
H A Dgmc_6_0_sh_mask.h11840 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x00000001L macro
H A Dgmc_7_1_sh_mask.h5909 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x1 macro
H A Dgmc_8_1_sh_mask.h6511 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x1 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_1_sh_mask.h7417 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
H A Dmmhub_1_0_sh_mask.h7754 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
H A Dmmhub_9_3_0_sh_mask.h7844 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
H A Dmmhub_1_8_0_sh_mask.h19766 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
H A Dmmhub_1_7_sh_mask.h29682 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h6682 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
H A Dgc_9_2_1_sh_mask.h6319 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
H A Dgc_9_1_sh_mask.h6496 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
H A Dgc_9_4_3_sh_mask.h8971 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
H A Dgc_9_4_2_sh_mask.h29200 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro