152fb57e7SAlex Deucher /* 252fb57e7SAlex Deucher * GMC_7_0 Register documentation 352fb57e7SAlex Deucher * 452fb57e7SAlex Deucher * Copyright (C) 2014 Advanced Micro Devices, Inc. 552fb57e7SAlex Deucher * 652fb57e7SAlex Deucher * Permission is hereby granted, free of charge, to any person obtaining a 752fb57e7SAlex Deucher * copy of this software and associated documentation files (the "Software"), 852fb57e7SAlex Deucher * to deal in the Software without restriction, including without limitation 952fb57e7SAlex Deucher * the rights to use, copy, modify, merge, publish, distribute, sublicense, 1052fb57e7SAlex Deucher * and/or sell copies of the Software, and to permit persons to whom the 1152fb57e7SAlex Deucher * Software is furnished to do so, subject to the following conditions: 1252fb57e7SAlex Deucher * 1352fb57e7SAlex Deucher * The above copyright notice and this permission notice shall be included 1452fb57e7SAlex Deucher * in all copies or substantial portions of the Software. 1552fb57e7SAlex Deucher * 1652fb57e7SAlex Deucher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 1752fb57e7SAlex Deucher * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1852fb57e7SAlex Deucher * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1952fb57e7SAlex Deucher * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 2052fb57e7SAlex Deucher * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 2152fb57e7SAlex Deucher * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 2252fb57e7SAlex Deucher */ 2352fb57e7SAlex Deucher 2452fb57e7SAlex Deucher #ifndef GMC_7_0_SH_MASK_H 2552fb57e7SAlex Deucher #define GMC_7_0_SH_MASK_H 2652fb57e7SAlex Deucher 2752fb57e7SAlex Deucher #define MC_CONFIG__MCDW_WR_ENABLE_MASK 0x1 2852fb57e7SAlex Deucher #define MC_CONFIG__MCDW_WR_ENABLE__SHIFT 0x0 2952fb57e7SAlex Deucher #define MC_CONFIG__MCDX_WR_ENABLE_MASK 0x2 3052fb57e7SAlex Deucher #define MC_CONFIG__MCDX_WR_ENABLE__SHIFT 0x1 3152fb57e7SAlex Deucher #define MC_CONFIG__MCDY_WR_ENABLE_MASK 0x4 3252fb57e7SAlex Deucher #define MC_CONFIG__MCDY_WR_ENABLE__SHIFT 0x2 3352fb57e7SAlex Deucher #define MC_CONFIG__MCDZ_WR_ENABLE_MASK 0x8 3452fb57e7SAlex Deucher #define MC_CONFIG__MCDZ_WR_ENABLE__SHIFT 0x3 3552fb57e7SAlex Deucher #define MC_CONFIG__MC_RD_ENABLE_MASK 0x30 3652fb57e7SAlex Deucher #define MC_CONFIG__MC_RD_ENABLE__SHIFT 0x4 3752fb57e7SAlex Deucher #define MC_CONFIG__MCC_INDEX_MODE_ENABLE_MASK 0x80000000 3852fb57e7SAlex Deucher #define MC_CONFIG__MCC_INDEX_MODE_ENABLE__SHIFT 0x1f 3952fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP0_MASK 0x1 4052fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP0__SHIFT 0x0 4152fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP1_MASK 0x2 4252fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP1__SHIFT 0x1 4352fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP2_MASK 0x4 4452fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP2__SHIFT 0x2 4552fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP3_MASK 0x8 4652fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP3__SHIFT 0x3 4752fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP4_MASK 0x10 4852fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP4__SHIFT 0x4 4952fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP5_MASK 0x20 5052fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP5__SHIFT 0x5 5152fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP6_MASK 0x40 5252fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP6__SHIFT 0x6 5352fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP7_MASK 0x80 5452fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_RD_GROUP7__SHIFT 0x7 5552fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP0_MASK 0x100 5652fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP0__SHIFT 0x8 5752fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP1_MASK 0x200 5852fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP1__SHIFT 0x9 5952fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP2_MASK 0x400 6052fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP2__SHIFT 0xa 6152fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP3_MASK 0x800 6252fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP3__SHIFT 0xb 6352fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP4_MASK 0x1000 6452fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP4__SHIFT 0xc 6552fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP5_MASK 0x2000 6652fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP5__SHIFT 0xd 6752fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP6_MASK 0x4000 6852fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP6__SHIFT 0xe 6952fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP7_MASK 0x8000 7052fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__RESET_WR_GROUP7__SHIFT 0xf 7152fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__AGE_LOW_RATE_RD_MASK 0x70000 7252fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__AGE_LOW_RATE_RD__SHIFT 0x10 7352fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__AGE_LOW_RATE_WR_MASK 0x380000 7452fb57e7SAlex Deucher #define MC_ARB_AGE_CNTL__AGE_LOW_RATE_WR__SHIFT 0x13 7552fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS2__ACP_WR_MASK 0xff 7652fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS2__ACP_WR__SHIFT 0x0 7752fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__MODE_MASK 0x3 7852fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__MODE__SHIFT 0x0 7952fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__WR_ERR_MASK 0xc 8052fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__WR_ERR__SHIFT 0x2 8152fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__KEEP_POISON_IN_PAGE_MASK 0x10 8252fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__KEEP_POISON_IN_PAGE__SHIFT 0x4 8352fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__RDRET_PARITY_NACK_MASK 0x20 8452fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__RDRET_PARITY_NACK__SHIFT 0x5 8552fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__USE_LEGACY_NACK_MASK 0x40 8652fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__USE_LEGACY_NACK__SHIFT 0x6 8752fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__DEBUG_RSV_MASK 0xffffff80 8852fb57e7SAlex Deucher #define MC_ARB_FED_CNTL__DEBUG_RSV__SHIFT 0x7 8952fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__CORR_STS0_MASK 0x1 9052fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT 0x0 9152fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__UNCORR_STS0_MASK 0x2 9252fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__UNCORR_STS0__SHIFT 0x1 9352fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__FED_STS0_MASK 0x4 9452fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__FED_STS0__SHIFT 0x2 9552fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD0_MASK 0x8 9652fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD0__SHIFT 0x3 9752fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__CORR_STS1_MASK 0x10 9852fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT 0x4 9952fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__UNCORR_STS1_MASK 0x20 10052fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__UNCORR_STS1__SHIFT 0x5 10152fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__FED_STS1_MASK 0x40 10252fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__FED_STS1__SHIFT 0x6 10352fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD1_MASK 0x80 10452fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD1__SHIFT 0x7 10552fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__CORR_CLEAR0_MASK 0x100 10652fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__CORR_CLEAR0__SHIFT 0x8 10752fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__UNCORR_CLEAR0_MASK 0x200 10852fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__UNCORR_CLEAR0__SHIFT 0x9 10952fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__FED_CLEAR0_MASK 0x400 11052fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__FED_CLEAR0__SHIFT 0xa 11152fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD2_MASK 0x800 11252fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD2__SHIFT 0xb 11352fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__CORR_CLEAR1_MASK 0x1000 11452fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__CORR_CLEAR1__SHIFT 0xc 11552fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__UNCORR_CLEAR1_MASK 0x2000 11652fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__UNCORR_CLEAR1__SHIFT 0xd 11752fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__FED_CLEAR1_MASK 0x4000 11852fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__FED_CLEAR1__SHIFT 0xe 11952fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD3_MASK 0x8000 12052fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD3__SHIFT 0xf 12152fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_CORR_STS0_MASK 0x10000 12252fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_CORR_STS0__SHIFT 0x10 12352fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_UNCORR_STS0_MASK 0x20000 12452fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_UNCORR_STS0__SHIFT 0x11 12552fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD4_MASK 0xc0000 12652fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD4__SHIFT 0x12 12752fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_CORR_STS1_MASK 0x100000 12852fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_CORR_STS1__SHIFT 0x14 12952fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_UNCORR_STS1_MASK 0x200000 13052fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_UNCORR_STS1__SHIFT 0x15 13152fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD5_MASK 0xc00000 13252fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD5__SHIFT 0x16 13352fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_CORR_CLEAR0_MASK 0x1000000 13452fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_CORR_CLEAR0__SHIFT 0x18 13552fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_UNCORR_CLEAR0_MASK 0x2000000 13652fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_UNCORR_CLEAR0__SHIFT 0x19 13752fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD6_MASK 0xc000000 13852fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RSVD6__SHIFT 0x1a 13952fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_CORR_CLEAR1_MASK 0x10000000 14052fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_CORR_CLEAR1__SHIFT 0x1c 14152fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_UNCORR_CLEAR1_MASK 0x20000000 14252fb57e7SAlex Deucher #define MC_ARB_GECC2_STATUS__RMWRD_UNCORR_CLEAR1__SHIFT 0x1d 14352fb57e7SAlex Deucher #define MC_ARB_GECC2_MISC__STREAK_BREAK_MASK 0xf 14452fb57e7SAlex Deucher #define MC_ARB_GECC2_MISC__STREAK_BREAK__SHIFT 0x0 14552fb57e7SAlex Deucher #define MC_ARB_GECC2_MISC__COL10_HACK_MASK 0x10 14652fb57e7SAlex Deucher #define MC_ARB_GECC2_MISC__COL10_HACK__SHIFT 0x4 14752fb57e7SAlex Deucher #define MC_ARB_GECC2_MISC__CWRD_IN_REPLAY_MASK 0x20 14852fb57e7SAlex Deucher #define MC_ARB_GECC2_MISC__CWRD_IN_REPLAY__SHIFT 0x5 14952fb57e7SAlex Deucher #define MC_ARB_GECC2_MISC__NO_EOB_ALL_WR_IN_REPLAY_MASK 0x40 15052fb57e7SAlex Deucher #define MC_ARB_GECC2_MISC__NO_EOB_ALL_WR_IN_REPLAY__SHIFT 0x6 15152fb57e7SAlex Deucher #define MC_ARB_GECC2_MISC__DEBUG_RSV_MASK 0xffffff80 15252fb57e7SAlex Deucher #define MC_ARB_GECC2_MISC__DEBUG_RSV__SHIFT 0x7 15352fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG__NUM_ERR_BITS_MASK 0x3 15452fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG__NUM_ERR_BITS__SHIFT 0x0 15552fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG__DIRECTION_MASK 0x4 15652fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG__DIRECTION__SHIFT 0x2 15752fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG__DATA_FIELD_MASK 0x18 15852fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG__DATA_FIELD__SHIFT 0x3 15952fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG__SW_INJECTION_MASK 0x20 16052fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG__SW_INJECTION__SHIFT 0x5 16152fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG2__PERIOD_MASK 0xff 16252fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG2__PERIOD__SHIFT 0x0 16352fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG2__ERR0_START_MASK 0xff00 16452fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG2__ERR0_START__SHIFT 0x8 16552fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG2__ERR1_START_MASK 0xff0000 16652fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG2__ERR1_START__SHIFT 0x10 16752fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG2__ERR2_START_MASK 0xff000000 16852fb57e7SAlex Deucher #define MC_ARB_GECC2_DEBUG2__ERR2_START__SHIFT 0x18 16952fb57e7SAlex Deucher #define MC_ARB_GECC2__ENABLE_MASK 0x1 17052fb57e7SAlex Deucher #define MC_ARB_GECC2__ENABLE__SHIFT 0x0 17152fb57e7SAlex Deucher #define MC_ARB_GECC2__ECC_MODE_MASK 0x6 17252fb57e7SAlex Deucher #define MC_ARB_GECC2__ECC_MODE__SHIFT 0x1 17352fb57e7SAlex Deucher #define MC_ARB_GECC2__PAGE_BIT0_MASK 0x18 17452fb57e7SAlex Deucher #define MC_ARB_GECC2__PAGE_BIT0__SHIFT 0x3 17552fb57e7SAlex Deucher #define MC_ARB_GECC2__EXOR_BANK_SEL_MASK 0x60 17652fb57e7SAlex Deucher #define MC_ARB_GECC2__EXOR_BANK_SEL__SHIFT 0x5 17752fb57e7SAlex Deucher #define MC_ARB_GECC2__NO_GECC_CLI_MASK 0x780 17852fb57e7SAlex Deucher #define MC_ARB_GECC2__NO_GECC_CLI__SHIFT 0x7 17952fb57e7SAlex Deucher #define MC_ARB_GECC2__READ_ERR_MASK 0x3800 18052fb57e7SAlex Deucher #define MC_ARB_GECC2__READ_ERR__SHIFT 0xb 18152fb57e7SAlex Deucher #define MC_ARB_GECC2__CLOSE_BANK_RMW_MASK 0x4000 18252fb57e7SAlex Deucher #define MC_ARB_GECC2__CLOSE_BANK_RMW__SHIFT 0xe 18352fb57e7SAlex Deucher #define MC_ARB_GECC2__COLFIFO_WATER_MASK 0x1f8000 18452fb57e7SAlex Deucher #define MC_ARB_GECC2__COLFIFO_WATER__SHIFT 0xf 18552fb57e7SAlex Deucher #define MC_ARB_GECC2__WRADDR_CONV_MASK 0x200000 18652fb57e7SAlex Deucher #define MC_ARB_GECC2__WRADDR_CONV__SHIFT 0x15 18752fb57e7SAlex Deucher #define MC_ARB_GECC2__RMWRD_UNCOR_POISON_MASK 0x400000 18852fb57e7SAlex Deucher #define MC_ARB_GECC2__RMWRD_UNCOR_POISON__SHIFT 0x16 18952fb57e7SAlex Deucher #define MC_ARB_GECC2_CLI__NO_GECC_CLI0_MASK 0xff 19052fb57e7SAlex Deucher #define MC_ARB_GECC2_CLI__NO_GECC_CLI0__SHIFT 0x0 19152fb57e7SAlex Deucher #define MC_ARB_GECC2_CLI__NO_GECC_CLI1_MASK 0xff00 19252fb57e7SAlex Deucher #define MC_ARB_GECC2_CLI__NO_GECC_CLI1__SHIFT 0x8 19352fb57e7SAlex Deucher #define MC_ARB_GECC2_CLI__NO_GECC_CLI2_MASK 0xff0000 19452fb57e7SAlex Deucher #define MC_ARB_GECC2_CLI__NO_GECC_CLI2__SHIFT 0x10 19552fb57e7SAlex Deucher #define MC_ARB_GECC2_CLI__NO_GECC_CLI3_MASK 0xff000000 19652fb57e7SAlex Deucher #define MC_ARB_GECC2_CLI__NO_GECC_CLI3__SHIFT 0x18 19752fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A8_MASK 0xf 19852fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A8__SHIFT 0x0 19952fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A9_MASK 0xf0 20052fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A9__SHIFT 0x4 20152fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A10_MASK 0xf00 20252fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A10__SHIFT 0x8 20352fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A11_MASK 0xf000 20452fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A11__SHIFT 0xc 20552fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A12_MASK 0xf0000 20652fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A12__SHIFT 0x10 20752fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A13_MASK 0xf00000 20852fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A13__SHIFT 0x14 20952fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A14_MASK 0xf000000 21052fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A14__SHIFT 0x18 21152fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A15_MASK 0xf0000000 21252fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ0__A15__SHIFT 0x1c 21352fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ1__A16_MASK 0xf 21452fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ1__A16__SHIFT 0x0 21552fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ1__A17_MASK 0xf0 21652fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ1__A17__SHIFT 0x4 21752fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ1__A18_MASK 0xf00 21852fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ1__A18__SHIFT 0x8 21952fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ1__A19_MASK 0xf000 22052fb57e7SAlex Deucher #define MC_ARB_ADDR_SWIZ1__A19__SHIFT 0xc 22152fb57e7SAlex Deucher #define MC_ARB_MISC3__NO_GECC_EXT_EOB_MASK 0x1 22252fb57e7SAlex Deucher #define MC_ARB_MISC3__NO_GECC_EXT_EOB__SHIFT 0x0 22352fb57e7SAlex Deucher #define MC_ARB_MISC3__TBD_FIELD_MASK 0xfffffffe 22452fb57e7SAlex Deucher #define MC_ARB_MISC3__TBD_FIELD__SHIFT 0x1 22552fb57e7SAlex Deucher #define MC_ARB_WCDR_2__WPRE_INC_STEP_MASK 0xf 22652fb57e7SAlex Deucher #define MC_ARB_WCDR_2__WPRE_INC_STEP__SHIFT 0x0 22752fb57e7SAlex Deucher #define MC_ARB_WCDR_2__WPRE_MIN_THRESHOLD_MASK 0x1f0 22852fb57e7SAlex Deucher #define MC_ARB_WCDR_2__WPRE_MIN_THRESHOLD__SHIFT 0x4 22952fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_0_MASK 0x200 23052fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_0__SHIFT 0x9 23152fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_1_MASK 0x400 23252fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_1__SHIFT 0xa 23352fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_2_MASK 0x800 23452fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_2__SHIFT 0xb 23552fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_3_MASK 0x1000 23652fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_3__SHIFT 0xc 23752fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_4_MASK 0x2000 23852fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_4__SHIFT 0xd 23952fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_5_MASK 0x4000 24052fb57e7SAlex Deucher #define MC_ARB_WCDR_2__DEBUG_5__SHIFT 0xe 24152fb57e7SAlex Deucher #define MC_ARB_RTT_DATA__PATTERN_MASK 0xff 24252fb57e7SAlex Deucher #define MC_ARB_RTT_DATA__PATTERN__SHIFT 0x0 24352fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__ENABLE_MASK 0x1 24452fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__ENABLE__SHIFT 0x0 24552fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__START_IDLE_MASK 0x2 24652fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__START_IDLE__SHIFT 0x1 24752fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__START_R2W_MASK 0xc 24852fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__START_R2W__SHIFT 0x2 24952fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__FLUSH_ON_ENTER_MASK 0x10 25052fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__FLUSH_ON_ENTER__SHIFT 0x4 25152fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__HARSH_START_MASK 0x20 25252fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__HARSH_START__SHIFT 0x5 25352fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__TPS_HARSH_PRIORITY_MASK 0x40 25452fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__TPS_HARSH_PRIORITY__SHIFT 0x6 25552fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__TWRT_HARSH_PRIORITY_MASK 0x80 25652fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__TWRT_HARSH_PRIORITY__SHIFT 0x7 25752fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__BREAK_ON_HARSH_MASK 0x100 25852fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__BREAK_ON_HARSH__SHIFT 0x8 25952fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__BREAK_ON_URGENTRD_MASK 0x200 26052fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__BREAK_ON_URGENTRD__SHIFT 0x9 26152fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__BREAK_ON_URGENTWR_MASK 0x400 26252fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__BREAK_ON_URGENTWR__SHIFT 0xa 26352fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__TRAIN_PERIOD_MASK 0x3800 26452fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__TRAIN_PERIOD__SHIFT 0xb 26552fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__START_R2W_RFSH_MASK 0x4000 26652fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__START_R2W_RFSH__SHIFT 0xe 26752fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_0_MASK 0x8000 26852fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_0__SHIFT 0xf 26952fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_1_MASK 0x10000 27052fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_1__SHIFT 0x10 27152fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_2_MASK 0x20000 27252fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_2__SHIFT 0x11 27352fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_3_MASK 0x40000 27452fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_3__SHIFT 0x12 27552fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_4_MASK 0x80000 27652fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_4__SHIFT 0x13 27752fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_5_MASK 0x100000 27852fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_5__SHIFT 0x14 27952fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_6_MASK 0x200000 28052fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_6__SHIFT 0x15 28152fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_7_MASK 0x400000 28252fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_7__SHIFT 0x16 28352fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_8_MASK 0x800000 28452fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DEBUG_RSV_8__SHIFT 0x17 28552fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DATA_CNTL_MASK 0x1000000 28652fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__DATA_CNTL__SHIFT 0x18 28752fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__NEIGHBOR_BIT_MASK 0x2000000 28852fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL0__NEIGHBOR_BIT__SHIFT 0x19 28952fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_SIZE_MASK 0x1f 29052fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_SIZE__SHIFT 0x0 29152fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_UPDATE_MASK 0x20 29252fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_UPDATE__SHIFT 0x5 29352fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_INC_THRESHOLD_MASK 0x1fc0 29452fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_INC_THRESHOLD__SHIFT 0x6 29552fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_DEC_THRESHOLD_MASK 0xfe000 29652fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_DEC_THRESHOLD__SHIFT 0xd 29752fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_SIZE_MAX_MASK 0x1f00000 29852fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_SIZE_MAX__SHIFT 0x14 29952fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_SIZE_MIN_MASK 0x3e000000 30052fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_SIZE_MIN__SHIFT 0x19 30152fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_UPDATE_COUNT_MASK 0xc0000000 30252fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL1__WINDOW_UPDATE_COUNT__SHIFT 0x1e 30352fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL2__SAMPLE_CNT_MASK 0x3f 30452fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL2__SAMPLE_CNT__SHIFT 0x0 30552fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL2__PHASE_ADJUST_THRESHOLD_MASK 0xfc0 30652fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL2__PHASE_ADJUST_THRESHOLD__SHIFT 0x6 30752fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL2__PHASE_ADJUST_SIZE_MASK 0x1000 30852fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL2__PHASE_ADJUST_SIZE__SHIFT 0xc 30952fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL2__FILTER_CNTL_MASK 0x2000 31052fb57e7SAlex Deucher #define MC_ARB_RTT_CNTL2__FILTER_CNTL__SHIFT 0xd 31152fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__DEBUG_BYTE_CH0_MASK 0x3 31252fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__DEBUG_BYTE_CH0__SHIFT 0x0 31352fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__DEBUG_BYTE_CH1_MASK 0xc 31452fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__DEBUG_BYTE_CH1__SHIFT 0x2 31552fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__SHIFTED_PHASE_CH0_MASK 0xff0 31652fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__SHIFTED_PHASE_CH0__SHIFT 0x4 31752fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__WINDOW_SIZE_CH0_MASK 0x1f000 31852fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__WINDOW_SIZE_CH0__SHIFT 0xc 31952fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__SHIFTED_PHASE_CH1_MASK 0x1fe0000 32052fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__SHIFTED_PHASE_CH1__SHIFT 0x11 32152fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__WINDOW_SIZE_CH1_MASK 0x3e000000 32252fb57e7SAlex Deucher #define MC_ARB_RTT_DEBUG__WINDOW_SIZE_CH1__SHIFT 0x19 32352fb57e7SAlex Deucher #define MC_ARB_CAC_CNTL__ENABLE_MASK 0x1 32452fb57e7SAlex Deucher #define MC_ARB_CAC_CNTL__ENABLE__SHIFT 0x0 32552fb57e7SAlex Deucher #define MC_ARB_CAC_CNTL__READ_WEIGHT_MASK 0x7e 32652fb57e7SAlex Deucher #define MC_ARB_CAC_CNTL__READ_WEIGHT__SHIFT 0x1 32752fb57e7SAlex Deucher #define MC_ARB_CAC_CNTL__WRITE_WEIGHT_MASK 0x1f80 32852fb57e7SAlex Deucher #define MC_ARB_CAC_CNTL__WRITE_WEIGHT__SHIFT 0x7 32952fb57e7SAlex Deucher #define MC_ARB_CAC_CNTL__ALLOW_OVERFLOW_MASK 0x2000 33052fb57e7SAlex Deucher #define MC_ARB_CAC_CNTL__ALLOW_OVERFLOW__SHIFT 0xd 33152fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_ENABLE_MASK 0x20 33252fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_ENABLE__SHIFT 0x5 33352fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_COLBIT4_MASK 0x40 33452fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_COLBIT4__SHIFT 0x6 33552fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_COLBIT5_MASK 0x80 33652fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_COLBIT5__SHIFT 0x7 33752fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_COLBIT6_MASK 0x100 33852fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_COLBIT6__SHIFT 0x8 33952fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_COLBIT7_MASK 0x200 34052fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_COLBIT7__SHIFT 0x9 34152fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_COLBIT8_MASK 0x400 34252fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_BANKBIT3_XOR_COLBIT8__SHIFT 0xa 34352fb57e7SAlex Deucher #define MC_ARB_MISC2__POP_IDLE_REPLAY_MASK 0x800 34452fb57e7SAlex Deucher #define MC_ARB_MISC2__POP_IDLE_REPLAY__SHIFT 0xb 34552fb57e7SAlex Deucher #define MC_ARB_MISC2__RDRET_NO_REORDERING_MASK 0x1000 34652fb57e7SAlex Deucher #define MC_ARB_MISC2__RDRET_NO_REORDERING__SHIFT 0xc 34752fb57e7SAlex Deucher #define MC_ARB_MISC2__RDRET_NO_BP_MASK 0x2000 34852fb57e7SAlex Deucher #define MC_ARB_MISC2__RDRET_NO_BP__SHIFT 0xd 34952fb57e7SAlex Deucher #define MC_ARB_MISC2__RDRET_SEQ_SKID_MASK 0x3c000 35052fb57e7SAlex Deucher #define MC_ARB_MISC2__RDRET_SEQ_SKID__SHIFT 0xe 35152fb57e7SAlex Deucher #define MC_ARB_MISC2__GECC_MASK 0x40000 35252fb57e7SAlex Deucher #define MC_ARB_MISC2__GECC__SHIFT 0x12 35352fb57e7SAlex Deucher #define MC_ARB_MISC2__GECC_RST_MASK 0x80000 35452fb57e7SAlex Deucher #define MC_ARB_MISC2__GECC_RST__SHIFT 0x13 35552fb57e7SAlex Deucher #define MC_ARB_MISC2__GECC_STATUS_MASK 0x100000 35652fb57e7SAlex Deucher #define MC_ARB_MISC2__GECC_STATUS__SHIFT 0x14 35752fb57e7SAlex Deucher #define MC_ARB_MISC2__TAGFIFO_THRESHOLD_MASK 0x1e00000 35852fb57e7SAlex Deucher #define MC_ARB_MISC2__TAGFIFO_THRESHOLD__SHIFT 0x15 35952fb57e7SAlex Deucher #define MC_ARB_MISC2__WCDR_REPLAY_MASKCNT_MASK 0xe000000 36052fb57e7SAlex Deucher #define MC_ARB_MISC2__WCDR_REPLAY_MASKCNT__SHIFT 0x19 36152fb57e7SAlex Deucher #define MC_ARB_MISC2__REPLAY_DEBUG_MASK 0x10000000 36252fb57e7SAlex Deucher #define MC_ARB_MISC2__REPLAY_DEBUG__SHIFT 0x1c 36352fb57e7SAlex Deucher #define MC_ARB_MISC2__ARB_DEBUG29_MASK 0x20000000 36452fb57e7SAlex Deucher #define MC_ARB_MISC2__ARB_DEBUG29__SHIFT 0x1d 36552fb57e7SAlex Deucher #define MC_ARB_MISC2__SEQ_RDY_POP_IDLE_MASK 0x40000000 36652fb57e7SAlex Deucher #define MC_ARB_MISC2__SEQ_RDY_POP_IDLE__SHIFT 0x1e 36752fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_REPLAY_EOB_MASK 0x80000000 36852fb57e7SAlex Deucher #define MC_ARB_MISC2__TCCDL4_REPLAY_EOB__SHIFT 0x1f 36952fb57e7SAlex Deucher #define MC_ARB_MISC__STICKY_RFSH_MASK 0x1 37052fb57e7SAlex Deucher #define MC_ARB_MISC__STICKY_RFSH__SHIFT 0x0 37152fb57e7SAlex Deucher #define MC_ARB_MISC__IDLE_RFSH_MASK 0x2 37252fb57e7SAlex Deucher #define MC_ARB_MISC__IDLE_RFSH__SHIFT 0x1 37352fb57e7SAlex Deucher #define MC_ARB_MISC__STUTTER_RFSH_MASK 0x4 37452fb57e7SAlex Deucher #define MC_ARB_MISC__STUTTER_RFSH__SHIFT 0x2 37552fb57e7SAlex Deucher #define MC_ARB_MISC__CHAN_COUPLE_MASK 0x7f8 37652fb57e7SAlex Deucher #define MC_ARB_MISC__CHAN_COUPLE__SHIFT 0x3 37752fb57e7SAlex Deucher #define MC_ARB_MISC__HARSHNESS_MASK 0x7f800 37852fb57e7SAlex Deucher #define MC_ARB_MISC__HARSHNESS__SHIFT 0xb 37952fb57e7SAlex Deucher #define MC_ARB_MISC__SMART_RDWR_SW_MASK 0x80000 38052fb57e7SAlex Deucher #define MC_ARB_MISC__SMART_RDWR_SW__SHIFT 0x13 38152fb57e7SAlex Deucher #define MC_ARB_MISC__CALI_ENABLE_MASK 0x100000 38252fb57e7SAlex Deucher #define MC_ARB_MISC__CALI_ENABLE__SHIFT 0x14 38352fb57e7SAlex Deucher #define MC_ARB_MISC__CALI_RATES_MASK 0x600000 38452fb57e7SAlex Deucher #define MC_ARB_MISC__CALI_RATES__SHIFT 0x15 38552fb57e7SAlex Deucher #define MC_ARB_MISC__DISPURGVLD_NOWRT_MASK 0x800000 38652fb57e7SAlex Deucher #define MC_ARB_MISC__DISPURGVLD_NOWRT__SHIFT 0x17 38752fb57e7SAlex Deucher #define MC_ARB_MISC__DISPURG_NOSW2WR_MASK 0x1000000 38852fb57e7SAlex Deucher #define MC_ARB_MISC__DISPURG_NOSW2WR__SHIFT 0x18 38952fb57e7SAlex Deucher #define MC_ARB_MISC__DISPURG_STALL_MASK 0x2000000 39052fb57e7SAlex Deucher #define MC_ARB_MISC__DISPURG_STALL__SHIFT 0x19 39152fb57e7SAlex Deucher #define MC_ARB_MISC__DISPURG_THROTTLE_MASK 0x3c000000 39252fb57e7SAlex Deucher #define MC_ARB_MISC__DISPURG_THROTTLE__SHIFT 0x1a 39352fb57e7SAlex Deucher #define MC_ARB_MISC__EXTEND_WEIGHT_MASK 0x40000000 39452fb57e7SAlex Deucher #define MC_ARB_MISC__EXTEND_WEIGHT__SHIFT 0x1e 39552fb57e7SAlex Deucher #define MC_ARB_MISC__ACPURG_STALL_MASK 0x80000000 39652fb57e7SAlex Deucher #define MC_ARB_MISC__ACPURG_STALL__SHIFT 0x1f 39752fb57e7SAlex Deucher #define MC_ARB_BANKMAP__BANK0_MASK 0xf 39852fb57e7SAlex Deucher #define MC_ARB_BANKMAP__BANK0__SHIFT 0x0 39952fb57e7SAlex Deucher #define MC_ARB_BANKMAP__BANK1_MASK 0xf0 40052fb57e7SAlex Deucher #define MC_ARB_BANKMAP__BANK1__SHIFT 0x4 40152fb57e7SAlex Deucher #define MC_ARB_BANKMAP__BANK2_MASK 0xf00 40252fb57e7SAlex Deucher #define MC_ARB_BANKMAP__BANK2__SHIFT 0x8 40352fb57e7SAlex Deucher #define MC_ARB_BANKMAP__BANK3_MASK 0xf000 40452fb57e7SAlex Deucher #define MC_ARB_BANKMAP__BANK3__SHIFT 0xc 40552fb57e7SAlex Deucher #define MC_ARB_BANKMAP__RANK_MASK 0xf0000 40652fb57e7SAlex Deucher #define MC_ARB_BANKMAP__RANK__SHIFT 0x10 40752fb57e7SAlex Deucher #define MC_ARB_RAMCFG__NOOFBANK_MASK 0x3 40852fb57e7SAlex Deucher #define MC_ARB_RAMCFG__NOOFBANK__SHIFT 0x0 40952fb57e7SAlex Deucher #define MC_ARB_RAMCFG__NOOFRANKS_MASK 0x4 41052fb57e7SAlex Deucher #define MC_ARB_RAMCFG__NOOFRANKS__SHIFT 0x2 41152fb57e7SAlex Deucher #define MC_ARB_RAMCFG__NOOFROWS_MASK 0x38 41252fb57e7SAlex Deucher #define MC_ARB_RAMCFG__NOOFROWS__SHIFT 0x3 41352fb57e7SAlex Deucher #define MC_ARB_RAMCFG__NOOFCOLS_MASK 0xc0 41452fb57e7SAlex Deucher #define MC_ARB_RAMCFG__NOOFCOLS__SHIFT 0x6 41552fb57e7SAlex Deucher #define MC_ARB_RAMCFG__CHANSIZE_MASK 0x100 41652fb57e7SAlex Deucher #define MC_ARB_RAMCFG__CHANSIZE__SHIFT 0x8 41752fb57e7SAlex Deucher #define MC_ARB_RAMCFG__RSV_1_MASK 0x200 41852fb57e7SAlex Deucher #define MC_ARB_RAMCFG__RSV_1__SHIFT 0x9 41952fb57e7SAlex Deucher #define MC_ARB_RAMCFG__RSV_2_MASK 0x400 42052fb57e7SAlex Deucher #define MC_ARB_RAMCFG__RSV_2__SHIFT 0xa 42152fb57e7SAlex Deucher #define MC_ARB_RAMCFG__RSV_3_MASK 0x800 42252fb57e7SAlex Deucher #define MC_ARB_RAMCFG__RSV_3__SHIFT 0xb 42352fb57e7SAlex Deucher #define MC_ARB_RAMCFG__NOOFGROUPS_MASK 0x1000 42452fb57e7SAlex Deucher #define MC_ARB_RAMCFG__NOOFGROUPS__SHIFT 0xc 42552fb57e7SAlex Deucher #define MC_ARB_RAMCFG__RSV_4_MASK 0x3e000 42652fb57e7SAlex Deucher #define MC_ARB_RAMCFG__RSV_4__SHIFT 0xd 42752fb57e7SAlex Deucher #define MC_ARB_POP__ENABLE_ARB_MASK 0x1 42852fb57e7SAlex Deucher #define MC_ARB_POP__ENABLE_ARB__SHIFT 0x0 42952fb57e7SAlex Deucher #define MC_ARB_POP__SPEC_OPEN_MASK 0x2 43052fb57e7SAlex Deucher #define MC_ARB_POP__SPEC_OPEN__SHIFT 0x1 43152fb57e7SAlex Deucher #define MC_ARB_POP__POP_DEPTH_MASK 0x3c 43252fb57e7SAlex Deucher #define MC_ARB_POP__POP_DEPTH__SHIFT 0x2 43352fb57e7SAlex Deucher #define MC_ARB_POP__WRDATAINDEX_DEPTH_MASK 0xfc0 43452fb57e7SAlex Deucher #define MC_ARB_POP__WRDATAINDEX_DEPTH__SHIFT 0x6 43552fb57e7SAlex Deucher #define MC_ARB_POP__SKID_DEPTH_MASK 0x7000 43652fb57e7SAlex Deucher #define MC_ARB_POP__SKID_DEPTH__SHIFT 0xc 43752fb57e7SAlex Deucher #define MC_ARB_POP__WAIT_AFTER_RFSH_MASK 0x18000 43852fb57e7SAlex Deucher #define MC_ARB_POP__WAIT_AFTER_RFSH__SHIFT 0xf 43952fb57e7SAlex Deucher #define MC_ARB_POP__QUICK_STOP_MASK 0x20000 44052fb57e7SAlex Deucher #define MC_ARB_POP__QUICK_STOP__SHIFT 0x11 44152fb57e7SAlex Deucher #define MC_ARB_POP__ENABLE_TWO_PAGE_MASK 0x40000 44252fb57e7SAlex Deucher #define MC_ARB_POP__ENABLE_TWO_PAGE__SHIFT 0x12 44352fb57e7SAlex Deucher #define MC_ARB_POP__ALLOW_EOB_BY_WRRET_STALL_MASK 0x80000 44452fb57e7SAlex Deucher #define MC_ARB_POP__ALLOW_EOB_BY_WRRET_STALL__SHIFT 0x13 44552fb57e7SAlex Deucher #define MC_ARB_MINCLKS__READ_CLKS_MASK 0xff 44652fb57e7SAlex Deucher #define MC_ARB_MINCLKS__READ_CLKS__SHIFT 0x0 44752fb57e7SAlex Deucher #define MC_ARB_MINCLKS__WRITE_CLKS_MASK 0xff00 44852fb57e7SAlex Deucher #define MC_ARB_MINCLKS__WRITE_CLKS__SHIFT 0x8 44952fb57e7SAlex Deucher #define MC_ARB_MINCLKS__ARB_RW_SWITCH_MASK 0x10000 45052fb57e7SAlex Deucher #define MC_ARB_MINCLKS__ARB_RW_SWITCH__SHIFT 0x10 45152fb57e7SAlex Deucher #define MC_ARB_MINCLKS__RW_SWITCH_HARSH_MASK 0x60000 45252fb57e7SAlex Deucher #define MC_ARB_MINCLKS__RW_SWITCH_HARSH__SHIFT 0x11 45352fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__MIN_PENAL_MASK 0xff 45452fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__MIN_PENAL__SHIFT 0x0 45552fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__DYN_SQM_ENABLE_MASK 0x100 45652fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__DYN_SQM_ENABLE__SHIFT 0x8 45752fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__SQM_RDY16_MASK 0x200 45852fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__SQM_RDY16__SHIFT 0x9 45952fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__SQM_RESERVE_MASK 0xfc00 46052fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__SQM_RESERVE__SHIFT 0xa 46152fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__RATIO_MASK 0xff0000 46252fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__RATIO__SHIFT 0x10 46352fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__RATIO_DEBUG_MASK 0xff000000 46452fb57e7SAlex Deucher #define MC_ARB_SQM_CNTL__RATIO_DEBUG__SHIFT 0x18 46552fb57e7SAlex Deucher #define MC_ARB_ADDR_HASH__BANK_XOR_ENABLE_MASK 0xf 46652fb57e7SAlex Deucher #define MC_ARB_ADDR_HASH__BANK_XOR_ENABLE__SHIFT 0x0 46752fb57e7SAlex Deucher #define MC_ARB_ADDR_HASH__COL_XOR_MASK 0xff0 46852fb57e7SAlex Deucher #define MC_ARB_ADDR_HASH__COL_XOR__SHIFT 0x4 46952fb57e7SAlex Deucher #define MC_ARB_ADDR_HASH__ROW_XOR_MASK 0xffff000 47052fb57e7SAlex Deucher #define MC_ARB_ADDR_HASH__ROW_XOR__SHIFT 0xc 47152fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING__ACTRD_MASK 0xff 47252fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING__ACTRD__SHIFT 0x0 47352fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING__ACTWR_MASK 0xff00 47452fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING__ACTWR__SHIFT 0x8 47552fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING__RASMACTRD_MASK 0xff0000 47652fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING__RASMACTRD__SHIFT 0x10 47752fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING__RASMACTWR_MASK 0xff000000 47852fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING__RASMACTWR__SHIFT 0x18 47952fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2__RAS2RAS_MASK 0xff 48052fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2__RAS2RAS__SHIFT 0x0 48152fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2__RP_MASK 0xff00 48252fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2__RP__SHIFT 0x8 48352fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2__WRPLUSRP_MASK 0xff0000 48452fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2__WRPLUSRP__SHIFT 0x10 48552fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2__BUS_TURN_MASK 0x1f000000 48652fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2__BUS_TURN__SHIFT 0x18 48752fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__WTMODE_MASK 0x3 48852fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__WTMODE__SHIFT 0x0 48952fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__HARSH_PRI_MASK 0x4 49052fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__HARSH_PRI__SHIFT 0x2 49152fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP0_MASK 0x8 49252fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP0__SHIFT 0x3 49352fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP1_MASK 0x10 49452fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP1__SHIFT 0x4 49552fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP2_MASK 0x20 49652fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP2__SHIFT 0x5 49752fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP3_MASK 0x40 49852fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP3__SHIFT 0x6 49952fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP4_MASK 0x80 50052fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP4__SHIFT 0x7 50152fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP5_MASK 0x100 50252fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP5__SHIFT 0x8 50352fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP6_MASK 0x200 50452fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP6__SHIFT 0x9 50552fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP7_MASK 0x400 50652fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ALLOW_STUTTER_GRP7__SHIFT 0xa 50752fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ACP_HARSH_PRI_MASK 0x800 50852fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ACP_HARSH_PRI__SHIFT 0xb 50952fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ACP_OVER_DISP_MASK 0x1000 51052fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__ACP_OVER_DISP__SHIFT 0xc 51152fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__FORCE_ACP_URG_MASK 0x2000 51252fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_RD__FORCE_ACP_URG__SHIFT 0xd 51352fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__WTMODE_MASK 0x3 51452fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__WTMODE__SHIFT 0x0 51552fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__HARSH_PRI_MASK 0x4 51652fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__HARSH_PRI__SHIFT 0x2 51752fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP0_MASK 0x8 51852fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP0__SHIFT 0x3 51952fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP1_MASK 0x10 52052fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP1__SHIFT 0x4 52152fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP2_MASK 0x20 52252fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP2__SHIFT 0x5 52352fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP3_MASK 0x40 52452fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP3__SHIFT 0x6 52552fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP4_MASK 0x80 52652fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP4__SHIFT 0x7 52752fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP5_MASK 0x100 52852fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP5__SHIFT 0x8 52952fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP6_MASK 0x200 53052fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP6__SHIFT 0x9 53152fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP7_MASK 0x400 53252fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ALLOW_STUTTER_GRP7__SHIFT 0xa 53352fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ACP_HARSH_PRI_MASK 0x800 53452fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ACP_HARSH_PRI__SHIFT 0xb 53552fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ACP_OVER_DISP_MASK 0x1000 53652fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__ACP_OVER_DISP__SHIFT 0xc 53752fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__FORCE_ACP_URG_MASK 0x2000 53852fb57e7SAlex Deucher #define MC_ARB_WTM_CNTL_WR__FORCE_ACP_URG__SHIFT 0xd 53952fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP0_MASK 0x3 54052fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP0__SHIFT 0x0 54152fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP1_MASK 0xc 54252fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP1__SHIFT 0x2 54352fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP2_MASK 0x30 54452fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP2__SHIFT 0x4 54552fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP3_MASK 0xc0 54652fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP3__SHIFT 0x6 54752fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP4_MASK 0x300 54852fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP4__SHIFT 0x8 54952fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP5_MASK 0xc00 55052fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP5__SHIFT 0xa 55152fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP6_MASK 0x3000 55252fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP6__SHIFT 0xc 55352fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP7_MASK 0xc000 55452fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP7__SHIFT 0xe 55552fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP_EXT_MASK 0xff0000 55652fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_RD__GRP_EXT__SHIFT 0x10 55752fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP0_MASK 0x3 55852fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP0__SHIFT 0x0 55952fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP1_MASK 0xc 56052fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP1__SHIFT 0x2 56152fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP2_MASK 0x30 56252fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP2__SHIFT 0x4 56352fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP3_MASK 0xc0 56452fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP3__SHIFT 0x6 56552fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP4_MASK 0x300 56652fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP4__SHIFT 0x8 56752fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP5_MASK 0xc00 56852fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP5__SHIFT 0xa 56952fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP6_MASK 0x3000 57052fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP6__SHIFT 0xc 57152fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP7_MASK 0xc000 57252fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP7__SHIFT 0xe 57352fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP_EXT_MASK 0xff0000 57452fb57e7SAlex Deucher #define MC_ARB_WTM_GRPWT_WR__GRP_EXT__SHIFT 0x10 57552fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_RD__GROUPBY_RANK_MASK 0x1 57652fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_RD__GROUPBY_RANK__SHIFT 0x0 57752fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_RD__BANK_SELECT_MASK 0x6 57852fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_RD__BANK_SELECT__SHIFT 0x1 57952fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_RD__MATCH_RANK_MASK 0x8 58052fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_RD__MATCH_RANK__SHIFT 0x3 58152fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_RD__MATCH_BANK_MASK 0x10 58252fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_RD__MATCH_BANK__SHIFT 0x4 58352fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_WR__GROUPBY_RANK_MASK 0x1 58452fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_WR__GROUPBY_RANK__SHIFT 0x0 58552fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_WR__BANK_SELECT_MASK 0x6 58652fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_WR__BANK_SELECT__SHIFT 0x1 58752fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_WR__MATCH_RANK_MASK 0x8 58852fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_WR__MATCH_RANK__SHIFT 0x3 58952fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_WR__MATCH_BANK_MASK 0x10 59052fb57e7SAlex Deucher #define MC_ARB_TM_CNTL_WR__MATCH_BANK__SHIFT 0x4 59152fb57e7SAlex Deucher #define MC_ARB_LAZY0_RD__GROUP0_MASK 0xff 59252fb57e7SAlex Deucher #define MC_ARB_LAZY0_RD__GROUP0__SHIFT 0x0 59352fb57e7SAlex Deucher #define MC_ARB_LAZY0_RD__GROUP1_MASK 0xff00 59452fb57e7SAlex Deucher #define MC_ARB_LAZY0_RD__GROUP1__SHIFT 0x8 59552fb57e7SAlex Deucher #define MC_ARB_LAZY0_RD__GROUP2_MASK 0xff0000 59652fb57e7SAlex Deucher #define MC_ARB_LAZY0_RD__GROUP2__SHIFT 0x10 59752fb57e7SAlex Deucher #define MC_ARB_LAZY0_RD__GROUP3_MASK 0xff000000 59852fb57e7SAlex Deucher #define MC_ARB_LAZY0_RD__GROUP3__SHIFT 0x18 59952fb57e7SAlex Deucher #define MC_ARB_LAZY0_WR__GROUP0_MASK 0xff 60052fb57e7SAlex Deucher #define MC_ARB_LAZY0_WR__GROUP0__SHIFT 0x0 60152fb57e7SAlex Deucher #define MC_ARB_LAZY0_WR__GROUP1_MASK 0xff00 60252fb57e7SAlex Deucher #define MC_ARB_LAZY0_WR__GROUP1__SHIFT 0x8 60352fb57e7SAlex Deucher #define MC_ARB_LAZY0_WR__GROUP2_MASK 0xff0000 60452fb57e7SAlex Deucher #define MC_ARB_LAZY0_WR__GROUP2__SHIFT 0x10 60552fb57e7SAlex Deucher #define MC_ARB_LAZY0_WR__GROUP3_MASK 0xff000000 60652fb57e7SAlex Deucher #define MC_ARB_LAZY0_WR__GROUP3__SHIFT 0x18 60752fb57e7SAlex Deucher #define MC_ARB_LAZY1_RD__GROUP4_MASK 0xff 60852fb57e7SAlex Deucher #define MC_ARB_LAZY1_RD__GROUP4__SHIFT 0x0 60952fb57e7SAlex Deucher #define MC_ARB_LAZY1_RD__GROUP5_MASK 0xff00 61052fb57e7SAlex Deucher #define MC_ARB_LAZY1_RD__GROUP5__SHIFT 0x8 61152fb57e7SAlex Deucher #define MC_ARB_LAZY1_RD__GROUP6_MASK 0xff0000 61252fb57e7SAlex Deucher #define MC_ARB_LAZY1_RD__GROUP6__SHIFT 0x10 61352fb57e7SAlex Deucher #define MC_ARB_LAZY1_RD__GROUP7_MASK 0xff000000 61452fb57e7SAlex Deucher #define MC_ARB_LAZY1_RD__GROUP7__SHIFT 0x18 61552fb57e7SAlex Deucher #define MC_ARB_LAZY1_WR__GROUP4_MASK 0xff 61652fb57e7SAlex Deucher #define MC_ARB_LAZY1_WR__GROUP4__SHIFT 0x0 61752fb57e7SAlex Deucher #define MC_ARB_LAZY1_WR__GROUP5_MASK 0xff00 61852fb57e7SAlex Deucher #define MC_ARB_LAZY1_WR__GROUP5__SHIFT 0x8 61952fb57e7SAlex Deucher #define MC_ARB_LAZY1_WR__GROUP6_MASK 0xff0000 62052fb57e7SAlex Deucher #define MC_ARB_LAZY1_WR__GROUP6__SHIFT 0x10 62152fb57e7SAlex Deucher #define MC_ARB_LAZY1_WR__GROUP7_MASK 0xff000000 62252fb57e7SAlex Deucher #define MC_ARB_LAZY1_WR__GROUP7__SHIFT 0x18 62352fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP0_MASK 0x3 62452fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP0__SHIFT 0x0 62552fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP1_MASK 0xc 62652fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP1__SHIFT 0x2 62752fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP2_MASK 0x30 62852fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP2__SHIFT 0x4 62952fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP3_MASK 0xc0 63052fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP3__SHIFT 0x6 63152fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP4_MASK 0x300 63252fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP4__SHIFT 0x8 63352fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP5_MASK 0xc00 63452fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP5__SHIFT 0xa 63552fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP6_MASK 0x3000 63652fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP6__SHIFT 0xc 63752fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP7_MASK 0xc000 63852fb57e7SAlex Deucher #define MC_ARB_AGE_RD__RATE_GROUP7__SHIFT 0xe 63952fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP0_MASK 0x10000 64052fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP0__SHIFT 0x10 64152fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP1_MASK 0x20000 64252fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP1__SHIFT 0x11 64352fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP2_MASK 0x40000 64452fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP2__SHIFT 0x12 64552fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP3_MASK 0x80000 64652fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP3__SHIFT 0x13 64752fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP4_MASK 0x100000 64852fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP4__SHIFT 0x14 64952fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP5_MASK 0x200000 65052fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP5__SHIFT 0x15 65152fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP6_MASK 0x400000 65252fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP6__SHIFT 0x16 65352fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP7_MASK 0x800000 65452fb57e7SAlex Deucher #define MC_ARB_AGE_RD__ENABLE_GROUP7__SHIFT 0x17 65552fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP0_MASK 0x1000000 65652fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP0__SHIFT 0x18 65752fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP1_MASK 0x2000000 65852fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP1__SHIFT 0x19 65952fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP2_MASK 0x4000000 66052fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP2__SHIFT 0x1a 66152fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP3_MASK 0x8000000 66252fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP3__SHIFT 0x1b 66352fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP4_MASK 0x10000000 66452fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP4__SHIFT 0x1c 66552fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP5_MASK 0x20000000 66652fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP5__SHIFT 0x1d 66752fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP6_MASK 0x40000000 66852fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP6__SHIFT 0x1e 66952fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP7_MASK 0x80000000 67052fb57e7SAlex Deucher #define MC_ARB_AGE_RD__DIVIDE_GROUP7__SHIFT 0x1f 67152fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP0_MASK 0x3 67252fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP0__SHIFT 0x0 67352fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP1_MASK 0xc 67452fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP1__SHIFT 0x2 67552fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP2_MASK 0x30 67652fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP2__SHIFT 0x4 67752fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP3_MASK 0xc0 67852fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP3__SHIFT 0x6 67952fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP4_MASK 0x300 68052fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP4__SHIFT 0x8 68152fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP5_MASK 0xc00 68252fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP5__SHIFT 0xa 68352fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP6_MASK 0x3000 68452fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP6__SHIFT 0xc 68552fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP7_MASK 0xc000 68652fb57e7SAlex Deucher #define MC_ARB_AGE_WR__RATE_GROUP7__SHIFT 0xe 68752fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP0_MASK 0x10000 68852fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP0__SHIFT 0x10 68952fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP1_MASK 0x20000 69052fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP1__SHIFT 0x11 69152fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP2_MASK 0x40000 69252fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP2__SHIFT 0x12 69352fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP3_MASK 0x80000 69452fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP3__SHIFT 0x13 69552fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP4_MASK 0x100000 69652fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP4__SHIFT 0x14 69752fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP5_MASK 0x200000 69852fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP5__SHIFT 0x15 69952fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP6_MASK 0x400000 70052fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP6__SHIFT 0x16 70152fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP7_MASK 0x800000 70252fb57e7SAlex Deucher #define MC_ARB_AGE_WR__ENABLE_GROUP7__SHIFT 0x17 70352fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP0_MASK 0x1000000 70452fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP0__SHIFT 0x18 70552fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP1_MASK 0x2000000 70652fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP1__SHIFT 0x19 70752fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP2_MASK 0x4000000 70852fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP2__SHIFT 0x1a 70952fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP3_MASK 0x8000000 71052fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP3__SHIFT 0x1b 71152fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP4_MASK 0x10000000 71252fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP4__SHIFT 0x1c 71352fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP5_MASK 0x20000000 71452fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP5__SHIFT 0x1d 71552fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP6_MASK 0x40000000 71652fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP6__SHIFT 0x1e 71752fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP7_MASK 0x80000000 71852fb57e7SAlex Deucher #define MC_ARB_AGE_WR__DIVIDE_GROUP7__SHIFT 0x1f 71952fb57e7SAlex Deucher #define MC_ARB_RFSH_CNTL__ENABLE_MASK 0x1 72052fb57e7SAlex Deucher #define MC_ARB_RFSH_CNTL__ENABLE__SHIFT 0x0 72152fb57e7SAlex Deucher #define MC_ARB_RFSH_CNTL__URG0_MASK 0x3e 72252fb57e7SAlex Deucher #define MC_ARB_RFSH_CNTL__URG0__SHIFT 0x1 72352fb57e7SAlex Deucher #define MC_ARB_RFSH_CNTL__URG1_MASK 0x7c0 72452fb57e7SAlex Deucher #define MC_ARB_RFSH_CNTL__URG1__SHIFT 0x6 72552fb57e7SAlex Deucher #define MC_ARB_RFSH_CNTL__ACCUM_MASK 0x800 72652fb57e7SAlex Deucher #define MC_ARB_RFSH_CNTL__ACCUM__SHIFT 0xb 72752fb57e7SAlex Deucher #define MC_ARB_RFSH_RATE__POWERMODE0_MASK 0xff 72852fb57e7SAlex Deucher #define MC_ARB_RFSH_RATE__POWERMODE0__SHIFT 0x0 72952fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVERRIDE_CGSTATE_MASK 0x3 73052fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVERRIDE_CGSTATE__SHIFT 0x0 73152fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK 0x4 73252fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_CGRFSH__SHIFT 0x2 73352fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_CGSQM_MASK 0x8 73452fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_CGSQM__SHIFT 0x3 73552fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__SRFSH_ON_D1_MASK 0x10 73652fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__SRFSH_ON_D1__SHIFT 0x4 73752fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__BLKOUT_ON_D1_MASK 0x20 73852fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__BLKOUT_ON_D1__SHIFT 0x5 73952fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__IDLE_ON_D1_MASK 0x40 74052fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__IDLE_ON_D1__SHIFT 0x6 74152fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_PM_MASK 0x80 74252fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_PM__SHIFT 0x7 74352fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_PM_STATE_MASK 0x300 74452fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT 0x8 74552fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_RD_MASK 0x400 74652fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_RD__SHIFT 0xa 74752fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_RD_STATE_MASK 0x800 74852fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_RD_STATE__SHIFT 0xb 74952fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_WR_MASK 0x1000 75052fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_WR__SHIFT 0xc 75152fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_WR_STATE_MASK 0x2000 75252fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_WR_STATE__SHIFT 0xd 75352fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_RFSH_MASK 0x4000 75452fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_RFSH__SHIFT 0xe 75552fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_RFSH_STATE_MASK 0x8000 75652fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__OVRR_RFSH_STATE__SHIFT 0xf 75752fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__RSV_0_MASK 0x30000 75852fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__RSV_0__SHIFT 0x10 75952fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__IDLE_ON_D2_MASK 0x40000 76052fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__IDLE_ON_D2__SHIFT 0x12 76152fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__IDLE_ON_D3_MASK 0x80000 76252fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__IDLE_ON_D3__SHIFT 0x13 76352fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__IDLE_CNT_MASK 0xf00000 76452fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__IDLE_CNT__SHIFT 0x14 76552fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__RSV_1_MASK 0x1000000 76652fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__RSV_1__SHIFT 0x18 76752fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__RSV_2_MASK 0x2000000 76852fb57e7SAlex Deucher #define MC_ARB_PM_CNTL__RSV_2__SHIFT 0x19 76952fb57e7SAlex Deucher #define MC_ARB_GDEC_RD_CNTL__PAGEBIT0_MASK 0xf 77052fb57e7SAlex Deucher #define MC_ARB_GDEC_RD_CNTL__PAGEBIT0__SHIFT 0x0 77152fb57e7SAlex Deucher #define MC_ARB_GDEC_RD_CNTL__PAGEBIT1_MASK 0xf0 77252fb57e7SAlex Deucher #define MC_ARB_GDEC_RD_CNTL__PAGEBIT1__SHIFT 0x4 77352fb57e7SAlex Deucher #define MC_ARB_GDEC_RD_CNTL__USE_RANK_MASK 0x100 77452fb57e7SAlex Deucher #define MC_ARB_GDEC_RD_CNTL__USE_RANK__SHIFT 0x8 77552fb57e7SAlex Deucher #define MC_ARB_GDEC_RD_CNTL__USE_RSNO_MASK 0x200 77652fb57e7SAlex Deucher #define MC_ARB_GDEC_RD_CNTL__USE_RSNO__SHIFT 0x9 77752fb57e7SAlex Deucher #define MC_ARB_GDEC_RD_CNTL__REM_DEFAULT_GRP_MASK 0x3c00 77852fb57e7SAlex Deucher #define MC_ARB_GDEC_RD_CNTL__REM_DEFAULT_GRP__SHIFT 0xa 77952fb57e7SAlex Deucher #define MC_ARB_GDEC_WR_CNTL__PAGEBIT0_MASK 0xf 78052fb57e7SAlex Deucher #define MC_ARB_GDEC_WR_CNTL__PAGEBIT0__SHIFT 0x0 78152fb57e7SAlex Deucher #define MC_ARB_GDEC_WR_CNTL__PAGEBIT1_MASK 0xf0 78252fb57e7SAlex Deucher #define MC_ARB_GDEC_WR_CNTL__PAGEBIT1__SHIFT 0x4 78352fb57e7SAlex Deucher #define MC_ARB_GDEC_WR_CNTL__USE_RANK_MASK 0x100 78452fb57e7SAlex Deucher #define MC_ARB_GDEC_WR_CNTL__USE_RANK__SHIFT 0x8 78552fb57e7SAlex Deucher #define MC_ARB_GDEC_WR_CNTL__USE_RSNO_MASK 0x200 78652fb57e7SAlex Deucher #define MC_ARB_GDEC_WR_CNTL__USE_RSNO__SHIFT 0x9 78752fb57e7SAlex Deucher #define MC_ARB_GDEC_WR_CNTL__REM_DEFAULT_GRP_MASK 0x3c00 78852fb57e7SAlex Deucher #define MC_ARB_GDEC_WR_CNTL__REM_DEFAULT_GRP__SHIFT 0xa 78952fb57e7SAlex Deucher #define MC_ARB_LM_RD__STREAK_LIMIT_MASK 0xff 79052fb57e7SAlex Deucher #define MC_ARB_LM_RD__STREAK_LIMIT__SHIFT 0x0 79152fb57e7SAlex Deucher #define MC_ARB_LM_RD__STREAK_LIMIT_UBER_MASK 0xff00 79252fb57e7SAlex Deucher #define MC_ARB_LM_RD__STREAK_LIMIT_UBER__SHIFT 0x8 79352fb57e7SAlex Deucher #define MC_ARB_LM_RD__STREAK_BREAK_MASK 0x10000 79452fb57e7SAlex Deucher #define MC_ARB_LM_RD__STREAK_BREAK__SHIFT 0x10 79552fb57e7SAlex Deucher #define MC_ARB_LM_RD__STREAK_UBER_MASK 0x20000 79652fb57e7SAlex Deucher #define MC_ARB_LM_RD__STREAK_UBER__SHIFT 0x11 79752fb57e7SAlex Deucher #define MC_ARB_LM_RD__ENABLE_TWO_LIST_MASK 0x40000 79852fb57e7SAlex Deucher #define MC_ARB_LM_RD__ENABLE_TWO_LIST__SHIFT 0x12 79952fb57e7SAlex Deucher #define MC_ARB_LM_RD__POPIDLE_RST_TWOLIST_MASK 0x80000 80052fb57e7SAlex Deucher #define MC_ARB_LM_RD__POPIDLE_RST_TWOLIST__SHIFT 0x13 80152fb57e7SAlex Deucher #define MC_ARB_LM_RD__SKID1_RST_TWOLIST_MASK 0x100000 80252fb57e7SAlex Deucher #define MC_ARB_LM_RD__SKID1_RST_TWOLIST__SHIFT 0x14 80352fb57e7SAlex Deucher #define MC_ARB_LM_RD__BANKGROUP_CONFIG_MASK 0xe00000 80452fb57e7SAlex Deucher #define MC_ARB_LM_RD__BANKGROUP_CONFIG__SHIFT 0x15 80552fb57e7SAlex Deucher #define MC_ARB_LM_WR__STREAK_LIMIT_MASK 0xff 80652fb57e7SAlex Deucher #define MC_ARB_LM_WR__STREAK_LIMIT__SHIFT 0x0 80752fb57e7SAlex Deucher #define MC_ARB_LM_WR__STREAK_LIMIT_UBER_MASK 0xff00 80852fb57e7SAlex Deucher #define MC_ARB_LM_WR__STREAK_LIMIT_UBER__SHIFT 0x8 80952fb57e7SAlex Deucher #define MC_ARB_LM_WR__STREAK_BREAK_MASK 0x10000 81052fb57e7SAlex Deucher #define MC_ARB_LM_WR__STREAK_BREAK__SHIFT 0x10 81152fb57e7SAlex Deucher #define MC_ARB_LM_WR__STREAK_UBER_MASK 0x20000 81252fb57e7SAlex Deucher #define MC_ARB_LM_WR__STREAK_UBER__SHIFT 0x11 81352fb57e7SAlex Deucher #define MC_ARB_LM_WR__ENABLE_TWO_LIST_MASK 0x40000 81452fb57e7SAlex Deucher #define MC_ARB_LM_WR__ENABLE_TWO_LIST__SHIFT 0x12 81552fb57e7SAlex Deucher #define MC_ARB_LM_WR__POPIDLE_RST_TWOLIST_MASK 0x80000 81652fb57e7SAlex Deucher #define MC_ARB_LM_WR__POPIDLE_RST_TWOLIST__SHIFT 0x13 81752fb57e7SAlex Deucher #define MC_ARB_LM_WR__SKID1_RST_TWOLIST_MASK 0x100000 81852fb57e7SAlex Deucher #define MC_ARB_LM_WR__SKID1_RST_TWOLIST__SHIFT 0x14 81952fb57e7SAlex Deucher #define MC_ARB_LM_WR__BANKGROUP_CONFIG_MASK 0xe00000 82052fb57e7SAlex Deucher #define MC_ARB_LM_WR__BANKGROUP_CONFIG__SHIFT 0x15 82152fb57e7SAlex Deucher #define MC_ARB_REMREQ__RD_WATER_MASK 0xff 82252fb57e7SAlex Deucher #define MC_ARB_REMREQ__RD_WATER__SHIFT 0x0 82352fb57e7SAlex Deucher #define MC_ARB_REMREQ__WR_WATER_MASK 0xff00 82452fb57e7SAlex Deucher #define MC_ARB_REMREQ__WR_WATER__SHIFT 0x8 82552fb57e7SAlex Deucher #define MC_ARB_REMREQ__WR_MAXBURST_SIZE_MASK 0xf0000 82652fb57e7SAlex Deucher #define MC_ARB_REMREQ__WR_MAXBURST_SIZE__SHIFT 0x10 82752fb57e7SAlex Deucher #define MC_ARB_REMREQ__WR_LAZY_TIMER_MASK 0xf00000 82852fb57e7SAlex Deucher #define MC_ARB_REMREQ__WR_LAZY_TIMER__SHIFT 0x14 82952fb57e7SAlex Deucher #define MC_ARB_REMREQ__ENABLE_REMOTE_NACK_REQ_MASK 0x1000000 83052fb57e7SAlex Deucher #define MC_ARB_REMREQ__ENABLE_REMOTE_NACK_REQ__SHIFT 0x18 83152fb57e7SAlex Deucher #define MC_ARB_REPLAY__ENABLE_RD_MASK 0x1 83252fb57e7SAlex Deucher #define MC_ARB_REPLAY__ENABLE_RD__SHIFT 0x0 83352fb57e7SAlex Deucher #define MC_ARB_REPLAY__ENABLE_WR_MASK 0x2 83452fb57e7SAlex Deucher #define MC_ARB_REPLAY__ENABLE_WR__SHIFT 0x1 83552fb57e7SAlex Deucher #define MC_ARB_REPLAY__WRACK_MODE_MASK 0x4 83652fb57e7SAlex Deucher #define MC_ARB_REPLAY__WRACK_MODE__SHIFT 0x2 83752fb57e7SAlex Deucher #define MC_ARB_REPLAY__WAW_ENABLE_MASK 0x8 83852fb57e7SAlex Deucher #define MC_ARB_REPLAY__WAW_ENABLE__SHIFT 0x3 83952fb57e7SAlex Deucher #define MC_ARB_REPLAY__RAW_ENABLE_MASK 0x10 84052fb57e7SAlex Deucher #define MC_ARB_REPLAY__RAW_ENABLE__SHIFT 0x4 84152fb57e7SAlex Deucher #define MC_ARB_REPLAY__IGNORE_WR_CDC_MASK 0x20 84252fb57e7SAlex Deucher #define MC_ARB_REPLAY__IGNORE_WR_CDC__SHIFT 0x5 84352fb57e7SAlex Deucher #define MC_ARB_REPLAY__BREAK_ON_STALL_MASK 0x40 84452fb57e7SAlex Deucher #define MC_ARB_REPLAY__BREAK_ON_STALL__SHIFT 0x6 84552fb57e7SAlex Deucher #define MC_ARB_REPLAY__BOS_ENABLE_WAIT_CYC_MASK 0x80 84652fb57e7SAlex Deucher #define MC_ARB_REPLAY__BOS_ENABLE_WAIT_CYC__SHIFT 0x7 84752fb57e7SAlex Deucher #define MC_ARB_REPLAY__BOS_WAIT_CYC_MASK 0x7f00 84852fb57e7SAlex Deucher #define MC_ARB_REPLAY__BOS_WAIT_CYC__SHIFT 0x8 84952fb57e7SAlex Deucher #define MC_ARB_REPLAY__NO_PCH_AT_REPLAY_START_MASK 0x8000 85052fb57e7SAlex Deucher #define MC_ARB_REPLAY__NO_PCH_AT_REPLAY_START__SHIFT 0xf 85152fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_RD__LCL_MASK 0xff 85252fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_RD__LCL__SHIFT 0x0 85352fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_RD__HUB_MASK 0xff00 85452fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_RD__HUB__SHIFT 0x8 85552fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_RD__DISP_MASK 0xff0000 85652fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_RD__DISP__SHIFT 0x10 85752fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_RD__RETURN_CREDIT_MASK 0xff000000 85852fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_RD__RETURN_CREDIT__SHIFT 0x18 85952fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_WR__LCL_MASK 0xff 86052fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_WR__LCL__SHIFT 0x0 86152fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_WR__HUB_MASK 0xff00 86252fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_WR__HUB__SHIFT 0x8 86352fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_WR__RETURN_CREDIT_MASK 0xff0000 86452fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_WR__RETURN_CREDIT__SHIFT 0x10 86552fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_WR__WRRET_SEQ_SKID_MASK 0xf000000 86652fb57e7SAlex Deucher #define MC_ARB_RET_CREDITS_WR__WRRET_SEQ_SKID__SHIFT 0x18 86752fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__CID_CH0_MASK 0xff 86852fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__CID_CH0__SHIFT 0x0 86952fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__CID_CH1_MASK 0xff00 87052fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__CID_CH1__SHIFT 0x8 87152fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__WRITE_CH0_MASK 0x10000 87252fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__WRITE_CH0__SHIFT 0x10 87352fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__WRITE_CH1_MASK 0x20000 87452fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__WRITE_CH1__SHIFT 0x11 87552fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__REALTIME_CH0_MASK 0x40000 87652fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__REALTIME_CH0__SHIFT 0x12 87752fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__REALTIME_CH1_MASK 0x80000 87852fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_CID__REALTIME_CH1__SHIFT 0x13 87952fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_RSLT0__MAX_LATENCY_MASK 0xffffffff 88052fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_RSLT0__MAX_LATENCY__SHIFT 0x0 88152fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_RSLT1__MAX_LATENCY_MASK 0xffffffff 88252fb57e7SAlex Deucher #define MC_ARB_MAX_LAT_RSLT1__MAX_LATENCY__SHIFT 0x0 88352fb57e7SAlex Deucher #define MC_ARB_SSM__FORMAT_MASK 0x1f 88452fb57e7SAlex Deucher #define MC_ARB_SSM__FORMAT__SHIFT 0x0 88552fb57e7SAlex Deucher #define MC_ARB_CG__CG_ARB_REQ_MASK 0xff 88652fb57e7SAlex Deucher #define MC_ARB_CG__CG_ARB_REQ__SHIFT 0x0 88752fb57e7SAlex Deucher #define MC_ARB_CG__CG_ARB_RESP_MASK 0xff00 88852fb57e7SAlex Deucher #define MC_ARB_CG__CG_ARB_RESP__SHIFT 0x8 88952fb57e7SAlex Deucher #define MC_ARB_CG__RSV_0_MASK 0xff0000 89052fb57e7SAlex Deucher #define MC_ARB_CG__RSV_0__SHIFT 0x10 89152fb57e7SAlex Deucher #define MC_ARB_CG__RSV_1_MASK 0xff000000 89252fb57e7SAlex Deucher #define MC_ARB_CG__RSV_1__SHIFT 0x18 89352fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_ENABLE_MASK 0x1 89452fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_ENABLE__SHIFT 0x0 89552fb57e7SAlex Deucher #define MC_ARB_WCDR__SEQ_IDLE_MASK 0x2 89652fb57e7SAlex Deucher #define MC_ARB_WCDR__SEQ_IDLE__SHIFT 0x1 89752fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_PERIOD_MASK 0x7c 89852fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_PERIOD__SHIFT 0x2 89952fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_BURST_MASK 0x1f80 90052fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_BURST__SHIFT 0x7 90152fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_BURST_MODE_MASK 0x2000 90252fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_BURST_MODE__SHIFT 0xd 90352fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_WAKEUP_MASK 0xc000 90452fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_WAKEUP__SHIFT 0xe 90552fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_DEGLITCH_ENABLE_MASK 0x10000 90652fb57e7SAlex Deucher #define MC_ARB_WCDR__IDLE_DEGLITCH_ENABLE__SHIFT 0x10 90752fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_ENABLE_MASK 0x20000 90852fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_ENABLE__SHIFT 0x11 90952fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_THRESHOLD_MASK 0x3c0000 91052fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_THRESHOLD__SHIFT 0x12 91152fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_MAX_BURST_MASK 0x1c00000 91252fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_MAX_BURST__SHIFT 0x16 91352fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_INC_READ_MASK 0x2000000 91452fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_INC_READ__SHIFT 0x19 91552fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_INC_SKIDIDLE_MASK 0x4000000 91652fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_INC_SKIDIDLE__SHIFT 0x1a 91752fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_INC_SEQIDLE_MASK 0x8000000 91852fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_INC_SEQIDLE__SHIFT 0x1b 91952fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_TWOPAGE_MASK 0x10000000 92052fb57e7SAlex Deucher #define MC_ARB_WCDR__WPRE_TWOPAGE__SHIFT 0x1c 92152fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING_1__ACTRD_MASK 0xff 92252fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING_1__ACTRD__SHIFT 0x0 92352fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING_1__ACTWR_MASK 0xff00 92452fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING_1__ACTWR__SHIFT 0x8 92552fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING_1__RASMACTRD_MASK 0xff0000 92652fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING_1__RASMACTRD__SHIFT 0x10 92752fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING_1__RASMACTWR_MASK 0xff000000 92852fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING_1__RASMACTWR__SHIFT 0x18 92952fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__LM_RD0_MASK 0x1 93052fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__LM_RD0__SHIFT 0x0 93152fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__LM_RD1_MASK 0x2 93252fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__LM_RD1__SHIFT 0x1 93352fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__LM_WR0_MASK 0x4 93452fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__LM_WR0__SHIFT 0x2 93552fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__LM_WR1_MASK 0x8 93652fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__LM_WR1__SHIFT 0x3 93752fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__HM_RD0_MASK 0x10 93852fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__HM_RD0__SHIFT 0x4 93952fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__HM_RD1_MASK 0x20 94052fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__HM_RD1__SHIFT 0x5 94152fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__HM_WR0_MASK 0x40 94252fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__HM_WR0__SHIFT 0x6 94352fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__HM_WR1_MASK 0x80 94452fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__HM_WR1__SHIFT 0x7 94552fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WDE_RD0_MASK 0x100 94652fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WDE_RD0__SHIFT 0x8 94752fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WDE_RD1_MASK 0x200 94852fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WDE_RD1__SHIFT 0x9 94952fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WDE_WR0_MASK 0x400 95052fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WDE_WR0__SHIFT 0xa 95152fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WDE_WR1_MASK 0x800 95252fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WDE_WR1__SHIFT 0xb 95352fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__POP0_MASK 0x1000 95452fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__POP0__SHIFT 0xc 95552fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__POP1_MASK 0x2000 95652fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__POP1__SHIFT 0xd 95752fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__TAGFIFO0_MASK 0x4000 95852fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__TAGFIFO0__SHIFT 0xe 95952fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__TAGFIFO1_MASK 0x8000 96052fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__TAGFIFO1__SHIFT 0xf 96152fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REPLAY0_MASK 0x10000 96252fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REPLAY0__SHIFT 0x10 96352fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REPLAY1_MASK 0x20000 96452fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REPLAY1__SHIFT 0x11 96552fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__RDRET0_MASK 0x40000 96652fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__RDRET0__SHIFT 0x12 96752fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__RDRET1_MASK 0x80000 96852fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__RDRET1__SHIFT 0x13 96952fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__GECC2_RD0_MASK 0x100000 97052fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__GECC2_RD0__SHIFT 0x14 97152fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__GECC2_RD1_MASK 0x200000 97252fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__GECC2_RD1__SHIFT 0x15 97352fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__GECC2_WR0_MASK 0x400000 97452fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__GECC2_WR0__SHIFT 0x16 97552fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__GECC2_WR1_MASK 0x800000 97652fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__GECC2_WR1__SHIFT 0x17 97752fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WCDR0_MASK 0x1000000 97852fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WCDR0__SHIFT 0x18 97952fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WCDR1_MASK 0x2000000 98052fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__WCDR1__SHIFT 0x19 98152fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__RTT0_MASK 0x4000000 98252fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__RTT0__SHIFT 0x1a 98352fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__RTT1_MASK 0x8000000 98452fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__RTT1__SHIFT 0x1b 98552fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REM_RD0_MASK 0x10000000 98652fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REM_RD0__SHIFT 0x1c 98752fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REM_RD1_MASK 0x20000000 98852fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REM_RD1__SHIFT 0x1d 98952fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REM_WR0_MASK 0x40000000 99052fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REM_WR0__SHIFT 0x1e 99152fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REM_WR1_MASK 0x80000000 99252fb57e7SAlex Deucher #define MC_ARB_BUSY_STATUS__REM_WR1__SHIFT 0x1f 99352fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2_1__RAS2RAS_MASK 0xff 99452fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2_1__RAS2RAS__SHIFT 0x0 99552fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2_1__RP_MASK 0xff00 99652fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2_1__RP__SHIFT 0x8 99752fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2_1__WRPLUSRP_MASK 0xff0000 99852fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2_1__WRPLUSRP__SHIFT 0x10 99952fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2_1__BUS_TURN_MASK 0x1f000000 100052fb57e7SAlex Deucher #define MC_ARB_DRAM_TIMING2_1__BUS_TURN__SHIFT 0x18 100152fb57e7SAlex Deucher #define MC_ARB_BURST_TIME__STATE0_MASK 0x1f 100252fb57e7SAlex Deucher #define MC_ARB_BURST_TIME__STATE0__SHIFT 0x0 100352fb57e7SAlex Deucher #define MC_ARB_BURST_TIME__STATE1_MASK 0x3e0 100452fb57e7SAlex Deucher #define MC_ARB_BURST_TIME__STATE1__SHIFT 0x5 100552fb57e7SAlex Deucher #define MC_ARB_BURST_TIME__STATE2_MASK 0x7c00 100652fb57e7SAlex Deucher #define MC_ARB_BURST_TIME__STATE2__SHIFT 0xa 100752fb57e7SAlex Deucher #define MC_ARB_BURST_TIME__STATE3_MASK 0xf8000 100852fb57e7SAlex Deucher #define MC_ARB_BURST_TIME__STATE3__SHIFT 0xf 100952fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB1_RD_MASK 0x1 101052fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB1_RD__SHIFT 0x0 101152fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB1_WR_MASK 0x2 101252fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB1_WR__SHIFT 0x1 101352fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB1_RD_MASK 0x4 101452fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB1_RD__SHIFT 0x2 101552fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB1_WR_MASK 0x8 101652fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB1_WR__SHIFT 0x3 101752fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__TC2_RD_MASK 0x10 101852fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__TC2_RD__SHIFT 0x4 101952fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__ARB_DBG_MASK 0xf00 102052fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__ARB_DBG__SHIFT 0x8 102152fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__TC2_WR_MASK 0x1000 102252fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__TC2_WR__SHIFT 0xc 102352fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB0_CONNECT_CNTL_MASK 0x6000 102452fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB0_CONNECT_CNTL__SHIFT 0xd 102552fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB0_CONNECT_CNTL_MASK 0x18000 102652fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB0_CONNECT_CNTL__SHIFT 0xf 102752fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB1_CONNECT_CNTL_MASK 0x60000 102852fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB1_CONNECT_CNTL__SHIFT 0x11 102952fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB1_CONNECT_CNTL_MASK 0x180000 103052fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB1_CONNECT_CNTL__SHIFT 0x13 103152fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__TC0_CONNECT_CNTL_MASK 0x600000 103252fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__TC0_CONNECT_CNTL__SHIFT 0x15 103352fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__TC1_CONNECT_CNTL_MASK 0x1800000 103452fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__TC1_CONNECT_CNTL__SHIFT 0x17 103552fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB0_CID_CNTL_ENABLE_MASK 0x2000000 103652fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB0_CID_CNTL_ENABLE__SHIFT 0x19 103752fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB0_CID_CNTL_ENABLE_MASK 0x4000000 103852fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB0_CID_CNTL_ENABLE__SHIFT 0x1a 103952fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB1_CID_CNTL_ENABLE_MASK 0x8000000 104052fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__CB1_CID_CNTL_ENABLE__SHIFT 0x1b 104152fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB1_CID_CNTL_ENABLE_MASK 0x10000000 104252fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__DB1_CID_CNTL_ENABLE__SHIFT 0x1c 104352fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__TC2_REPAIR_ENABLE_MASK 0x60000000 104452fb57e7SAlex Deucher #define MC_CITF_XTRA_ENABLE__TC2_REPAIR_ENABLE__SHIFT 0x1d 104552fb57e7SAlex Deucher #define CC_MC_MAX_CHANNEL__NOOFCHAN_MASK 0x1e 104652fb57e7SAlex Deucher #define CC_MC_MAX_CHANNEL__NOOFCHAN__SHIFT 0x1 104752fb57e7SAlex Deucher #define MC_CG_CONFIG__MCDW_WR_ENABLE_MASK 0x1 104852fb57e7SAlex Deucher #define MC_CG_CONFIG__MCDW_WR_ENABLE__SHIFT 0x0 104952fb57e7SAlex Deucher #define MC_CG_CONFIG__MCDX_WR_ENABLE_MASK 0x2 105052fb57e7SAlex Deucher #define MC_CG_CONFIG__MCDX_WR_ENABLE__SHIFT 0x1 105152fb57e7SAlex Deucher #define MC_CG_CONFIG__MCDY_WR_ENABLE_MASK 0x4 105252fb57e7SAlex Deucher #define MC_CG_CONFIG__MCDY_WR_ENABLE__SHIFT 0x2 105352fb57e7SAlex Deucher #define MC_CG_CONFIG__MCDZ_WR_ENABLE_MASK 0x8 105452fb57e7SAlex Deucher #define MC_CG_CONFIG__MCDZ_WR_ENABLE__SHIFT 0x3 105552fb57e7SAlex Deucher #define MC_CG_CONFIG__MC_RD_ENABLE_MASK 0x30 105652fb57e7SAlex Deucher #define MC_CG_CONFIG__MC_RD_ENABLE__SHIFT 0x4 105752fb57e7SAlex Deucher #define MC_CG_CONFIG__INDEX_MASK 0x3fffc0 105852fb57e7SAlex Deucher #define MC_CG_CONFIG__INDEX__SHIFT 0x6 105952fb57e7SAlex Deucher #define MC_CITF_CNTL__IGNOREPM_MASK 0x4 106052fb57e7SAlex Deucher #define MC_CITF_CNTL__IGNOREPM__SHIFT 0x2 106152fb57e7SAlex Deucher #define MC_CITF_CNTL__EXEMPTPM_MASK 0x8 106252fb57e7SAlex Deucher #define MC_CITF_CNTL__EXEMPTPM__SHIFT 0x3 106352fb57e7SAlex Deucher #define MC_CITF_CNTL__GFX_IDLE_OVERRIDE_MASK 0x30 106452fb57e7SAlex Deucher #define MC_CITF_CNTL__GFX_IDLE_OVERRIDE__SHIFT 0x4 106552fb57e7SAlex Deucher #define MC_CITF_CNTL__MCD_SRBM_MASK_ENABLE_MASK 0x40 106652fb57e7SAlex Deucher #define MC_CITF_CNTL__MCD_SRBM_MASK_ENABLE__SHIFT 0x6 106752fb57e7SAlex Deucher #define MC_CITF_CNTL__CNTR_CHMAP_MODE_MASK 0x80 106852fb57e7SAlex Deucher #define MC_CITF_CNTL__CNTR_CHMAP_MODE__SHIFT 0x7 106952fb57e7SAlex Deucher #define MC_CITF_CNTL__REMOTE_RB_CONNECT_ENABLE_MASK 0x100 107052fb57e7SAlex Deucher #define MC_CITF_CNTL__REMOTE_RB_CONNECT_ENABLE__SHIFT 0x8 107152fb57e7SAlex Deucher #define MC_CITF_CREDITS_VM__READ_ALL_MASK 0x3f 107252fb57e7SAlex Deucher #define MC_CITF_CREDITS_VM__READ_ALL__SHIFT 0x0 107352fb57e7SAlex Deucher #define MC_CITF_CREDITS_VM__WRITE_ALL_MASK 0xfc0 107452fb57e7SAlex Deucher #define MC_CITF_CREDITS_VM__WRITE_ALL__SHIFT 0x6 107552fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_RD__READ_LCL_MASK 0xff 107652fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_RD__READ_LCL__SHIFT 0x0 107752fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_RD__READ_HUB_MASK 0xff00 107852fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_RD__READ_HUB__SHIFT 0x8 107952fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_RD__READ_PRI_MASK 0xff0000 108052fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_RD__READ_PRI__SHIFT 0x10 108152fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_RD__LCL_PRI_MASK 0x1000000 108252fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_RD__LCL_PRI__SHIFT 0x18 108352fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_RD__HUB_PRI_MASK 0x2000000 108452fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_RD__HUB_PRI__SHIFT 0x19 108552fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_WR__WRITE_LCL_MASK 0xff 108652fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_WR__WRITE_LCL__SHIFT 0x0 108752fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_WR__WRITE_HUB_MASK 0xff00 108852fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_WR__WRITE_HUB__SHIFT 0x8 108952fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_WR__HUB_PRI_MASK 0x10000 109052fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_WR__HUB_PRI__SHIFT 0x10 109152fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_WR__LCL_PRI_MASK 0x20000 109252fb57e7SAlex Deucher #define MC_CITF_CREDITS_ARB_WR__LCL_PRI__SHIFT 0x11 109352fb57e7SAlex Deucher #define MC_CITF_DAGB_CNTL__JUMP_AHEAD_MASK 0x1 109452fb57e7SAlex Deucher #define MC_CITF_DAGB_CNTL__JUMP_AHEAD__SHIFT 0x0 109552fb57e7SAlex Deucher #define MC_CITF_DAGB_CNTL__CENTER_RD_MAX_BURST_MASK 0x1e 109652fb57e7SAlex Deucher #define MC_CITF_DAGB_CNTL__CENTER_RD_MAX_BURST__SHIFT 0x1 109752fb57e7SAlex Deucher #define MC_CITF_DAGB_CNTL__DISABLE_SELF_INIT_MASK 0x20 109852fb57e7SAlex Deucher #define MC_CITF_DAGB_CNTL__DISABLE_SELF_INIT__SHIFT 0x5 109952fb57e7SAlex Deucher #define MC_CITF_DAGB_CNTL__CENTER_WR_MAX_BURST_MASK 0x3c0 110052fb57e7SAlex Deucher #define MC_CITF_DAGB_CNTL__CENTER_WR_MAX_BURST__SHIFT 0x6 110152fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS__REMRDRET_MASK 0x3f 110252fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS__REMRDRET__SHIFT 0x0 110352fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS__CNTR_RD_HUB_LP_MASK 0x3f000 110452fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS__CNTR_RD_HUB_LP__SHIFT 0xc 110552fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS__CNTR_RD_HUB_HP_MASK 0xfc0000 110652fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS__CNTR_RD_HUB_HP__SHIFT 0x12 110752fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS__CNTR_RD_LCL_MASK 0x3f000000 110852fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS__CNTR_RD_LCL__SHIFT 0x18 110952fb57e7SAlex Deucher #define MC_CITF_RET_MODE__INORDER_RD_MASK 0x1 111052fb57e7SAlex Deucher #define MC_CITF_RET_MODE__INORDER_RD__SHIFT 0x0 111152fb57e7SAlex Deucher #define MC_CITF_RET_MODE__INORDER_WR_MASK 0x2 111252fb57e7SAlex Deucher #define MC_CITF_RET_MODE__INORDER_WR__SHIFT 0x1 111352fb57e7SAlex Deucher #define MC_CITF_RET_MODE__REMPRI_RD_MASK 0x4 111452fb57e7SAlex Deucher #define MC_CITF_RET_MODE__REMPRI_RD__SHIFT 0x2 111552fb57e7SAlex Deucher #define MC_CITF_RET_MODE__REMPRI_WR_MASK 0x8 111652fb57e7SAlex Deucher #define MC_CITF_RET_MODE__REMPRI_WR__SHIFT 0x3 111752fb57e7SAlex Deucher #define MC_CITF_RET_MODE__LCLPRI_RD_MASK 0x10 111852fb57e7SAlex Deucher #define MC_CITF_RET_MODE__LCLPRI_RD__SHIFT 0x4 111952fb57e7SAlex Deucher #define MC_CITF_RET_MODE__LCLPRI_WR_MASK 0x20 112052fb57e7SAlex Deucher #define MC_CITF_RET_MODE__LCLPRI_WR__SHIFT 0x5 112152fb57e7SAlex Deucher #define MC_CITF_DAGB_DLY__DLY_MASK 0x1f 112252fb57e7SAlex Deucher #define MC_CITF_DAGB_DLY__DLY__SHIFT 0x0 112352fb57e7SAlex Deucher #define MC_CITF_DAGB_DLY__CLI_MASK 0x1f0000 112452fb57e7SAlex Deucher #define MC_CITF_DAGB_DLY__CLI__SHIFT 0x10 112552fb57e7SAlex Deucher #define MC_CITF_DAGB_DLY__POS_MASK 0x1f000000 112652fb57e7SAlex Deucher #define MC_CITF_DAGB_DLY__POS__SHIFT 0x18 112752fb57e7SAlex Deucher #define MC_RD_GRP_EXT__DBSTEN0_MASK 0xf 112852fb57e7SAlex Deucher #define MC_RD_GRP_EXT__DBSTEN0__SHIFT 0x0 112952fb57e7SAlex Deucher #define MC_RD_GRP_EXT__TC0_MASK 0xf0 113052fb57e7SAlex Deucher #define MC_RD_GRP_EXT__TC0__SHIFT 0x4 113152fb57e7SAlex Deucher #define MC_WR_GRP_EXT__DBSTEN0_MASK 0xf 113252fb57e7SAlex Deucher #define MC_WR_GRP_EXT__DBSTEN0__SHIFT 0x0 113352fb57e7SAlex Deucher #define MC_WR_GRP_EXT__TC0_MASK 0xf0 113452fb57e7SAlex Deucher #define MC_WR_GRP_EXT__TC0__SHIFT 0x4 113552fb57e7SAlex Deucher #define MC_CITF_REMREQ__READ_CREDITS_MASK 0x7f 113652fb57e7SAlex Deucher #define MC_CITF_REMREQ__READ_CREDITS__SHIFT 0x0 113752fb57e7SAlex Deucher #define MC_CITF_REMREQ__WRITE_CREDITS_MASK 0x3f80 113852fb57e7SAlex Deucher #define MC_CITF_REMREQ__WRITE_CREDITS__SHIFT 0x7 113952fb57e7SAlex Deucher #define MC_CITF_REMREQ__CREDITS_ENABLE_MASK 0x4000 114052fb57e7SAlex Deucher #define MC_CITF_REMREQ__CREDITS_ENABLE__SHIFT 0xe 114152fb57e7SAlex Deucher #define MC_WR_TC0__ENABLE_MASK 0x1 114252fb57e7SAlex Deucher #define MC_WR_TC0__ENABLE__SHIFT 0x0 114352fb57e7SAlex Deucher #define MC_WR_TC0__PRESCALE_MASK 0x6 114452fb57e7SAlex Deucher #define MC_WR_TC0__PRESCALE__SHIFT 0x1 114552fb57e7SAlex Deucher #define MC_WR_TC0__BLACKOUT_EXEMPT_MASK 0x8 114652fb57e7SAlex Deucher #define MC_WR_TC0__BLACKOUT_EXEMPT__SHIFT 0x3 114752fb57e7SAlex Deucher #define MC_WR_TC0__STALL_MODE_MASK 0x30 114852fb57e7SAlex Deucher #define MC_WR_TC0__STALL_MODE__SHIFT 0x4 114952fb57e7SAlex Deucher #define MC_WR_TC0__STALL_OVERRIDE_MASK 0x40 115052fb57e7SAlex Deucher #define MC_WR_TC0__STALL_OVERRIDE__SHIFT 0x6 115152fb57e7SAlex Deucher #define MC_WR_TC0__MAX_BURST_MASK 0x780 115252fb57e7SAlex Deucher #define MC_WR_TC0__MAX_BURST__SHIFT 0x7 115352fb57e7SAlex Deucher #define MC_WR_TC0__LAZY_TIMER_MASK 0x7800 115452fb57e7SAlex Deucher #define MC_WR_TC0__LAZY_TIMER__SHIFT 0xb 115552fb57e7SAlex Deucher #define MC_WR_TC0__STALL_OVERRIDE_WTM_MASK 0x8000 115652fb57e7SAlex Deucher #define MC_WR_TC0__STALL_OVERRIDE_WTM__SHIFT 0xf 115752fb57e7SAlex Deucher #define MC_WR_TC1__ENABLE_MASK 0x1 115852fb57e7SAlex Deucher #define MC_WR_TC1__ENABLE__SHIFT 0x0 115952fb57e7SAlex Deucher #define MC_WR_TC1__PRESCALE_MASK 0x6 116052fb57e7SAlex Deucher #define MC_WR_TC1__PRESCALE__SHIFT 0x1 116152fb57e7SAlex Deucher #define MC_WR_TC1__BLACKOUT_EXEMPT_MASK 0x8 116252fb57e7SAlex Deucher #define MC_WR_TC1__BLACKOUT_EXEMPT__SHIFT 0x3 116352fb57e7SAlex Deucher #define MC_WR_TC1__STALL_MODE_MASK 0x30 116452fb57e7SAlex Deucher #define MC_WR_TC1__STALL_MODE__SHIFT 0x4 116552fb57e7SAlex Deucher #define MC_WR_TC1__STALL_OVERRIDE_MASK 0x40 116652fb57e7SAlex Deucher #define MC_WR_TC1__STALL_OVERRIDE__SHIFT 0x6 116752fb57e7SAlex Deucher #define MC_WR_TC1__MAX_BURST_MASK 0x780 116852fb57e7SAlex Deucher #define MC_WR_TC1__MAX_BURST__SHIFT 0x7 116952fb57e7SAlex Deucher #define MC_WR_TC1__LAZY_TIMER_MASK 0x7800 117052fb57e7SAlex Deucher #define MC_WR_TC1__LAZY_TIMER__SHIFT 0xb 117152fb57e7SAlex Deucher #define MC_WR_TC1__STALL_OVERRIDE_WTM_MASK 0x8000 117252fb57e7SAlex Deucher #define MC_WR_TC1__STALL_OVERRIDE_WTM__SHIFT 0xf 117352fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS_WR__CNTR_WR_HUB_MASK 0x3f 117452fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS_WR__CNTR_WR_HUB__SHIFT 0x0 117552fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS_WR__CNTR_WR_LCL_MASK 0xfc0 117652fb57e7SAlex Deucher #define MC_CITF_INT_CREDITS_WR__CNTR_WR_LCL__SHIFT 0x6 117752fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP0_DECREMENT_MASK 0x7 117852fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP0_DECREMENT__SHIFT 0x0 117952fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP1_DECREMENT_MASK 0x38 118052fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP1_DECREMENT__SHIFT 0x3 118152fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP2_DECREMENT_MASK 0x1c0 118252fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP2_DECREMENT__SHIFT 0x6 118352fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP3_DECREMENT_MASK 0xe00 118452fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP3_DECREMENT__SHIFT 0x9 118552fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP4_DECREMENT_MASK 0x7000 118652fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP4_DECREMENT__SHIFT 0xc 118752fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP5_DECREMENT_MASK 0x38000 118852fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP5_DECREMENT__SHIFT 0xf 118952fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP6_DECREMENT_MASK 0x1c0000 119052fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP6_DECREMENT__SHIFT 0x12 119152fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP7_DECREMENT_MASK 0xe00000 119252fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__GROUP7_DECREMENT__SHIFT 0x15 119352fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__DISABLE_REMOTE_MASK 0x1000000 119452fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__DISABLE_REMOTE__SHIFT 0x18 119552fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__DISABLE_LOCAL_MASK 0x2000000 119652fb57e7SAlex Deucher #define MC_CITF_WTM_RD_CNTL__DISABLE_LOCAL__SHIFT 0x19 119752fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP0_DECREMENT_MASK 0x7 119852fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP0_DECREMENT__SHIFT 0x0 119952fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP1_DECREMENT_MASK 0x38 120052fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP1_DECREMENT__SHIFT 0x3 120152fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP2_DECREMENT_MASK 0x1c0 120252fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP2_DECREMENT__SHIFT 0x6 120352fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP3_DECREMENT_MASK 0xe00 120452fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP3_DECREMENT__SHIFT 0x9 120552fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP4_DECREMENT_MASK 0x7000 120652fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP4_DECREMENT__SHIFT 0xc 120752fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP5_DECREMENT_MASK 0x38000 120852fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP5_DECREMENT__SHIFT 0xf 120952fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP6_DECREMENT_MASK 0x1c0000 121052fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP6_DECREMENT__SHIFT 0x12 121152fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP7_DECREMENT_MASK 0xe00000 121252fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__GROUP7_DECREMENT__SHIFT 0x15 121352fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__DISABLE_REMOTE_MASK 0x1000000 121452fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__DISABLE_REMOTE__SHIFT 0x18 121552fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__DISABLE_LOCAL_MASK 0x2000000 121652fb57e7SAlex Deucher #define MC_CITF_WTM_WR_CNTL__DISABLE_LOCAL__SHIFT 0x19 121752fb57e7SAlex Deucher #define MC_RD_CB__ENABLE_MASK 0x1 121852fb57e7SAlex Deucher #define MC_RD_CB__ENABLE__SHIFT 0x0 121952fb57e7SAlex Deucher #define MC_RD_CB__PRESCALE_MASK 0x6 122052fb57e7SAlex Deucher #define MC_RD_CB__PRESCALE__SHIFT 0x1 122152fb57e7SAlex Deucher #define MC_RD_CB__BLACKOUT_EXEMPT_MASK 0x8 122252fb57e7SAlex Deucher #define MC_RD_CB__BLACKOUT_EXEMPT__SHIFT 0x3 122352fb57e7SAlex Deucher #define MC_RD_CB__STALL_MODE_MASK 0x30 122452fb57e7SAlex Deucher #define MC_RD_CB__STALL_MODE__SHIFT 0x4 122552fb57e7SAlex Deucher #define MC_RD_CB__STALL_OVERRIDE_MASK 0x40 122652fb57e7SAlex Deucher #define MC_RD_CB__STALL_OVERRIDE__SHIFT 0x6 122752fb57e7SAlex Deucher #define MC_RD_CB__MAX_BURST_MASK 0x780 122852fb57e7SAlex Deucher #define MC_RD_CB__MAX_BURST__SHIFT 0x7 122952fb57e7SAlex Deucher #define MC_RD_CB__LAZY_TIMER_MASK 0x7800 123052fb57e7SAlex Deucher #define MC_RD_CB__LAZY_TIMER__SHIFT 0xb 123152fb57e7SAlex Deucher #define MC_RD_CB__STALL_OVERRIDE_WTM_MASK 0x8000 123252fb57e7SAlex Deucher #define MC_RD_CB__STALL_OVERRIDE_WTM__SHIFT 0xf 123352fb57e7SAlex Deucher #define MC_RD_DB__ENABLE_MASK 0x1 123452fb57e7SAlex Deucher #define MC_RD_DB__ENABLE__SHIFT 0x0 123552fb57e7SAlex Deucher #define MC_RD_DB__PRESCALE_MASK 0x6 123652fb57e7SAlex Deucher #define MC_RD_DB__PRESCALE__SHIFT 0x1 123752fb57e7SAlex Deucher #define MC_RD_DB__BLACKOUT_EXEMPT_MASK 0x8 123852fb57e7SAlex Deucher #define MC_RD_DB__BLACKOUT_EXEMPT__SHIFT 0x3 123952fb57e7SAlex Deucher #define MC_RD_DB__STALL_MODE_MASK 0x30 124052fb57e7SAlex Deucher #define MC_RD_DB__STALL_MODE__SHIFT 0x4 124152fb57e7SAlex Deucher #define MC_RD_DB__STALL_OVERRIDE_MASK 0x40 124252fb57e7SAlex Deucher #define MC_RD_DB__STALL_OVERRIDE__SHIFT 0x6 124352fb57e7SAlex Deucher #define MC_RD_DB__MAX_BURST_MASK 0x780 124452fb57e7SAlex Deucher #define MC_RD_DB__MAX_BURST__SHIFT 0x7 124552fb57e7SAlex Deucher #define MC_RD_DB__LAZY_TIMER_MASK 0x7800 124652fb57e7SAlex Deucher #define MC_RD_DB__LAZY_TIMER__SHIFT 0xb 124752fb57e7SAlex Deucher #define MC_RD_DB__STALL_OVERRIDE_WTM_MASK 0x8000 124852fb57e7SAlex Deucher #define MC_RD_DB__STALL_OVERRIDE_WTM__SHIFT 0xf 124952fb57e7SAlex Deucher #define MC_RD_TC0__ENABLE_MASK 0x1 125052fb57e7SAlex Deucher #define MC_RD_TC0__ENABLE__SHIFT 0x0 125152fb57e7SAlex Deucher #define MC_RD_TC0__PRESCALE_MASK 0x6 125252fb57e7SAlex Deucher #define MC_RD_TC0__PRESCALE__SHIFT 0x1 125352fb57e7SAlex Deucher #define MC_RD_TC0__BLACKOUT_EXEMPT_MASK 0x8 125452fb57e7SAlex Deucher #define MC_RD_TC0__BLACKOUT_EXEMPT__SHIFT 0x3 125552fb57e7SAlex Deucher #define MC_RD_TC0__STALL_MODE_MASK 0x30 125652fb57e7SAlex Deucher #define MC_RD_TC0__STALL_MODE__SHIFT 0x4 125752fb57e7SAlex Deucher #define MC_RD_TC0__STALL_OVERRIDE_MASK 0x40 125852fb57e7SAlex Deucher #define MC_RD_TC0__STALL_OVERRIDE__SHIFT 0x6 125952fb57e7SAlex Deucher #define MC_RD_TC0__MAX_BURST_MASK 0x780 126052fb57e7SAlex Deucher #define MC_RD_TC0__MAX_BURST__SHIFT 0x7 126152fb57e7SAlex Deucher #define MC_RD_TC0__LAZY_TIMER_MASK 0x7800 126252fb57e7SAlex Deucher #define MC_RD_TC0__LAZY_TIMER__SHIFT 0xb 126352fb57e7SAlex Deucher #define MC_RD_TC0__STALL_OVERRIDE_WTM_MASK 0x8000 126452fb57e7SAlex Deucher #define MC_RD_TC0__STALL_OVERRIDE_WTM__SHIFT 0xf 126552fb57e7SAlex Deucher #define MC_RD_TC1__ENABLE_MASK 0x1 126652fb57e7SAlex Deucher #define MC_RD_TC1__ENABLE__SHIFT 0x0 126752fb57e7SAlex Deucher #define MC_RD_TC1__PRESCALE_MASK 0x6 126852fb57e7SAlex Deucher #define MC_RD_TC1__PRESCALE__SHIFT 0x1 126952fb57e7SAlex Deucher #define MC_RD_TC1__BLACKOUT_EXEMPT_MASK 0x8 127052fb57e7SAlex Deucher #define MC_RD_TC1__BLACKOUT_EXEMPT__SHIFT 0x3 127152fb57e7SAlex Deucher #define MC_RD_TC1__STALL_MODE_MASK 0x30 127252fb57e7SAlex Deucher #define MC_RD_TC1__STALL_MODE__SHIFT 0x4 127352fb57e7SAlex Deucher #define MC_RD_TC1__STALL_OVERRIDE_MASK 0x40 127452fb57e7SAlex Deucher #define MC_RD_TC1__STALL_OVERRIDE__SHIFT 0x6 127552fb57e7SAlex Deucher #define MC_RD_TC1__MAX_BURST_MASK 0x780 127652fb57e7SAlex Deucher #define MC_RD_TC1__MAX_BURST__SHIFT 0x7 127752fb57e7SAlex Deucher #define MC_RD_TC1__LAZY_TIMER_MASK 0x7800 127852fb57e7SAlex Deucher #define MC_RD_TC1__LAZY_TIMER__SHIFT 0xb 127952fb57e7SAlex Deucher #define MC_RD_TC1__STALL_OVERRIDE_WTM_MASK 0x8000 128052fb57e7SAlex Deucher #define MC_RD_TC1__STALL_OVERRIDE_WTM__SHIFT 0xf 128152fb57e7SAlex Deucher #define MC_RD_HUB__ENABLE_MASK 0x1 128252fb57e7SAlex Deucher #define MC_RD_HUB__ENABLE__SHIFT 0x0 128352fb57e7SAlex Deucher #define MC_RD_HUB__PRESCALE_MASK 0x6 128452fb57e7SAlex Deucher #define MC_RD_HUB__PRESCALE__SHIFT 0x1 128552fb57e7SAlex Deucher #define MC_RD_HUB__BLACKOUT_EXEMPT_MASK 0x8 128652fb57e7SAlex Deucher #define MC_RD_HUB__BLACKOUT_EXEMPT__SHIFT 0x3 128752fb57e7SAlex Deucher #define MC_RD_HUB__STALL_MODE_MASK 0x30 128852fb57e7SAlex Deucher #define MC_RD_HUB__STALL_MODE__SHIFT 0x4 128952fb57e7SAlex Deucher #define MC_RD_HUB__STALL_OVERRIDE_MASK 0x40 129052fb57e7SAlex Deucher #define MC_RD_HUB__STALL_OVERRIDE__SHIFT 0x6 129152fb57e7SAlex Deucher #define MC_RD_HUB__MAX_BURST_MASK 0x780 129252fb57e7SAlex Deucher #define MC_RD_HUB__MAX_BURST__SHIFT 0x7 129352fb57e7SAlex Deucher #define MC_RD_HUB__LAZY_TIMER_MASK 0x7800 129452fb57e7SAlex Deucher #define MC_RD_HUB__LAZY_TIMER__SHIFT 0xb 129552fb57e7SAlex Deucher #define MC_RD_HUB__STALL_OVERRIDE_WTM_MASK 0x8000 129652fb57e7SAlex Deucher #define MC_RD_HUB__STALL_OVERRIDE_WTM__SHIFT 0xf 129752fb57e7SAlex Deucher #define MC_WR_CB__ENABLE_MASK 0x1 129852fb57e7SAlex Deucher #define MC_WR_CB__ENABLE__SHIFT 0x0 129952fb57e7SAlex Deucher #define MC_WR_CB__PRESCALE_MASK 0x6 130052fb57e7SAlex Deucher #define MC_WR_CB__PRESCALE__SHIFT 0x1 130152fb57e7SAlex Deucher #define MC_WR_CB__BLACKOUT_EXEMPT_MASK 0x8 130252fb57e7SAlex Deucher #define MC_WR_CB__BLACKOUT_EXEMPT__SHIFT 0x3 130352fb57e7SAlex Deucher #define MC_WR_CB__STALL_MODE_MASK 0x30 130452fb57e7SAlex Deucher #define MC_WR_CB__STALL_MODE__SHIFT 0x4 130552fb57e7SAlex Deucher #define MC_WR_CB__STALL_OVERRIDE_MASK 0x40 130652fb57e7SAlex Deucher #define MC_WR_CB__STALL_OVERRIDE__SHIFT 0x6 130752fb57e7SAlex Deucher #define MC_WR_CB__MAX_BURST_MASK 0x780 130852fb57e7SAlex Deucher #define MC_WR_CB__MAX_BURST__SHIFT 0x7 130952fb57e7SAlex Deucher #define MC_WR_CB__LAZY_TIMER_MASK 0x7800 131052fb57e7SAlex Deucher #define MC_WR_CB__LAZY_TIMER__SHIFT 0xb 131152fb57e7SAlex Deucher #define MC_WR_CB__STALL_OVERRIDE_WTM_MASK 0x8000 131252fb57e7SAlex Deucher #define MC_WR_CB__STALL_OVERRIDE_WTM__SHIFT 0xf 131352fb57e7SAlex Deucher #define MC_WR_DB__ENABLE_MASK 0x1 131452fb57e7SAlex Deucher #define MC_WR_DB__ENABLE__SHIFT 0x0 131552fb57e7SAlex Deucher #define MC_WR_DB__PRESCALE_MASK 0x6 131652fb57e7SAlex Deucher #define MC_WR_DB__PRESCALE__SHIFT 0x1 131752fb57e7SAlex Deucher #define MC_WR_DB__BLACKOUT_EXEMPT_MASK 0x8 131852fb57e7SAlex Deucher #define MC_WR_DB__BLACKOUT_EXEMPT__SHIFT 0x3 131952fb57e7SAlex Deucher #define MC_WR_DB__STALL_MODE_MASK 0x30 132052fb57e7SAlex Deucher #define MC_WR_DB__STALL_MODE__SHIFT 0x4 132152fb57e7SAlex Deucher #define MC_WR_DB__STALL_OVERRIDE_MASK 0x40 132252fb57e7SAlex Deucher #define MC_WR_DB__STALL_OVERRIDE__SHIFT 0x6 132352fb57e7SAlex Deucher #define MC_WR_DB__MAX_BURST_MASK 0x780 132452fb57e7SAlex Deucher #define MC_WR_DB__MAX_BURST__SHIFT 0x7 132552fb57e7SAlex Deucher #define MC_WR_DB__LAZY_TIMER_MASK 0x7800 132652fb57e7SAlex Deucher #define MC_WR_DB__LAZY_TIMER__SHIFT 0xb 132752fb57e7SAlex Deucher #define MC_WR_DB__STALL_OVERRIDE_WTM_MASK 0x8000 132852fb57e7SAlex Deucher #define MC_WR_DB__STALL_OVERRIDE_WTM__SHIFT 0xf 132952fb57e7SAlex Deucher #define MC_WR_HUB__ENABLE_MASK 0x1 133052fb57e7SAlex Deucher #define MC_WR_HUB__ENABLE__SHIFT 0x0 133152fb57e7SAlex Deucher #define MC_WR_HUB__PRESCALE_MASK 0x6 133252fb57e7SAlex Deucher #define MC_WR_HUB__PRESCALE__SHIFT 0x1 133352fb57e7SAlex Deucher #define MC_WR_HUB__BLACKOUT_EXEMPT_MASK 0x8 133452fb57e7SAlex Deucher #define MC_WR_HUB__BLACKOUT_EXEMPT__SHIFT 0x3 133552fb57e7SAlex Deucher #define MC_WR_HUB__STALL_MODE_MASK 0x30 133652fb57e7SAlex Deucher #define MC_WR_HUB__STALL_MODE__SHIFT 0x4 133752fb57e7SAlex Deucher #define MC_WR_HUB__STALL_OVERRIDE_MASK 0x40 133852fb57e7SAlex Deucher #define MC_WR_HUB__STALL_OVERRIDE__SHIFT 0x6 133952fb57e7SAlex Deucher #define MC_WR_HUB__MAX_BURST_MASK 0x780 134052fb57e7SAlex Deucher #define MC_WR_HUB__MAX_BURST__SHIFT 0x7 134152fb57e7SAlex Deucher #define MC_WR_HUB__LAZY_TIMER_MASK 0x7800 134252fb57e7SAlex Deucher #define MC_WR_HUB__LAZY_TIMER__SHIFT 0xb 134352fb57e7SAlex Deucher #define MC_WR_HUB__STALL_OVERRIDE_WTM_MASK 0x8000 134452fb57e7SAlex Deucher #define MC_WR_HUB__STALL_OVERRIDE_WTM__SHIFT 0xf 134552fb57e7SAlex Deucher #define MC_CITF_CREDITS_XBAR__READ_LCL_MASK 0xff 134652fb57e7SAlex Deucher #define MC_CITF_CREDITS_XBAR__READ_LCL__SHIFT 0x0 134752fb57e7SAlex Deucher #define MC_CITF_CREDITS_XBAR__WRITE_LCL_MASK 0xff00 134852fb57e7SAlex Deucher #define MC_CITF_CREDITS_XBAR__WRITE_LCL__SHIFT 0x8 134952fb57e7SAlex Deucher #define MC_RD_GRP_LCL__CB0_MASK 0xf000 135052fb57e7SAlex Deucher #define MC_RD_GRP_LCL__CB0__SHIFT 0xc 135152fb57e7SAlex Deucher #define MC_RD_GRP_LCL__CBCMASK0_MASK 0xf0000 135252fb57e7SAlex Deucher #define MC_RD_GRP_LCL__CBCMASK0__SHIFT 0x10 135352fb57e7SAlex Deucher #define MC_RD_GRP_LCL__CBFMASK0_MASK 0xf00000 135452fb57e7SAlex Deucher #define MC_RD_GRP_LCL__CBFMASK0__SHIFT 0x14 135552fb57e7SAlex Deucher #define MC_RD_GRP_LCL__DB0_MASK 0xf000000 135652fb57e7SAlex Deucher #define MC_RD_GRP_LCL__DB0__SHIFT 0x18 135752fb57e7SAlex Deucher #define MC_RD_GRP_LCL__DBHTILE0_MASK 0xf0000000 135852fb57e7SAlex Deucher #define MC_RD_GRP_LCL__DBHTILE0__SHIFT 0x1c 135952fb57e7SAlex Deucher #define MC_WR_GRP_LCL__CB0_MASK 0xf 136052fb57e7SAlex Deucher #define MC_WR_GRP_LCL__CB0__SHIFT 0x0 136152fb57e7SAlex Deucher #define MC_WR_GRP_LCL__CBCMASK0_MASK 0xf0 136252fb57e7SAlex Deucher #define MC_WR_GRP_LCL__CBCMASK0__SHIFT 0x4 136352fb57e7SAlex Deucher #define MC_WR_GRP_LCL__CBFMASK0_MASK 0xf00 136452fb57e7SAlex Deucher #define MC_WR_GRP_LCL__CBFMASK0__SHIFT 0x8 136552fb57e7SAlex Deucher #define MC_WR_GRP_LCL__DB0_MASK 0xf000 136652fb57e7SAlex Deucher #define MC_WR_GRP_LCL__DB0__SHIFT 0xc 136752fb57e7SAlex Deucher #define MC_WR_GRP_LCL__DBHTILE0_MASK 0xf0000 136852fb57e7SAlex Deucher #define MC_WR_GRP_LCL__DBHTILE0__SHIFT 0x10 136952fb57e7SAlex Deucher #define MC_WR_GRP_LCL__SX0_MASK 0xf00000 137052fb57e7SAlex Deucher #define MC_WR_GRP_LCL__SX0__SHIFT 0x14 137152fb57e7SAlex Deucher #define MC_WR_GRP_LCL__CBIMMED0_MASK 0xf0000000 137252fb57e7SAlex Deucher #define MC_WR_GRP_LCL__CBIMMED0__SHIFT 0x1c 137352fb57e7SAlex Deucher #define MC_CITF_PERF_MON_CNTL2__CID_MASK 0xff 137452fb57e7SAlex Deucher #define MC_CITF_PERF_MON_CNTL2__CID__SHIFT 0x0 137552fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__CB_RD_BUSY_MASK 0x40 137652fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__CB_RD_BUSY__SHIFT 0x6 137752fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__DB_RD_BUSY_MASK 0x80 137852fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__DB_RD_BUSY__SHIFT 0x7 137952fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC0_RD_BUSY_MASK 0x100 138052fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC0_RD_BUSY__SHIFT 0x8 138152fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__VC0_RD_BUSY_MASK 0x200 138252fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__VC0_RD_BUSY__SHIFT 0x9 138352fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC1_RD_BUSY_MASK 0x400 138452fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC1_RD_BUSY__SHIFT 0xa 138552fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__VC1_RD_BUSY_MASK 0x800 138652fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__VC1_RD_BUSY__SHIFT 0xb 138752fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__CB_WR_BUSY_MASK 0x1000 138852fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__CB_WR_BUSY__SHIFT 0xc 138952fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__DB_WR_BUSY_MASK 0x2000 139052fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__DB_WR_BUSY__SHIFT 0xd 139152fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__SX_WR_BUSY_MASK 0x4000 139252fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__SX_WR_BUSY__SHIFT 0xe 139352fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC2_RD_BUSY_MASK 0x8000 139452fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC2_RD_BUSY__SHIFT 0xf 139552fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC0_WR_BUSY_MASK 0x10000 139652fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC0_WR_BUSY__SHIFT 0x10 139752fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC1_WR_BUSY_MASK 0x20000 139852fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC1_WR_BUSY__SHIFT 0x11 139952fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC2_WR_BUSY_MASK 0x40000 140052fb57e7SAlex Deucher #define MC_CITF_PERF_MON_RSLT2__TC2_WR_BUSY__SHIFT 0x12 140152fb57e7SAlex Deucher #define MC_CITF_MISC_RD_CG__ONDLY_MASK 0x3f 140252fb57e7SAlex Deucher #define MC_CITF_MISC_RD_CG__ONDLY__SHIFT 0x0 140352fb57e7SAlex Deucher #define MC_CITF_MISC_RD_CG__OFFDLY_MASK 0xfc0 140452fb57e7SAlex Deucher #define MC_CITF_MISC_RD_CG__OFFDLY__SHIFT 0x6 140552fb57e7SAlex Deucher #define MC_CITF_MISC_RD_CG__RDYDLY_MASK 0x3f000 140652fb57e7SAlex Deucher #define MC_CITF_MISC_RD_CG__RDYDLY__SHIFT 0xc 140752fb57e7SAlex Deucher #define MC_CITF_MISC_RD_CG__ENABLE_MASK 0x40000 140852fb57e7SAlex Deucher #define MC_CITF_MISC_RD_CG__ENABLE__SHIFT 0x12 140952fb57e7SAlex Deucher #define MC_CITF_MISC_RD_CG__MEM_LS_ENABLE_MASK 0x80000 141052fb57e7SAlex Deucher #define MC_CITF_MISC_RD_CG__MEM_LS_ENABLE__SHIFT 0x13 141152fb57e7SAlex Deucher #define MC_CITF_MISC_WR_CG__ONDLY_MASK 0x3f 141252fb57e7SAlex Deucher #define MC_CITF_MISC_WR_CG__ONDLY__SHIFT 0x0 141352fb57e7SAlex Deucher #define MC_CITF_MISC_WR_CG__OFFDLY_MASK 0xfc0 141452fb57e7SAlex Deucher #define MC_CITF_MISC_WR_CG__OFFDLY__SHIFT 0x6 141552fb57e7SAlex Deucher #define MC_CITF_MISC_WR_CG__RDYDLY_MASK 0x3f000 141652fb57e7SAlex Deucher #define MC_CITF_MISC_WR_CG__RDYDLY__SHIFT 0xc 141752fb57e7SAlex Deucher #define MC_CITF_MISC_WR_CG__ENABLE_MASK 0x40000 141852fb57e7SAlex Deucher #define MC_CITF_MISC_WR_CG__ENABLE__SHIFT 0x12 141952fb57e7SAlex Deucher #define MC_CITF_MISC_WR_CG__MEM_LS_ENABLE_MASK 0x80000 142052fb57e7SAlex Deucher #define MC_CITF_MISC_WR_CG__MEM_LS_ENABLE__SHIFT 0x13 142152fb57e7SAlex Deucher #define MC_CITF_MISC_VM_CG__ONDLY_MASK 0x3f 142252fb57e7SAlex Deucher #define MC_CITF_MISC_VM_CG__ONDLY__SHIFT 0x0 142352fb57e7SAlex Deucher #define MC_CITF_MISC_VM_CG__OFFDLY_MASK 0xfc0 142452fb57e7SAlex Deucher #define MC_CITF_MISC_VM_CG__OFFDLY__SHIFT 0x6 142552fb57e7SAlex Deucher #define MC_CITF_MISC_VM_CG__RDYDLY_MASK 0x3f000 142652fb57e7SAlex Deucher #define MC_CITF_MISC_VM_CG__RDYDLY__SHIFT 0xc 142752fb57e7SAlex Deucher #define MC_CITF_MISC_VM_CG__ENABLE_MASK 0x40000 142852fb57e7SAlex Deucher #define MC_CITF_MISC_VM_CG__ENABLE__SHIFT 0x12 142952fb57e7SAlex Deucher #define MC_CITF_MISC_VM_CG__MEM_LS_ENABLE_MASK 0x80000 143052fb57e7SAlex Deucher #define MC_CITF_MISC_VM_CG__MEM_LS_ENABLE__SHIFT 0x13 143152fb57e7SAlex Deucher #define MC_HUB_MISC_POWER__SRBM_GATE_OVERRIDE_MASK 0x4 143252fb57e7SAlex Deucher #define MC_HUB_MISC_POWER__SRBM_GATE_OVERRIDE__SHIFT 0x2 143352fb57e7SAlex Deucher #define MC_HUB_MISC_POWER__PM_BLACKOUT_CNTL_MASK 0x18 143452fb57e7SAlex Deucher #define MC_HUB_MISC_POWER__PM_BLACKOUT_CNTL__SHIFT 0x3 143552fb57e7SAlex Deucher #define MC_HUB_MISC_HUB_CG__ONDLY_MASK 0x3f 143652fb57e7SAlex Deucher #define MC_HUB_MISC_HUB_CG__ONDLY__SHIFT 0x0 143752fb57e7SAlex Deucher #define MC_HUB_MISC_HUB_CG__OFFDLY_MASK 0xfc0 143852fb57e7SAlex Deucher #define MC_HUB_MISC_HUB_CG__OFFDLY__SHIFT 0x6 143952fb57e7SAlex Deucher #define MC_HUB_MISC_HUB_CG__RDYDLY_MASK 0x3f000 144052fb57e7SAlex Deucher #define MC_HUB_MISC_HUB_CG__RDYDLY__SHIFT 0xc 144152fb57e7SAlex Deucher #define MC_HUB_MISC_HUB_CG__ENABLE_MASK 0x40000 144252fb57e7SAlex Deucher #define MC_HUB_MISC_HUB_CG__ENABLE__SHIFT 0x12 144352fb57e7SAlex Deucher #define MC_HUB_MISC_HUB_CG__MEM_LS_ENABLE_MASK 0x80000 144452fb57e7SAlex Deucher #define MC_HUB_MISC_HUB_CG__MEM_LS_ENABLE__SHIFT 0x13 144552fb57e7SAlex Deucher #define MC_HUB_MISC_VM_CG__ONDLY_MASK 0x3f 144652fb57e7SAlex Deucher #define MC_HUB_MISC_VM_CG__ONDLY__SHIFT 0x0 144752fb57e7SAlex Deucher #define MC_HUB_MISC_VM_CG__OFFDLY_MASK 0xfc0 144852fb57e7SAlex Deucher #define MC_HUB_MISC_VM_CG__OFFDLY__SHIFT 0x6 144952fb57e7SAlex Deucher #define MC_HUB_MISC_VM_CG__RDYDLY_MASK 0x3f000 145052fb57e7SAlex Deucher #define MC_HUB_MISC_VM_CG__RDYDLY__SHIFT 0xc 145152fb57e7SAlex Deucher #define MC_HUB_MISC_VM_CG__ENABLE_MASK 0x40000 145252fb57e7SAlex Deucher #define MC_HUB_MISC_VM_CG__ENABLE__SHIFT 0x12 145352fb57e7SAlex Deucher #define MC_HUB_MISC_VM_CG__MEM_LS_ENABLE_MASK 0x80000 145452fb57e7SAlex Deucher #define MC_HUB_MISC_VM_CG__MEM_LS_ENABLE__SHIFT 0x13 145552fb57e7SAlex Deucher #define MC_HUB_MISC_SIP_CG__ONDLY_MASK 0x3f 145652fb57e7SAlex Deucher #define MC_HUB_MISC_SIP_CG__ONDLY__SHIFT 0x0 145752fb57e7SAlex Deucher #define MC_HUB_MISC_SIP_CG__OFFDLY_MASK 0xfc0 145852fb57e7SAlex Deucher #define MC_HUB_MISC_SIP_CG__OFFDLY__SHIFT 0x6 145952fb57e7SAlex Deucher #define MC_HUB_MISC_SIP_CG__RDYDLY_MASK 0x3f000 146052fb57e7SAlex Deucher #define MC_HUB_MISC_SIP_CG__RDYDLY__SHIFT 0xc 146152fb57e7SAlex Deucher #define MC_HUB_MISC_SIP_CG__ENABLE_MASK 0x40000 146252fb57e7SAlex Deucher #define MC_HUB_MISC_SIP_CG__ENABLE__SHIFT 0x12 146352fb57e7SAlex Deucher #define MC_HUB_MISC_SIP_CG__MEM_LS_ENABLE_MASK 0x80000 146452fb57e7SAlex Deucher #define MC_HUB_MISC_SIP_CG__MEM_LS_ENABLE__SHIFT 0x13 146552fb57e7SAlex Deucher #define MC_HUB_MISC_DBG__SELECT0_MASK 0xf 146652fb57e7SAlex Deucher #define MC_HUB_MISC_DBG__SELECT0__SHIFT 0x0 146752fb57e7SAlex Deucher #define MC_HUB_MISC_DBG__SELECT1_MASK 0xf0 146852fb57e7SAlex Deucher #define MC_HUB_MISC_DBG__SELECT1__SHIFT 0x4 146952fb57e7SAlex Deucher #define MC_HUB_MISC_DBG__CTRL0_MASK 0x1f00 147052fb57e7SAlex Deucher #define MC_HUB_MISC_DBG__CTRL0__SHIFT 0x8 147152fb57e7SAlex Deucher #define MC_HUB_MISC_DBG__CTRL1_MASK 0x3e000 147252fb57e7SAlex Deucher #define MC_HUB_MISC_DBG__CTRL1__SHIFT 0xd 147352fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_READ_MASK 0x1 147452fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_READ__SHIFT 0x0 147552fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_WRITE_MASK 0x2 147652fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_WRITE__SHIFT 0x1 147752fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_HUB_RDREQ_MASK 0x4 147852fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_HUB_RDREQ__SHIFT 0x2 147952fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_HUB_RDRET_MASK 0x8 148052fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_HUB_RDRET__SHIFT 0x3 148152fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_HUB_WRREQ_MASK 0x10 148252fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_HUB_WRREQ__SHIFT 0x4 148352fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_HUB_WRRET_MASK 0x20 148452fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_HUB_WRRET__SHIFT 0x5 148552fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_RPB_READ_MASK 0x40 148652fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_RPB_READ__SHIFT 0x6 148752fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_RPB_WRITE_MASK 0x80 148852fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_RPB_WRITE__SHIFT 0x7 148952fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_MCD_READ_MASK 0x100 149052fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_MCD_READ__SHIFT 0x8 149152fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_MCD_WRITE_MASK 0x200 149252fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__OUTSTANDING_MCD_WRITE__SHIFT 0x9 149352fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__RPB_BUSY_MASK 0x400 149452fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__RPB_BUSY__SHIFT 0xa 149552fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__WRITE_DEADLOCK_WARNING_MASK 0x800 149652fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__WRITE_DEADLOCK_WARNING__SHIFT 0xb 149752fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__READ_DEADLOCK_WARNING_MASK 0x1000 149852fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__READ_DEADLOCK_WARNING__SHIFT 0xc 149952fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__GFX_BUSY_MASK 0x2000 150052fb57e7SAlex Deucher #define MC_HUB_MISC_STATUS__GFX_BUSY__SHIFT 0xd 150152fb57e7SAlex Deucher #define MC_HUB_MISC_OVERRIDE__IDLE_MASK 0x3 150252fb57e7SAlex Deucher #define MC_HUB_MISC_OVERRIDE__IDLE__SHIFT 0x0 150352fb57e7SAlex Deucher #define MC_HUB_MISC_FRAMING__BITS_MASK 0xffffffff 150452fb57e7SAlex Deucher #define MC_HUB_MISC_FRAMING__BITS__SHIFT 0x0 150552fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__JUMPAHEAD_GBL0_MASK 0x2 150652fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__JUMPAHEAD_GBL0__SHIFT 0x1 150752fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__JUMPAHEAD_GBL1_MASK 0x4 150852fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__JUMPAHEAD_GBL1__SHIFT 0x2 150952fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__JUMPAHEAD_INTERNAL_MASK 0x8 151052fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__JUMPAHEAD_INTERNAL__SHIFT 0x3 151152fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__OVERRIDE_STALL_ENABLE_MASK 0x10 151252fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__OVERRIDE_STALL_ENABLE__SHIFT 0x4 151352fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__DEBUG_REG_MASK 0x1fe0 151452fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__DEBUG_REG__SHIFT 0x5 151552fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__DISABLE_SELF_INIT_GBL0_MASK 0x2000 151652fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__DISABLE_SELF_INIT_GBL0__SHIFT 0xd 151752fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__DISABLE_SELF_INIT_GBL1_MASK 0x4000 151852fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__DISABLE_SELF_INIT_GBL1__SHIFT 0xe 151952fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__DISABLE_SELF_INIT_INTERNAL_MASK 0x8000 152052fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__DISABLE_SELF_INIT_INTERNAL__SHIFT 0xf 152152fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__FAIR_CH_SW_MASK 0x10000 152252fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__FAIR_CH_SW__SHIFT 0x10 152352fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__LCLWRREQ_BYPASS_MASK 0x20000 152452fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__LCLWRREQ_BYPASS__SHIFT 0x11 152552fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__DISP_WAIT_EOP_MASK 0x40000 152652fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__DISP_WAIT_EOP__SHIFT 0x12 152752fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__MCD_WAIT_EOP_MASK 0x80000 152852fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__MCD_WAIT_EOP__SHIFT 0x13 152952fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__SIP_WAIT_EOP_MASK 0x100000 153052fb57e7SAlex Deucher #define MC_HUB_WDP_CNTL__SIP_WAIT_EOP__SHIFT 0x14 153152fb57e7SAlex Deucher #define MC_HUB_WDP_ERR__MGPU1_TARG_SYS_MASK 0x1 153252fb57e7SAlex Deucher #define MC_HUB_WDP_ERR__MGPU1_TARG_SYS__SHIFT 0x0 153352fb57e7SAlex Deucher #define MC_HUB_WDP_ERR__MGPU2_TARG_SYS_MASK 0x2 153452fb57e7SAlex Deucher #define MC_HUB_WDP_ERR__MGPU2_TARG_SYS__SHIFT 0x1 153552fb57e7SAlex Deucher #define MC_HUB_WDP_BP__ENABLE_MASK 0x1 153652fb57e7SAlex Deucher #define MC_HUB_WDP_BP__ENABLE__SHIFT 0x0 153752fb57e7SAlex Deucher #define MC_HUB_WDP_BP__RDRET_MASK 0x3fffe 153852fb57e7SAlex Deucher #define MC_HUB_WDP_BP__RDRET__SHIFT 0x1 153952fb57e7SAlex Deucher #define MC_HUB_WDP_BP__WRREQ_MASK 0x3ffc0000 154052fb57e7SAlex Deucher #define MC_HUB_WDP_BP__WRREQ__SHIFT 0x12 154152fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__SIP_AVAIL_MASK 0x1 154252fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__SIP_AVAIL__SHIFT 0x0 154352fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__MCDW_RD_AVAIL_MASK 0x2 154452fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__MCDW_RD_AVAIL__SHIFT 0x1 154552fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__MCDX_RD_AVAIL_MASK 0x4 154652fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__MCDX_RD_AVAIL__SHIFT 0x2 154752fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__MCDY_RD_AVAIL_MASK 0x8 154852fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__MCDY_RD_AVAIL__SHIFT 0x3 154952fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__MCDZ_RD_AVAIL_MASK 0x10 155052fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__MCDZ_RD_AVAIL__SHIFT 0x4 155152fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL0_VM_FULL_MASK 0x20 155252fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL0_VM_FULL__SHIFT 0x5 155352fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL0_STOR_FULL_MASK 0x40 155452fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL0_STOR_FULL__SHIFT 0x6 155552fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL0_BYPASS_STOR_FULL_MASK 0x80 155652fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL0_BYPASS_STOR_FULL__SHIFT 0x7 155752fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL1_VM_FULL_MASK 0x100 155852fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL1_VM_FULL__SHIFT 0x8 155952fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL1_STOR_FULL_MASK 0x200 156052fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL1_STOR_FULL__SHIFT 0x9 156152fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL1_BYPASS_STOR_FULL_MASK 0x400 156252fb57e7SAlex Deucher #define MC_HUB_WDP_STATUS__GBL1_BYPASS_STOR_FULL__SHIFT 0xa 156352fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__SIP_AVAIL_MASK 0x1 156452fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__SIP_AVAIL__SHIFT 0x0 156552fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__MCDW_RD_AVAIL_MASK 0x2 156652fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__MCDW_RD_AVAIL__SHIFT 0x1 156752fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__MCDX_RD_AVAIL_MASK 0x4 156852fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__MCDX_RD_AVAIL__SHIFT 0x2 156952fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__MCDY_RD_AVAIL_MASK 0x8 157052fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__MCDY_RD_AVAIL__SHIFT 0x3 157152fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__MCDZ_RD_AVAIL_MASK 0x10 157252fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__MCDZ_RD_AVAIL__SHIFT 0x4 157352fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL0_VM_FULL_MASK 0x20 157452fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL0_VM_FULL__SHIFT 0x5 157552fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL0_STOR_FULL_MASK 0x40 157652fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL0_STOR_FULL__SHIFT 0x6 157752fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL0_BYPASS_STOR_FULL_MASK 0x80 157852fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL0_BYPASS_STOR_FULL__SHIFT 0x7 157952fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL1_VM_FULL_MASK 0x100 158052fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL1_VM_FULL__SHIFT 0x8 158152fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL1_STOR_FULL_MASK 0x200 158252fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL1_STOR_FULL__SHIFT 0x9 158352fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL1_BYPASS_STOR_FULL_MASK 0x400 158452fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__GBL1_BYPASS_STOR_FULL__SHIFT 0xa 158552fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__PWRXPRESS_ERR_MASK 0x800 158652fb57e7SAlex Deucher #define MC_HUB_RDREQ_STATUS__PWRXPRESS_ERR__SHIFT 0xb 158752fb57e7SAlex Deucher #define MC_HUB_WRRET_STATUS__MCDW_AVAIL_MASK 0x1 158852fb57e7SAlex Deucher #define MC_HUB_WRRET_STATUS__MCDW_AVAIL__SHIFT 0x0 158952fb57e7SAlex Deucher #define MC_HUB_WRRET_STATUS__MCDX_AVAIL_MASK 0x2 159052fb57e7SAlex Deucher #define MC_HUB_WRRET_STATUS__MCDX_AVAIL__SHIFT 0x1 159152fb57e7SAlex Deucher #define MC_HUB_WRRET_STATUS__MCDY_AVAIL_MASK 0x4 159252fb57e7SAlex Deucher #define MC_HUB_WRRET_STATUS__MCDY_AVAIL__SHIFT 0x2 159352fb57e7SAlex Deucher #define MC_HUB_WRRET_STATUS__MCDZ_AVAIL_MASK 0x8 159452fb57e7SAlex Deucher #define MC_HUB_WRRET_STATUS__MCDZ_AVAIL__SHIFT 0x3 159552fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__REMOTE_BLACKOUT_MASK 0x1 159652fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__REMOTE_BLACKOUT__SHIFT 0x0 159752fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__JUMPAHEAD_GBL0_MASK 0x4 159852fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__JUMPAHEAD_GBL0__SHIFT 0x2 159952fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__JUMPAHEAD_GBL1_MASK 0x8 160052fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__JUMPAHEAD_GBL1__SHIFT 0x3 160152fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__OVERRIDE_STALL_ENABLE_MASK 0x10 160252fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__OVERRIDE_STALL_ENABLE__SHIFT 0x4 160352fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__MCDW_STALL_MODE_MASK 0x20 160452fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__MCDW_STALL_MODE__SHIFT 0x5 160552fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__MCDX_STALL_MODE_MASK 0x40 160652fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__MCDX_STALL_MODE__SHIFT 0x6 160752fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__MCDY_STALL_MODE_MASK 0x80 160852fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__MCDY_STALL_MODE__SHIFT 0x7 160952fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__MCDZ_STALL_MODE_MASK 0x100 161052fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__MCDZ_STALL_MODE__SHIFT 0x8 161152fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__BREAK_HDP_DEADLOCK_MASK 0x200 161252fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__BREAK_HDP_DEADLOCK__SHIFT 0x9 161352fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__DEBUG_REG_MASK 0x1fc00 161452fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__DEBUG_REG__SHIFT 0xa 161552fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__DISABLE_SELF_INIT_GBL0_MASK 0x20000 161652fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__DISABLE_SELF_INIT_GBL0__SHIFT 0x11 161752fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__DISABLE_SELF_INIT_GBL1_MASK 0x40000 161852fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__DISABLE_SELF_INIT_GBL1__SHIFT 0x12 161952fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__PWRXPRESS_MODE_MASK 0x80000 162052fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__PWRXPRESS_MODE__SHIFT 0x13 162152fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__ACPG_HP_TO_MCD_OVERRIDE_MASK 0x100000 162252fb57e7SAlex Deucher #define MC_HUB_RDREQ_CNTL__ACPG_HP_TO_MCD_OVERRIDE__SHIFT 0x14 162352fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__JUMPAHEAD_MASK 0x1 162452fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__JUMPAHEAD__SHIFT 0x0 162552fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__BP_MASK 0x1ffffe 162652fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__BP__SHIFT 0x1 162752fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__BP_ENABLE_MASK 0x200000 162852fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__BP_ENABLE__SHIFT 0x15 162952fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__DEBUG_REG_MASK 0x3fc00000 163052fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__DEBUG_REG__SHIFT 0x16 163152fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__DISABLE_SELF_INIT_MASK 0x40000000 163252fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__DISABLE_SELF_INIT__SHIFT 0x1e 163352fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__FAIR_CH_SW_MASK 0x80000000 163452fb57e7SAlex Deucher #define MC_HUB_WRRET_CNTL__FAIR_CH_SW__SHIFT 0x1f 163552fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP0_DECREMENT_MASK 0x7 163652fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP0_DECREMENT__SHIFT 0x0 163752fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP1_DECREMENT_MASK 0x38 163852fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP1_DECREMENT__SHIFT 0x3 163952fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP2_DECREMENT_MASK 0x1c0 164052fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP2_DECREMENT__SHIFT 0x6 164152fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP3_DECREMENT_MASK 0xe00 164252fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP3_DECREMENT__SHIFT 0x9 164352fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP4_DECREMENT_MASK 0x7000 164452fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP4_DECREMENT__SHIFT 0xc 164552fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP5_DECREMENT_MASK 0x38000 164652fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP5_DECREMENT__SHIFT 0xf 164752fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP6_DECREMENT_MASK 0x1c0000 164852fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP6_DECREMENT__SHIFT 0x12 164952fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP7_DECREMENT_MASK 0xe00000 165052fb57e7SAlex Deucher #define MC_HUB_RDREQ_WTM_CNTL__GROUP7_DECREMENT__SHIFT 0x15 165152fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP0_DECREMENT_MASK 0x7 165252fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP0_DECREMENT__SHIFT 0x0 165352fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP1_DECREMENT_MASK 0x38 165452fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP1_DECREMENT__SHIFT 0x3 165552fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP2_DECREMENT_MASK 0x1c0 165652fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP2_DECREMENT__SHIFT 0x6 165752fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP3_DECREMENT_MASK 0xe00 165852fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP3_DECREMENT__SHIFT 0x9 165952fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP4_DECREMENT_MASK 0x7000 166052fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP4_DECREMENT__SHIFT 0xc 166152fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP5_DECREMENT_MASK 0x38000 166252fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP5_DECREMENT__SHIFT 0xf 166352fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP6_DECREMENT_MASK 0x1c0000 166452fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP6_DECREMENT__SHIFT 0x12 166552fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP7_DECREMENT_MASK 0xe00000 166652fb57e7SAlex Deucher #define MC_HUB_WDP_WTM_CNTL__GROUP7_DECREMENT__SHIFT 0x15 166752fb57e7SAlex Deucher #define MC_HUB_WDP_CREDITS__VM0_MASK 0xff 166852fb57e7SAlex Deucher #define MC_HUB_WDP_CREDITS__VM0__SHIFT 0x0 166952fb57e7SAlex Deucher #define MC_HUB_WDP_CREDITS__VM1_MASK 0xff00 167052fb57e7SAlex Deucher #define MC_HUB_WDP_CREDITS__VM1__SHIFT 0x8 167152fb57e7SAlex Deucher #define MC_HUB_WDP_CREDITS__STOR0_MASK 0xff0000 167252fb57e7SAlex Deucher #define MC_HUB_WDP_CREDITS__STOR0__SHIFT 0x10 167352fb57e7SAlex Deucher #define MC_HUB_WDP_CREDITS__STOR1_MASK 0xff000000 167452fb57e7SAlex Deucher #define MC_HUB_WDP_CREDITS__STOR1__SHIFT 0x18 167552fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU2__CID2_MASK 0xff 167652fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU2__CID2__SHIFT 0x0 167752fb57e7SAlex Deucher #define MC_HUB_WDP_GBL0__MAXBURST_MASK 0xf 167852fb57e7SAlex Deucher #define MC_HUB_WDP_GBL0__MAXBURST__SHIFT 0x0 167952fb57e7SAlex Deucher #define MC_HUB_WDP_GBL0__LAZY_TIMER_MASK 0xf0 168052fb57e7SAlex Deucher #define MC_HUB_WDP_GBL0__LAZY_TIMER__SHIFT 0x4 168152fb57e7SAlex Deucher #define MC_HUB_WDP_GBL0__STALL_THRESHOLD_MASK 0xff00 168252fb57e7SAlex Deucher #define MC_HUB_WDP_GBL0__STALL_THRESHOLD__SHIFT 0x8 168352fb57e7SAlex Deucher #define MC_HUB_WDP_GBL0__STALL_MODE_MASK 0x10000 168452fb57e7SAlex Deucher #define MC_HUB_WDP_GBL0__STALL_MODE__SHIFT 0x10 168552fb57e7SAlex Deucher #define MC_HUB_WDP_GBL1__MAXBURST_MASK 0xf 168652fb57e7SAlex Deucher #define MC_HUB_WDP_GBL1__MAXBURST__SHIFT 0x0 168752fb57e7SAlex Deucher #define MC_HUB_WDP_GBL1__LAZY_TIMER_MASK 0xf0 168852fb57e7SAlex Deucher #define MC_HUB_WDP_GBL1__LAZY_TIMER__SHIFT 0x4 168952fb57e7SAlex Deucher #define MC_HUB_WDP_GBL1__STALL_THRESHOLD_MASK 0xff00 169052fb57e7SAlex Deucher #define MC_HUB_WDP_GBL1__STALL_THRESHOLD__SHIFT 0x8 169152fb57e7SAlex Deucher #define MC_HUB_WDP_GBL1__STALL_MODE_MASK 0x10000 169252fb57e7SAlex Deucher #define MC_HUB_WDP_GBL1__STALL_MODE__SHIFT 0x10 169352fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU__STOR_MASK 0xff 169452fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU__STOR__SHIFT 0x0 169552fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU__CID_MASK 0xff00 169652fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU__CID__SHIFT 0x8 169752fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU__MGPU_PRIORITY_TIME_MASK 0x7f0000 169852fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU__MGPU_PRIORITY_TIME__SHIFT 0x10 169952fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU__ENABLE_MASK 0x800000 170052fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU__ENABLE__SHIFT 0x17 170152fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU__OTH_PRIORITY_TIME_MASK 0x7f000000 170252fb57e7SAlex Deucher #define MC_HUB_WDP_MGPU__OTH_PRIORITY_TIME__SHIFT 0x18 170352fb57e7SAlex Deucher #define MC_HUB_RDREQ_CREDITS__VM0_MASK 0xff 170452fb57e7SAlex Deucher #define MC_HUB_RDREQ_CREDITS__VM0__SHIFT 0x0 170552fb57e7SAlex Deucher #define MC_HUB_RDREQ_CREDITS__VM1_MASK 0xff00 170652fb57e7SAlex Deucher #define MC_HUB_RDREQ_CREDITS__VM1__SHIFT 0x8 170752fb57e7SAlex Deucher #define MC_HUB_RDREQ_CREDITS__STOR0_MASK 0xff0000 170852fb57e7SAlex Deucher #define MC_HUB_RDREQ_CREDITS__STOR0__SHIFT 0x10 170952fb57e7SAlex Deucher #define MC_HUB_RDREQ_CREDITS__STOR1_MASK 0xff000000 171052fb57e7SAlex Deucher #define MC_HUB_RDREQ_CREDITS__STOR1__SHIFT 0x18 171152fb57e7SAlex Deucher #define MC_HUB_RDREQ_CREDITS2__STOR1_PRI_MASK 0xff 171252fb57e7SAlex Deucher #define MC_HUB_RDREQ_CREDITS2__STOR1_PRI__SHIFT 0x0 171352fb57e7SAlex Deucher #define MC_HUB_SHARED_DAGB_DLY__DLY_MASK 0x3f 171452fb57e7SAlex Deucher #define MC_HUB_SHARED_DAGB_DLY__DLY__SHIFT 0x0 171552fb57e7SAlex Deucher #define MC_HUB_SHARED_DAGB_DLY__CLI_MASK 0x1f0000 171652fb57e7SAlex Deucher #define MC_HUB_SHARED_DAGB_DLY__CLI__SHIFT 0x10 171752fb57e7SAlex Deucher #define MC_HUB_SHARED_DAGB_DLY__POS_MASK 0x1f000000 171852fb57e7SAlex Deucher #define MC_HUB_SHARED_DAGB_DLY__POS__SHIFT 0x18 171952fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_GFX_READ_MASK 0x1 172052fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_GFX_READ__SHIFT 0x0 172152fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_GFX_WRITE_MASK 0x2 172252fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_GFX_WRITE__SHIFT 0x1 172352fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_RLC_READ_MASK 0x4 172452fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_RLC_READ__SHIFT 0x2 172552fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_RLC_WRITE_MASK 0x8 172652fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_RLC_WRITE__SHIFT 0x3 172752fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SDMA0_READ_MASK 0x10 172852fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SDMA0_READ__SHIFT 0x4 172952fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SDMA0_WRITE_MASK 0x20 173052fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SDMA0_WRITE__SHIFT 0x5 173152fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SDMA1_READ_MASK 0x40 173252fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SDMA1_READ__SHIFT 0x6 173352fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SDMA1_WRITE_MASK 0x80 173452fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SDMA1_WRITE__SHIFT 0x7 173552fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_DISP_READ_MASK 0x100 173652fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_DISP_READ__SHIFT 0x8 173752fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_DISP_WRITE_MASK 0x200 173852fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_DISP_WRITE__SHIFT 0x9 173952fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_UVD_READ_MASK 0x400 174052fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_UVD_READ__SHIFT 0xa 174152fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_UVD_WRITE_MASK 0x800 174252fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_UVD_WRITE__SHIFT 0xb 174352fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SMU_READ_MASK 0x1000 174452fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SMU_READ__SHIFT 0xc 174552fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SMU_WRITE_MASK 0x2000 174652fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_SMU_WRITE__SHIFT 0xd 174752fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_HDP_READ_MASK 0x4000 174852fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_HDP_READ__SHIFT 0xe 174952fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_HDP_WRITE_MASK 0x8000 175052fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_HDP_WRITE__SHIFT 0xf 175152fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_OTH_READ_MASK 0x10000 175252fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_OTH_READ__SHIFT 0x10 175352fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_OTH_WRITE_MASK 0x20000 175452fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_OTH_WRITE__SHIFT 0x11 175552fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_VMC_READ_MASK 0x40000 175652fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_VMC_READ__SHIFT 0x12 175752fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_VMC_WRITE_MASK 0x80000 175852fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_VMC_WRITE__SHIFT 0x13 175952fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_IA_READ_MASK 0x100000 176052fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_IA_READ__SHIFT 0x14 176152fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_IA_WRITE_MASK 0x200000 176252fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_IA_WRITE__SHIFT 0x15 176352fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_VCE_READ_MASK 0x400000 176452fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_VCE_READ__SHIFT 0x16 176552fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_VCE_WRITE_MASK 0x800000 176652fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_VCE_WRITE__SHIFT 0x17 176752fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_ACP_READ_MASK 0x1000000 176852fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_ACP_READ__SHIFT 0x18 176952fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_ACP_WRITE_MASK 0x2000000 177052fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_ACP_WRITE__SHIFT 0x19 177152fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_CP_READ_MASK 0x4000000 177252fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_CP_READ__SHIFT 0x1a 177352fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_CP_WRITE_MASK 0x8000000 177452fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_CP_WRITE__SHIFT 0x1b 177552fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_XDMA_READ_MASK 0x10000000 177652fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_XDMA_READ__SHIFT 0x1c 177752fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_XDMA_WRITE_MASK 0x20000000 177852fb57e7SAlex Deucher #define MC_HUB_MISC_IDLE_STATUS__OUTSTANDING_XDMA_WRITE__SHIFT 0x1d 177952fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF_LIMIT__ENABLE_MASK 0x3 178052fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF_LIMIT__ENABLE__SHIFT 0x0 178152fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF_LIMIT__LIMIT_COUNT_MASK 0x7c 178252fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF_LIMIT__LIMIT_COUNT__SHIFT 0x2 178352fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG_LIMIT__ENABLE_MASK 0x3 178452fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG_LIMIT__ENABLE__SHIFT 0x0 178552fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG_LIMIT__LIMIT_COUNT_MASK 0x7c 178652fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG_LIMIT__LIMIT_COUNT__SHIFT 0x2 178752fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__ENABLE_MASK 0x1 178852fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__ENABLE__SHIFT 0x0 178952fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__PRESCALE_MASK 0x6 179052fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__PRESCALE__SHIFT 0x1 179152fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__BLACKOUT_EXEMPT_MASK 0x8 179252fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__BLACKOUT_EXEMPT__SHIFT 0x3 179352fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__STALL_MODE_MASK 0x30 179452fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__STALL_MODE__SHIFT 0x4 179552fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__STALL_OVERRIDE_MASK 0x40 179652fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__STALL_OVERRIDE__SHIFT 0x6 179752fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__MAXBURST_MASK 0x780 179852fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__MAXBURST__SHIFT 0x7 179952fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__LAZY_TIMER_MASK 0x7800 180052fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__LAZY_TIMER__SHIFT 0xb 180152fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__STALL_OVERRIDE_WTM_MASK 0x8000 180252fb57e7SAlex Deucher #define MC_HUB_WDP_SH2__STALL_OVERRIDE_WTM__SHIFT 0xf 180352fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__ENABLE_MASK 0x1 180452fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__ENABLE__SHIFT 0x0 180552fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__PRESCALE_MASK 0x6 180652fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__PRESCALE__SHIFT 0x1 180752fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__BLACKOUT_EXEMPT_MASK 0x8 180852fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__BLACKOUT_EXEMPT__SHIFT 0x3 180952fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__STALL_MODE_MASK 0x30 181052fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__STALL_MODE__SHIFT 0x4 181152fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__STALL_OVERRIDE_MASK 0x40 181252fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__STALL_OVERRIDE__SHIFT 0x6 181352fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__MAXBURST_MASK 0x780 181452fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__MAXBURST__SHIFT 0x7 181552fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__LAZY_TIMER_MASK 0x7800 181652fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__LAZY_TIMER__SHIFT 0xb 181752fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__STALL_OVERRIDE_WTM_MASK 0x8000 181852fb57e7SAlex Deucher #define MC_HUB_WDP_SH3__STALL_OVERRIDE_WTM__SHIFT 0xf 181952fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__ENABLE_MASK 0x1 182052fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__ENABLE__SHIFT 0x0 182152fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__PRESCALE_MASK 0x6 182252fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__PRESCALE__SHIFT 0x1 182352fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__BLACKOUT_EXEMPT_MASK 0x8 182452fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__BLACKOUT_EXEMPT__SHIFT 0x3 182552fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__STALL_MODE_MASK 0x30 182652fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__STALL_MODE__SHIFT 0x4 182752fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__STALL_OVERRIDE_MASK 0x40 182852fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__STALL_OVERRIDE__SHIFT 0x6 182952fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__MAXBURST_MASK 0x780 183052fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__MAXBURST__SHIFT 0x7 183152fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__LAZY_TIMER_MASK 0x7800 183252fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__LAZY_TIMER__SHIFT 0xb 183352fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__STALL_OVERRIDE_WTM_MASK 0x8000 183452fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA0__STALL_OVERRIDE_WTM__SHIFT 0xf 183552fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__ENABLE_MASK 0x1 183652fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__ENABLE__SHIFT 0x0 183752fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__PRESCALE_MASK 0x6 183852fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__PRESCALE__SHIFT 0x1 183952fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__BLACKOUT_EXEMPT_MASK 0x8 184052fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__BLACKOUT_EXEMPT__SHIFT 0x3 184152fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__STALL_MODE_MASK 0x30 184252fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__STALL_MODE__SHIFT 0x4 184352fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__STALL_OVERRIDE_MASK 0x40 184452fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__STALL_OVERRIDE__SHIFT 0x6 184552fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__MAXBURST_MASK 0x780 184652fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__MAXBURST__SHIFT 0x7 184752fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__LAZY_TIMER_MASK 0x7800 184852fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__LAZY_TIMER__SHIFT 0xb 184952fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__STALL_OVERRIDE_WTM_MASK 0x8000 185052fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA1__STALL_OVERRIDE_WTM__SHIFT 0xf 185152fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__ENABLE_MASK 0x1 185252fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__ENABLE__SHIFT 0x0 185352fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__BLACKOUT_EXEMPT_MASK 0x2 185452fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__BLACKOUT_EXEMPT__SHIFT 0x1 185552fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__BUS_MASK 0x4 185652fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__BUS__SHIFT 0x2 185752fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__MAXBURST_MASK 0x78 185852fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__MAXBURST__SHIFT 0x3 185952fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__LAZY_TIMER_MASK 0x780 186052fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__LAZY_TIMER__SHIFT 0x7 186152fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__ASK_CREDITS_MASK 0x3f800 186252fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__ASK_CREDITS__SHIFT 0xb 186352fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__DISPLAY_CREDITS_MASK 0x1fc0000 186452fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__DISPLAY_CREDITS__SHIFT 0x12 186552fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__STALL_THRESHOLD_MASK 0xfe000000 186652fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDW__STALL_THRESHOLD__SHIFT 0x19 186752fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__ENABLE_MASK 0x1 186852fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__ENABLE__SHIFT 0x0 186952fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__BLACKOUT_EXEMPT_MASK 0x2 187052fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__BLACKOUT_EXEMPT__SHIFT 0x1 187152fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__BUS_MASK 0x4 187252fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__BUS__SHIFT 0x2 187352fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__MAXBURST_MASK 0x78 187452fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__MAXBURST__SHIFT 0x3 187552fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__LAZY_TIMER_MASK 0x780 187652fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__LAZY_TIMER__SHIFT 0x7 187752fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__ASK_CREDITS_MASK 0x3f800 187852fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__ASK_CREDITS__SHIFT 0xb 187952fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__DISPLAY_CREDITS_MASK 0x1fc0000 188052fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__DISPLAY_CREDITS__SHIFT 0x12 188152fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__STALL_THRESHOLD_MASK 0xfe000000 188252fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDX__STALL_THRESHOLD__SHIFT 0x19 188352fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__ENABLE_MASK 0x1 188452fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__ENABLE__SHIFT 0x0 188552fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__BLACKOUT_EXEMPT_MASK 0x2 188652fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__BLACKOUT_EXEMPT__SHIFT 0x1 188752fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__BUS_MASK 0x4 188852fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__BUS__SHIFT 0x2 188952fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__MAXBURST_MASK 0x78 189052fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__MAXBURST__SHIFT 0x3 189152fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__LAZY_TIMER_MASK 0x780 189252fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__LAZY_TIMER__SHIFT 0x7 189352fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__ASK_CREDITS_MASK 0x3f800 189452fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__ASK_CREDITS__SHIFT 0xb 189552fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__DISPLAY_CREDITS_MASK 0x1fc0000 189652fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__DISPLAY_CREDITS__SHIFT 0x12 189752fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__STALL_THRESHOLD_MASK 0xfe000000 189852fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDY__STALL_THRESHOLD__SHIFT 0x19 189952fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__ENABLE_MASK 0x1 190052fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__ENABLE__SHIFT 0x0 190152fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__BLACKOUT_EXEMPT_MASK 0x2 190252fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__BLACKOUT_EXEMPT__SHIFT 0x1 190352fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__BUS_MASK 0x4 190452fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__BUS__SHIFT 0x2 190552fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__MAXBURST_MASK 0x78 190652fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__MAXBURST__SHIFT 0x3 190752fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__LAZY_TIMER_MASK 0x780 190852fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__LAZY_TIMER__SHIFT 0x7 190952fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__ASK_CREDITS_MASK 0x3f800 191052fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__ASK_CREDITS__SHIFT 0xb 191152fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__DISPLAY_CREDITS_MASK 0x1fc0000 191252fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__DISPLAY_CREDITS__SHIFT 0x12 191352fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__STALL_THRESHOLD_MASK 0xfe000000 191452fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCDZ__STALL_THRESHOLD__SHIFT 0x19 191552fb57e7SAlex Deucher #define MC_HUB_RDREQ_SIP__ASK_CREDITS_MASK 0x7f 191652fb57e7SAlex Deucher #define MC_HUB_RDREQ_SIP__ASK_CREDITS__SHIFT 0x0 191752fb57e7SAlex Deucher #define MC_HUB_RDREQ_SIP__DUMMY_MASK 0x80 191852fb57e7SAlex Deucher #define MC_HUB_RDREQ_SIP__DUMMY__SHIFT 0x7 191952fb57e7SAlex Deucher #define MC_HUB_RDREQ_SIP__DISPLAY_CREDITS_MASK 0x7f00 192052fb57e7SAlex Deucher #define MC_HUB_RDREQ_SIP__DISPLAY_CREDITS__SHIFT 0x8 192152fb57e7SAlex Deucher #define MC_HUB_RDREQ_GBL0__STALL_THRESHOLD_MASK 0xff 192252fb57e7SAlex Deucher #define MC_HUB_RDREQ_GBL0__STALL_THRESHOLD__SHIFT 0x0 192352fb57e7SAlex Deucher #define MC_HUB_RDREQ_GBL1__STALL_THRESHOLD_MASK 0xff 192452fb57e7SAlex Deucher #define MC_HUB_RDREQ_GBL1__STALL_THRESHOLD__SHIFT 0x0 192552fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__ENABLE_MASK 0x1 192652fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__ENABLE__SHIFT 0x0 192752fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__PRESCALE_MASK 0x6 192852fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__PRESCALE__SHIFT 0x1 192952fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__BLACKOUT_EXEMPT_MASK 0x8 193052fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__BLACKOUT_EXEMPT__SHIFT 0x3 193152fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__STALL_MODE_MASK 0x30 193252fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__STALL_MODE__SHIFT 0x4 193352fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__STALL_OVERRIDE_MASK 0x40 193452fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__STALL_OVERRIDE__SHIFT 0x6 193552fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__MAXBURST_MASK 0x780 193652fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__MAXBURST__SHIFT 0x7 193752fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__LAZY_TIMER_MASK 0x7800 193852fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__LAZY_TIMER__SHIFT 0xb 193952fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__STALL_OVERRIDE_WTM_MASK 0x8000 194052fb57e7SAlex Deucher #define MC_HUB_RDREQ_SMU__STALL_OVERRIDE_WTM__SHIFT 0xf 194152fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__ENABLE_MASK 0x1 194252fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__ENABLE__SHIFT 0x0 194352fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__PRESCALE_MASK 0x6 194452fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__PRESCALE__SHIFT 0x1 194552fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__BLACKOUT_EXEMPT_MASK 0x8 194652fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__BLACKOUT_EXEMPT__SHIFT 0x3 194752fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__STALL_MODE_MASK 0x30 194852fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__STALL_MODE__SHIFT 0x4 194952fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__STALL_OVERRIDE_MASK 0x40 195052fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__STALL_OVERRIDE__SHIFT 0x6 195152fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__MAXBURST_MASK 0x780 195252fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__MAXBURST__SHIFT 0x7 195352fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__LAZY_TIMER_MASK 0x7800 195452fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__LAZY_TIMER__SHIFT 0xb 195552fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__STALL_OVERRIDE_WTM_MASK 0x8000 195652fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPG__STALL_OVERRIDE_WTM__SHIFT 0xf 195752fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__ENABLE_MASK 0x1 195852fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__ENABLE__SHIFT 0x0 195952fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__PRESCALE_MASK 0x6 196052fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__PRESCALE__SHIFT 0x1 196152fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__BLACKOUT_EXEMPT_MASK 0x8 196252fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__BLACKOUT_EXEMPT__SHIFT 0x3 196352fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__STALL_MODE_MASK 0x30 196452fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__STALL_MODE__SHIFT 0x4 196552fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__STALL_OVERRIDE_MASK 0x40 196652fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__STALL_OVERRIDE__SHIFT 0x6 196752fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__MAXBURST_MASK 0x780 196852fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__MAXBURST__SHIFT 0x7 196952fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__LAZY_TIMER_MASK 0x7800 197052fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__LAZY_TIMER__SHIFT 0xb 197152fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__STALL_OVERRIDE_WTM_MASK 0x8000 197252fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA0__STALL_OVERRIDE_WTM__SHIFT 0xf 197352fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__ENABLE_MASK 0x1 197452fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__ENABLE__SHIFT 0x0 197552fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__PRESCALE_MASK 0x6 197652fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__PRESCALE__SHIFT 0x1 197752fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__BLACKOUT_EXEMPT_MASK 0x8 197852fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__BLACKOUT_EXEMPT__SHIFT 0x3 197952fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__STALL_MODE_MASK 0x30 198052fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__STALL_MODE__SHIFT 0x4 198152fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__STALL_OVERRIDE_MASK 0x40 198252fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__STALL_OVERRIDE__SHIFT 0x6 198352fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__MAXBURST_MASK 0x780 198452fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__MAXBURST__SHIFT 0x7 198552fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__LAZY_TIMER_MASK 0x7800 198652fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__LAZY_TIMER__SHIFT 0xb 198752fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__STALL_OVERRIDE_WTM_MASK 0x8000 198852fb57e7SAlex Deucher #define MC_HUB_RDREQ_HDP__STALL_OVERRIDE_WTM__SHIFT 0xf 198952fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__ENABLE_MASK 0x1 199052fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__ENABLE__SHIFT 0x0 199152fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__PRESCALE_MASK 0x6 199252fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__PRESCALE__SHIFT 0x1 199352fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__BLACKOUT_EXEMPT_MASK 0x8 199452fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__BLACKOUT_EXEMPT__SHIFT 0x3 199552fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__STALL_MODE_MASK 0x30 199652fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__STALL_MODE__SHIFT 0x4 199752fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__STALL_OVERRIDE_MASK 0x40 199852fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__STALL_OVERRIDE__SHIFT 0x6 199952fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__MAXBURST_MASK 0x780 200052fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__MAXBURST__SHIFT 0x7 200152fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__LAZY_TIMER_MASK 0x7800 200252fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__LAZY_TIMER__SHIFT 0xb 200352fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__STALL_OVERRIDE_WTM_MASK 0x8000 200452fb57e7SAlex Deucher #define MC_HUB_RDREQ_SDMA1__STALL_OVERRIDE_WTM__SHIFT 0xf 200552fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__ENABLE_MASK 0x1 200652fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__ENABLE__SHIFT 0x0 200752fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__PRESCALE_MASK 0x6 200852fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__PRESCALE__SHIFT 0x1 200952fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__BLACKOUT_EXEMPT_MASK 0x8 201052fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__BLACKOUT_EXEMPT__SHIFT 0x3 201152fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__STALL_MODE_MASK 0x30 201252fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__STALL_MODE__SHIFT 0x4 201352fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__STALL_OVERRIDE_MASK 0x40 201452fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__STALL_OVERRIDE__SHIFT 0x6 201552fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__MAXBURST_MASK 0x780 201652fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__MAXBURST__SHIFT 0x7 201752fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__LAZY_TIMER_MASK 0x7800 201852fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__LAZY_TIMER__SHIFT 0xb 201952fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__STALL_OVERRIDE_WTM_MASK 0x8000 202052fb57e7SAlex Deucher #define MC_HUB_RDREQ_RLC__STALL_OVERRIDE_WTM__SHIFT 0xf 202152fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__ENABLE_MASK 0x1 202252fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__ENABLE__SHIFT 0x0 202352fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__PRESCALE_MASK 0x6 202452fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__PRESCALE__SHIFT 0x1 202552fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__BLACKOUT_EXEMPT_MASK 0x8 202652fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__BLACKOUT_EXEMPT__SHIFT 0x3 202752fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__STALL_MODE_MASK 0x30 202852fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__STALL_MODE__SHIFT 0x4 202952fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__STALL_OVERRIDE_MASK 0x40 203052fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__STALL_OVERRIDE__SHIFT 0x6 203152fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__MAXBURST_MASK 0x780 203252fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__MAXBURST__SHIFT 0x7 203352fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__LAZY_TIMER_MASK 0x7800 203452fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__LAZY_TIMER__SHIFT 0xb 203552fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__STALL_OVERRIDE_WTM_MASK 0x8000 203652fb57e7SAlex Deucher #define MC_HUB_RDREQ_SEM__STALL_OVERRIDE_WTM__SHIFT 0xf 203752fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__ENABLE_MASK 0x1 203852fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__ENABLE__SHIFT 0x0 203952fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__PRESCALE_MASK 0x6 204052fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__PRESCALE__SHIFT 0x1 204152fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__BLACKOUT_EXEMPT_MASK 0x8 204252fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__BLACKOUT_EXEMPT__SHIFT 0x3 204352fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__STALL_MODE_MASK 0x30 204452fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__STALL_MODE__SHIFT 0x4 204552fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__STALL_OVERRIDE_MASK 0x40 204652fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__STALL_OVERRIDE__SHIFT 0x6 204752fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__MAXBURST_MASK 0x780 204852fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__MAXBURST__SHIFT 0x7 204952fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__LAZY_TIMER_MASK 0x7800 205052fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__LAZY_TIMER__SHIFT 0xb 205152fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__STALL_OVERRIDE_WTM_MASK 0x8000 205252fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCE__STALL_OVERRIDE_WTM__SHIFT 0xf 205352fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__ENABLE_MASK 0x1 205452fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__ENABLE__SHIFT 0x0 205552fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__PRESCALE_MASK 0x6 205652fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__PRESCALE__SHIFT 0x1 205752fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__BLACKOUT_EXEMPT_MASK 0x8 205852fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__BLACKOUT_EXEMPT__SHIFT 0x3 205952fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__STALL_MODE_MASK 0x30 206052fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__STALL_MODE__SHIFT 0x4 206152fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__STALL_OVERRIDE_MASK 0x40 206252fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__STALL_OVERRIDE__SHIFT 0x6 206352fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__MAXBURST_MASK 0x780 206452fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__MAXBURST__SHIFT 0x7 206552fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__LAZY_TIMER_MASK 0x7800 206652fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__LAZY_TIMER__SHIFT 0xb 206752fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__STALL_OVERRIDE_WTM_MASK 0x8000 206852fb57e7SAlex Deucher #define MC_HUB_RDREQ_UMC__STALL_OVERRIDE_WTM__SHIFT 0xf 206952fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__ENABLE_MASK 0x1 207052fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__ENABLE__SHIFT 0x0 207152fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__PRESCALE_MASK 0x6 207252fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__PRESCALE__SHIFT 0x1 207352fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__BLACKOUT_EXEMPT_MASK 0x8 207452fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__BLACKOUT_EXEMPT__SHIFT 0x3 207552fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__STALL_MODE_MASK 0x30 207652fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__STALL_MODE__SHIFT 0x4 207752fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__STALL_OVERRIDE_MASK 0x40 207852fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__STALL_OVERRIDE__SHIFT 0x6 207952fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__MAXBURST_MASK 0x780 208052fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__MAXBURST__SHIFT 0x7 208152fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__LAZY_TIMER_MASK 0x7800 208252fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__LAZY_TIMER__SHIFT 0xb 208352fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__STALL_OVERRIDE_WTM_MASK 0x8000 208452fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__STALL_OVERRIDE_WTM__SHIFT 0xf 208552fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__VM_BYPASS_MASK 0x10000 208652fb57e7SAlex Deucher #define MC_HUB_RDREQ_UVD__VM_BYPASS__SHIFT 0x10 208752fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__ENABLE_MASK 0x1 208852fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__ENABLE__SHIFT 0x0 208952fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__PRESCALE_MASK 0x6 209052fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__PRESCALE__SHIFT 0x1 209152fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__BLACKOUT_EXEMPT_MASK 0x8 209252fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__BLACKOUT_EXEMPT__SHIFT 0x3 209352fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__STALL_MODE_MASK 0x30 209452fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__STALL_MODE__SHIFT 0x4 209552fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__STALL_OVERRIDE_MASK 0x40 209652fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__STALL_OVERRIDE__SHIFT 0x6 209752fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__MAXBURST_MASK 0x780 209852fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__MAXBURST__SHIFT 0x7 209952fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__LAZY_TIMER_MASK 0x7800 210052fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__LAZY_TIMER__SHIFT 0xb 210152fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__STALL_OVERRIDE_WTM_MASK 0x8000 210252fb57e7SAlex Deucher #define MC_HUB_RDREQ_IA__STALL_OVERRIDE_WTM__SHIFT 0xf 210352fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__ENABLE_MASK 0x1 210452fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__ENABLE__SHIFT 0x0 210552fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__PRESCALE_MASK 0x6 210652fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__PRESCALE__SHIFT 0x1 210752fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__BLACKOUT_EXEMPT_MASK 0x8 210852fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__BLACKOUT_EXEMPT__SHIFT 0x3 210952fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__STALL_MODE_MASK 0x30 211052fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__STALL_MODE__SHIFT 0x4 211152fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__STALL_OVERRIDE_MASK 0x40 211252fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__STALL_OVERRIDE__SHIFT 0x6 211352fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__MAXBURST_MASK 0x780 211452fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__MAXBURST__SHIFT 0x7 211552fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__LAZY_TIMER_MASK 0x7800 211652fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__LAZY_TIMER__SHIFT 0xb 211752fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__STALL_OVERRIDE_WTM_MASK 0x8000 211852fb57e7SAlex Deucher #define MC_HUB_RDREQ_DMIF__STALL_OVERRIDE_WTM__SHIFT 0xf 211952fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__ENABLE_MASK 0x1 212052fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__ENABLE__SHIFT 0x0 212152fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__PRESCALE_MASK 0x6 212252fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__PRESCALE__SHIFT 0x1 212352fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__BLACKOUT_EXEMPT_MASK 0x8 212452fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__BLACKOUT_EXEMPT__SHIFT 0x3 212552fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__STALL_MODE_MASK 0x30 212652fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__STALL_MODE__SHIFT 0x4 212752fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__STALL_OVERRIDE_MASK 0x40 212852fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__STALL_OVERRIDE__SHIFT 0x6 212952fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__MAXBURST_MASK 0x780 213052fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__MAXBURST__SHIFT 0x7 213152fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__LAZY_TIMER_MASK 0x7800 213252fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__LAZY_TIMER__SHIFT 0xb 213352fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__STALL_OVERRIDE_WTM_MASK 0x8000 213452fb57e7SAlex Deucher #define MC_HUB_RDREQ_MCIF__STALL_OVERRIDE_WTM__SHIFT 0xf 213552fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__ENABLE_MASK 0x1 213652fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__ENABLE__SHIFT 0x0 213752fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__PRESCALE_MASK 0x6 213852fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__PRESCALE__SHIFT 0x1 213952fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__BLACKOUT_EXEMPT_MASK 0x8 214052fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__BLACKOUT_EXEMPT__SHIFT 0x3 214152fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__STALL_MODE_MASK 0x30 214252fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__STALL_MODE__SHIFT 0x4 214352fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__STALL_OVERRIDE_MASK 0x40 214452fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__STALL_OVERRIDE__SHIFT 0x6 214552fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__MAXBURST_MASK 0x780 214652fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__MAXBURST__SHIFT 0x7 214752fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__LAZY_TIMER_MASK 0x7800 214852fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__LAZY_TIMER__SHIFT 0xb 214952fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__STALL_OVERRIDE_WTM_MASK 0x8000 215052fb57e7SAlex Deucher #define MC_HUB_RDREQ_VMC__STALL_OVERRIDE_WTM__SHIFT 0xf 215152fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__ENABLE_MASK 0x1 215252fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__ENABLE__SHIFT 0x0 215352fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__PRESCALE_MASK 0x6 215452fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__PRESCALE__SHIFT 0x1 215552fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__BLACKOUT_EXEMPT_MASK 0x8 215652fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__BLACKOUT_EXEMPT__SHIFT 0x3 215752fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__STALL_MODE_MASK 0x30 215852fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__STALL_MODE__SHIFT 0x4 215952fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__STALL_OVERRIDE_MASK 0x40 216052fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__STALL_OVERRIDE__SHIFT 0x6 216152fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__MAXBURST_MASK 0x780 216252fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__MAXBURST__SHIFT 0x7 216352fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__LAZY_TIMER_MASK 0x7800 216452fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__LAZY_TIMER__SHIFT 0xb 216552fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__STALL_OVERRIDE_WTM_MASK 0x8000 216652fb57e7SAlex Deucher #define MC_HUB_RDREQ_VCEU__STALL_OVERRIDE_WTM__SHIFT 0xf 216752fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__ENABLE_MASK 0x1 216852fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__ENABLE__SHIFT 0x0 216952fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__BLACKOUT_EXEMPT_MASK 0x2 217052fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__BLACKOUT_EXEMPT__SHIFT 0x1 217152fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__STALL_MODE_MASK 0x4 217252fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__STALL_MODE__SHIFT 0x2 217352fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__MAXBURST_MASK 0x78 217452fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__MAXBURST__SHIFT 0x3 217552fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__ASK_CREDITS_MASK 0x1f80 217652fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__ASK_CREDITS__SHIFT 0x7 217752fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__LAZY_TIMER_MASK 0x1e000 217852fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__LAZY_TIMER__SHIFT 0xd 217952fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__STALL_THRESHOLD_MASK 0xfe0000 218052fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__STALL_THRESHOLD__SHIFT 0x11 218152fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__ASK_CREDITS_W_MASK 0x7f000000 218252fb57e7SAlex Deucher #define MC_HUB_WDP_MCDW__ASK_CREDITS_W__SHIFT 0x18 218352fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__ENABLE_MASK 0x1 218452fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__ENABLE__SHIFT 0x0 218552fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__BLACKOUT_EXEMPT_MASK 0x2 218652fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__BLACKOUT_EXEMPT__SHIFT 0x1 218752fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__STALL_MODE_MASK 0x4 218852fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__STALL_MODE__SHIFT 0x2 218952fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__MAXBURST_MASK 0x78 219052fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__MAXBURST__SHIFT 0x3 219152fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__ASK_CREDITS_MASK 0x1f80 219252fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__ASK_CREDITS__SHIFT 0x7 219352fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__LAZY_TIMER_MASK 0x1e000 219452fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__LAZY_TIMER__SHIFT 0xd 219552fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__STALL_THRESHOLD_MASK 0xfe0000 219652fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__STALL_THRESHOLD__SHIFT 0x11 219752fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__ASK_CREDITS_W_MASK 0x7f000000 219852fb57e7SAlex Deucher #define MC_HUB_WDP_MCDX__ASK_CREDITS_W__SHIFT 0x18 219952fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__ENABLE_MASK 0x1 220052fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__ENABLE__SHIFT 0x0 220152fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__BLACKOUT_EXEMPT_MASK 0x2 220252fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__BLACKOUT_EXEMPT__SHIFT 0x1 220352fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__STALL_MODE_MASK 0x4 220452fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__STALL_MODE__SHIFT 0x2 220552fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__MAXBURST_MASK 0x78 220652fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__MAXBURST__SHIFT 0x3 220752fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__ASK_CREDITS_MASK 0x1f80 220852fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__ASK_CREDITS__SHIFT 0x7 220952fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__LAZY_TIMER_MASK 0x1e000 221052fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__LAZY_TIMER__SHIFT 0xd 221152fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__STALL_THRESHOLD_MASK 0xfe0000 221252fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__STALL_THRESHOLD__SHIFT 0x11 221352fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__ASK_CREDITS_W_MASK 0x7f000000 221452fb57e7SAlex Deucher #define MC_HUB_WDP_MCDY__ASK_CREDITS_W__SHIFT 0x18 221552fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__ENABLE_MASK 0x1 221652fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__ENABLE__SHIFT 0x0 221752fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__BLACKOUT_EXEMPT_MASK 0x2 221852fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__BLACKOUT_EXEMPT__SHIFT 0x1 221952fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__STALL_MODE_MASK 0x4 222052fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__STALL_MODE__SHIFT 0x2 222152fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__MAXBURST_MASK 0x78 222252fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__MAXBURST__SHIFT 0x3 222352fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__ASK_CREDITS_MASK 0x1f80 222452fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__ASK_CREDITS__SHIFT 0x7 222552fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__LAZY_TIMER_MASK 0x1e000 222652fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__LAZY_TIMER__SHIFT 0xd 222752fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__STALL_THRESHOLD_MASK 0xfe0000 222852fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__STALL_THRESHOLD__SHIFT 0x11 222952fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__ASK_CREDITS_W_MASK 0x7f000000 223052fb57e7SAlex Deucher #define MC_HUB_WDP_MCDZ__ASK_CREDITS_W__SHIFT 0x18 223152fb57e7SAlex Deucher #define MC_HUB_WDP_SIP__STALL_MODE_MASK 0x3 223252fb57e7SAlex Deucher #define MC_HUB_WDP_SIP__STALL_MODE__SHIFT 0x0 223352fb57e7SAlex Deucher #define MC_HUB_WDP_SIP__ASK_CREDITS_MASK 0x1fc 223452fb57e7SAlex Deucher #define MC_HUB_WDP_SIP__ASK_CREDITS__SHIFT 0x2 223552fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__ENABLE_MASK 0x1 223652fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__ENABLE__SHIFT 0x0 223752fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__PRESCALE_MASK 0x6 223852fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__PRESCALE__SHIFT 0x1 223952fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__BLACKOUT_EXEMPT_MASK 0x8 224052fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__BLACKOUT_EXEMPT__SHIFT 0x3 224152fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__STALL_MODE_MASK 0x30 224252fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__STALL_MODE__SHIFT 0x4 224352fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__STALL_OVERRIDE_MASK 0x40 224452fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__STALL_OVERRIDE__SHIFT 0x6 224552fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__MAXBURST_MASK 0x780 224652fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__MAXBURST__SHIFT 0x7 224752fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__LAZY_TIMER_MASK 0x7800 224852fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__LAZY_TIMER__SHIFT 0xb 224952fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__STALL_OVERRIDE_WTM_MASK 0x8000 225052fb57e7SAlex Deucher #define MC_HUB_WDP_CPG__STALL_OVERRIDE_WTM__SHIFT 0xf 225152fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__ENABLE_MASK 0x1 225252fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__ENABLE__SHIFT 0x0 225352fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__PRESCALE_MASK 0x6 225452fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__PRESCALE__SHIFT 0x1 225552fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__BLACKOUT_EXEMPT_MASK 0x8 225652fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__BLACKOUT_EXEMPT__SHIFT 0x3 225752fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__STALL_MODE_MASK 0x30 225852fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__STALL_MODE__SHIFT 0x4 225952fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__STALL_OVERRIDE_MASK 0x40 226052fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__STALL_OVERRIDE__SHIFT 0x6 226152fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__MAXBURST_MASK 0x780 226252fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__MAXBURST__SHIFT 0x7 226352fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__LAZY_TIMER_MASK 0x7800 226452fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__LAZY_TIMER__SHIFT 0xb 226552fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__STALL_OVERRIDE_WTM_MASK 0x8000 226652fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA1__STALL_OVERRIDE_WTM__SHIFT 0xf 226752fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__ENABLE_MASK 0x1 226852fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__ENABLE__SHIFT 0x0 226952fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__PRESCALE_MASK 0x6 227052fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__PRESCALE__SHIFT 0x1 227152fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__BLACKOUT_EXEMPT_MASK 0x8 227252fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__BLACKOUT_EXEMPT__SHIFT 0x3 227352fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__STALL_MODE_MASK 0x30 227452fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__STALL_MODE__SHIFT 0x4 227552fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__STALL_OVERRIDE_MASK 0x40 227652fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__STALL_OVERRIDE__SHIFT 0x6 227752fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__MAXBURST_MASK 0x780 227852fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__MAXBURST__SHIFT 0x7 227952fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__LAZY_TIMER_MASK 0x7800 228052fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__LAZY_TIMER__SHIFT 0xb 228152fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__STALL_OVERRIDE_WTM_MASK 0x8000 228252fb57e7SAlex Deucher #define MC_HUB_WDP_SH0__STALL_OVERRIDE_WTM__SHIFT 0xf 228352fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__ENABLE_MASK 0x1 228452fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__ENABLE__SHIFT 0x0 228552fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__PRESCALE_MASK 0x6 228652fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__PRESCALE__SHIFT 0x1 228752fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__BLACKOUT_EXEMPT_MASK 0x8 228852fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__BLACKOUT_EXEMPT__SHIFT 0x3 228952fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__STALL_MODE_MASK 0x30 229052fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__STALL_MODE__SHIFT 0x4 229152fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__STALL_OVERRIDE_MASK 0x40 229252fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__STALL_OVERRIDE__SHIFT 0x6 229352fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__MAXBURST_MASK 0x780 229452fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__MAXBURST__SHIFT 0x7 229552fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__LAZY_TIMER_MASK 0x7800 229652fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__LAZY_TIMER__SHIFT 0xb 229752fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__STALL_OVERRIDE_WTM_MASK 0x8000 229852fb57e7SAlex Deucher #define MC_HUB_WDP_MCIF__STALL_OVERRIDE_WTM__SHIFT 0xf 229952fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__ENABLE_MASK 0x1 230052fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__ENABLE__SHIFT 0x0 230152fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__PRESCALE_MASK 0x6 230252fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__PRESCALE__SHIFT 0x1 230352fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__BLACKOUT_EXEMPT_MASK 0x8 230452fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__BLACKOUT_EXEMPT__SHIFT 0x3 230552fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__STALL_MODE_MASK 0x30 230652fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__STALL_MODE__SHIFT 0x4 230752fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__STALL_OVERRIDE_MASK 0x40 230852fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__STALL_OVERRIDE__SHIFT 0x6 230952fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__MAXBURST_MASK 0x780 231052fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__MAXBURST__SHIFT 0x7 231152fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__LAZY_TIMER_MASK 0x7800 231252fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__LAZY_TIMER__SHIFT 0xb 231352fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__STALL_OVERRIDE_WTM_MASK 0x8000 231452fb57e7SAlex Deucher #define MC_HUB_WDP_VCE__STALL_OVERRIDE_WTM__SHIFT 0xf 231552fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__ENABLE_MASK 0x1 231652fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__ENABLE__SHIFT 0x0 231752fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__PRESCALE_MASK 0x6 231852fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__PRESCALE__SHIFT 0x1 231952fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__BLACKOUT_EXEMPT_MASK 0x8 232052fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__BLACKOUT_EXEMPT__SHIFT 0x3 232152fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__STALL_MODE_MASK 0x30 232252fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__STALL_MODE__SHIFT 0x4 232352fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__STALL_OVERRIDE_MASK 0x40 232452fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__STALL_OVERRIDE__SHIFT 0x6 232552fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__MAXBURST_MASK 0x780 232652fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__MAXBURST__SHIFT 0x7 232752fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__LAZY_TIMER_MASK 0x7800 232852fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__LAZY_TIMER__SHIFT 0xb 232952fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__STALL_OVERRIDE_WTM_MASK 0x8000 233052fb57e7SAlex Deucher #define MC_HUB_WDP_XDP__STALL_OVERRIDE_WTM__SHIFT 0xf 233152fb57e7SAlex Deucher #define MC_HUB_WDP_IH__ENABLE_MASK 0x1 233252fb57e7SAlex Deucher #define MC_HUB_WDP_IH__ENABLE__SHIFT 0x0 233352fb57e7SAlex Deucher #define MC_HUB_WDP_IH__PRESCALE_MASK 0x6 233452fb57e7SAlex Deucher #define MC_HUB_WDP_IH__PRESCALE__SHIFT 0x1 233552fb57e7SAlex Deucher #define MC_HUB_WDP_IH__BLACKOUT_EXEMPT_MASK 0x8 233652fb57e7SAlex Deucher #define MC_HUB_WDP_IH__BLACKOUT_EXEMPT__SHIFT 0x3 233752fb57e7SAlex Deucher #define MC_HUB_WDP_IH__STALL_MODE_MASK 0x30 233852fb57e7SAlex Deucher #define MC_HUB_WDP_IH__STALL_MODE__SHIFT 0x4 233952fb57e7SAlex Deucher #define MC_HUB_WDP_IH__STALL_OVERRIDE_MASK 0x40 234052fb57e7SAlex Deucher #define MC_HUB_WDP_IH__STALL_OVERRIDE__SHIFT 0x6 234152fb57e7SAlex Deucher #define MC_HUB_WDP_IH__MAXBURST_MASK 0x780 234252fb57e7SAlex Deucher #define MC_HUB_WDP_IH__MAXBURST__SHIFT 0x7 234352fb57e7SAlex Deucher #define MC_HUB_WDP_IH__LAZY_TIMER_MASK 0x7800 234452fb57e7SAlex Deucher #define MC_HUB_WDP_IH__LAZY_TIMER__SHIFT 0xb 234552fb57e7SAlex Deucher #define MC_HUB_WDP_IH__STALL_OVERRIDE_WTM_MASK 0x8000 234652fb57e7SAlex Deucher #define MC_HUB_WDP_IH__STALL_OVERRIDE_WTM__SHIFT 0xf 234752fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__ENABLE_MASK 0x1 234852fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__ENABLE__SHIFT 0x0 234952fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__PRESCALE_MASK 0x6 235052fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__PRESCALE__SHIFT 0x1 235152fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__BLACKOUT_EXEMPT_MASK 0x8 235252fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__BLACKOUT_EXEMPT__SHIFT 0x3 235352fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__STALL_MODE_MASK 0x30 235452fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__STALL_MODE__SHIFT 0x4 235552fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__STALL_OVERRIDE_MASK 0x40 235652fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__STALL_OVERRIDE__SHIFT 0x6 235752fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__MAXBURST_MASK 0x780 235852fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__MAXBURST__SHIFT 0x7 235952fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__LAZY_TIMER_MASK 0x7800 236052fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__LAZY_TIMER__SHIFT 0xb 236152fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__STALL_OVERRIDE_WTM_MASK 0x8000 236252fb57e7SAlex Deucher #define MC_HUB_WDP_RLC__STALL_OVERRIDE_WTM__SHIFT 0xf 236352fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__ENABLE_MASK 0x1 236452fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__ENABLE__SHIFT 0x0 236552fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__PRESCALE_MASK 0x6 236652fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__PRESCALE__SHIFT 0x1 236752fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__BLACKOUT_EXEMPT_MASK 0x8 236852fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__BLACKOUT_EXEMPT__SHIFT 0x3 236952fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__STALL_MODE_MASK 0x30 237052fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__STALL_MODE__SHIFT 0x4 237152fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__STALL_OVERRIDE_MASK 0x40 237252fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__STALL_OVERRIDE__SHIFT 0x6 237352fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__MAXBURST_MASK 0x780 237452fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__MAXBURST__SHIFT 0x7 237552fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__LAZY_TIMER_MASK 0x7800 237652fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__LAZY_TIMER__SHIFT 0xb 237752fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__STALL_OVERRIDE_WTM_MASK 0x8000 237852fb57e7SAlex Deucher #define MC_HUB_WDP_SEM__STALL_OVERRIDE_WTM__SHIFT 0xf 237952fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__ENABLE_MASK 0x1 238052fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__ENABLE__SHIFT 0x0 238152fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__PRESCALE_MASK 0x6 238252fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__PRESCALE__SHIFT 0x1 238352fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__BLACKOUT_EXEMPT_MASK 0x8 238452fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__BLACKOUT_EXEMPT__SHIFT 0x3 238552fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__STALL_MODE_MASK 0x30 238652fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__STALL_MODE__SHIFT 0x4 238752fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__STALL_OVERRIDE_MASK 0x40 238852fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__STALL_OVERRIDE__SHIFT 0x6 238952fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__MAXBURST_MASK 0x780 239052fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__MAXBURST__SHIFT 0x7 239152fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__LAZY_TIMER_MASK 0x7800 239252fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__LAZY_TIMER__SHIFT 0xb 239352fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__STALL_OVERRIDE_WTM_MASK 0x8000 239452fb57e7SAlex Deucher #define MC_HUB_WDP_SMU__STALL_OVERRIDE_WTM__SHIFT 0xf 239552fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__ENABLE_MASK 0x1 239652fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__ENABLE__SHIFT 0x0 239752fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__PRESCALE_MASK 0x6 239852fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__PRESCALE__SHIFT 0x1 239952fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__BLACKOUT_EXEMPT_MASK 0x8 240052fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__BLACKOUT_EXEMPT__SHIFT 0x3 240152fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__STALL_MODE_MASK 0x30 240252fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__STALL_MODE__SHIFT 0x4 240352fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__STALL_OVERRIDE_MASK 0x40 240452fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__STALL_OVERRIDE__SHIFT 0x6 240552fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__MAXBURST_MASK 0x780 240652fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__MAXBURST__SHIFT 0x7 240752fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__LAZY_TIMER_MASK 0x7800 240852fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__LAZY_TIMER__SHIFT 0xb 240952fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__STALL_OVERRIDE_WTM_MASK 0x8000 241052fb57e7SAlex Deucher #define MC_HUB_WDP_SH1__STALL_OVERRIDE_WTM__SHIFT 0xf 241152fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__ENABLE_MASK 0x1 241252fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__ENABLE__SHIFT 0x0 241352fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__PRESCALE_MASK 0x6 241452fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__PRESCALE__SHIFT 0x1 241552fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__BLACKOUT_EXEMPT_MASK 0x8 241652fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__BLACKOUT_EXEMPT__SHIFT 0x3 241752fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__STALL_MODE_MASK 0x30 241852fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__STALL_MODE__SHIFT 0x4 241952fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__STALL_OVERRIDE_MASK 0x40 242052fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__STALL_OVERRIDE__SHIFT 0x6 242152fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__MAXBURST_MASK 0x780 242252fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__MAXBURST__SHIFT 0x7 242352fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__LAZY_TIMER_MASK 0x7800 242452fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__LAZY_TIMER__SHIFT 0xb 242552fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__STALL_OVERRIDE_WTM_MASK 0x8000 242652fb57e7SAlex Deucher #define MC_HUB_WDP_UMC__STALL_OVERRIDE_WTM__SHIFT 0xf 242752fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__ENABLE_MASK 0x1 242852fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__ENABLE__SHIFT 0x0 242952fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__PRESCALE_MASK 0x6 243052fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__PRESCALE__SHIFT 0x1 243152fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__BLACKOUT_EXEMPT_MASK 0x8 243252fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__BLACKOUT_EXEMPT__SHIFT 0x3 243352fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__STALL_MODE_MASK 0x30 243452fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__STALL_MODE__SHIFT 0x4 243552fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__STALL_OVERRIDE_MASK 0x40 243652fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__STALL_OVERRIDE__SHIFT 0x6 243752fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__MAXBURST_MASK 0x780 243852fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__MAXBURST__SHIFT 0x7 243952fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__LAZY_TIMER_MASK 0x7800 244052fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__LAZY_TIMER__SHIFT 0xb 244152fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__STALL_OVERRIDE_WTM_MASK 0x8000 244252fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__STALL_OVERRIDE_WTM__SHIFT 0xf 244352fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__VM_BYPASS_MASK 0x10000 244452fb57e7SAlex Deucher #define MC_HUB_WDP_UVD__VM_BYPASS__SHIFT 0x10 244552fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__ENABLE_MASK 0x1 244652fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__ENABLE__SHIFT 0x0 244752fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__PRESCALE_MASK 0x6 244852fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__PRESCALE__SHIFT 0x1 244952fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__BLACKOUT_EXEMPT_MASK 0x8 245052fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__BLACKOUT_EXEMPT__SHIFT 0x3 245152fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__STALL_MODE_MASK 0x30 245252fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__STALL_MODE__SHIFT 0x4 245352fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__STALL_OVERRIDE_MASK 0x40 245452fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__STALL_OVERRIDE__SHIFT 0x6 245552fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__MAXBURST_MASK 0x780 245652fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__MAXBURST__SHIFT 0x7 245752fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__LAZY_TIMER_MASK 0x7800 245852fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__LAZY_TIMER__SHIFT 0xb 245952fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__STALL_OVERRIDE_WTM_MASK 0x8000 246052fb57e7SAlex Deucher #define MC_HUB_WDP_HDP__STALL_OVERRIDE_WTM__SHIFT 0xf 246152fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__ENABLE_MASK 0x1 246252fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__ENABLE__SHIFT 0x0 246352fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__PRESCALE_MASK 0x6 246452fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__PRESCALE__SHIFT 0x1 246552fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__BLACKOUT_EXEMPT_MASK 0x8 246652fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__BLACKOUT_EXEMPT__SHIFT 0x3 246752fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__STALL_MODE_MASK 0x30 246852fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__STALL_MODE__SHIFT 0x4 246952fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__STALL_OVERRIDE_MASK 0x40 247052fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__STALL_OVERRIDE__SHIFT 0x6 247152fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__MAXBURST_MASK 0x780 247252fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__MAXBURST__SHIFT 0x7 247352fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__LAZY_TIMER_MASK 0x7800 247452fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__LAZY_TIMER__SHIFT 0xb 247552fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__STALL_OVERRIDE_WTM_MASK 0x8000 247652fb57e7SAlex Deucher #define MC_HUB_WDP_SDMA0__STALL_OVERRIDE_WTM__SHIFT 0xf 247752fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDW__STALL_MODE_MASK 0x1 247852fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDW__STALL_MODE__SHIFT 0x0 247952fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDW__CREDIT_COUNT_MASK 0xfe 248052fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDW__CREDIT_COUNT__SHIFT 0x1 248152fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDX__STALL_MODE_MASK 0x1 248252fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDX__STALL_MODE__SHIFT 0x0 248352fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDX__CREDIT_COUNT_MASK 0xfe 248452fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDX__CREDIT_COUNT__SHIFT 0x1 248552fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDY__STALL_MODE_MASK 0x1 248652fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDY__STALL_MODE__SHIFT 0x0 248752fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDY__CREDIT_COUNT_MASK 0xfe 248852fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDY__CREDIT_COUNT__SHIFT 0x1 248952fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDZ__STALL_MODE_MASK 0x1 249052fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDZ__STALL_MODE__SHIFT 0x0 249152fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDZ__CREDIT_COUNT_MASK 0xfe 249252fb57e7SAlex Deucher #define MC_HUB_WRRET_MCDZ__CREDIT_COUNT__SHIFT 0x1 249352fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__ENABLE_MASK 0x1 249452fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__ENABLE__SHIFT 0x0 249552fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__PRESCALE_MASK 0x6 249652fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__PRESCALE__SHIFT 0x1 249752fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__BLACKOUT_EXEMPT_MASK 0x8 249852fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__BLACKOUT_EXEMPT__SHIFT 0x3 249952fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__STALL_MODE_MASK 0x30 250052fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__STALL_MODE__SHIFT 0x4 250152fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__STALL_OVERRIDE_MASK 0x40 250252fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__STALL_OVERRIDE__SHIFT 0x6 250352fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__MAXBURST_MASK 0x780 250452fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__MAXBURST__SHIFT 0x7 250552fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__LAZY_TIMER_MASK 0x7800 250652fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__LAZY_TIMER__SHIFT 0xb 250752fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__STALL_OVERRIDE_WTM_MASK 0x8000 250852fb57e7SAlex Deucher #define MC_HUB_WDP_VCEU__STALL_OVERRIDE_WTM__SHIFT 0xf 250952fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__ENABLE_MASK 0x1 251052fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__ENABLE__SHIFT 0x0 251152fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__PRESCALE_MASK 0x6 251252fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__PRESCALE__SHIFT 0x1 251352fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__BLACKOUT_EXEMPT_MASK 0x8 251452fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__BLACKOUT_EXEMPT__SHIFT 0x3 251552fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__STALL_MODE_MASK 0x30 251652fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__STALL_MODE__SHIFT 0x4 251752fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__STALL_OVERRIDE_MASK 0x40 251852fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__STALL_OVERRIDE__SHIFT 0x6 251952fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__MAXBURST_MASK 0x780 252052fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__MAXBURST__SHIFT 0x7 252152fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__LAZY_TIMER_MASK 0x7800 252252fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__LAZY_TIMER__SHIFT 0xb 252352fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__STALL_OVERRIDE_WTM_MASK 0x8000 252452fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__STALL_OVERRIDE_WTM__SHIFT 0xf 252552fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__BYPASS_AVAIL_OVERRIDE_MASK 0x10000 252652fb57e7SAlex Deucher #define MC_HUB_WDP_XDMAM__BYPASS_AVAIL_OVERRIDE__SHIFT 0x10 252752fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__ENABLE_MASK 0x1 252852fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__ENABLE__SHIFT 0x0 252952fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__PRESCALE_MASK 0x6 253052fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__PRESCALE__SHIFT 0x1 253152fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__BLACKOUT_EXEMPT_MASK 0x8 253252fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__BLACKOUT_EXEMPT__SHIFT 0x3 253352fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__STALL_MODE_MASK 0x30 253452fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__STALL_MODE__SHIFT 0x4 253552fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__STALL_OVERRIDE_MASK 0x40 253652fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__STALL_OVERRIDE__SHIFT 0x6 253752fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__MAXBURST_MASK 0x780 253852fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__MAXBURST__SHIFT 0x7 253952fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__LAZY_TIMER_MASK 0x7800 254052fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__LAZY_TIMER__SHIFT 0xb 254152fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__STALL_OVERRIDE_WTM_MASK 0x8000 254252fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__STALL_OVERRIDE_WTM__SHIFT 0xf 254352fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__BYPASS_AVAIL_OVERRIDE_MASK 0x10000 254452fb57e7SAlex Deucher #define MC_HUB_WDP_XDMA__BYPASS_AVAIL_OVERRIDE__SHIFT 0x10 254552fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__ENABLE_MASK 0x1 254652fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__ENABLE__SHIFT 0x0 254752fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__PRESCALE_MASK 0x6 254852fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__PRESCALE__SHIFT 0x1 254952fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__BLACKOUT_EXEMPT_MASK 0x8 255052fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__BLACKOUT_EXEMPT__SHIFT 0x3 255152fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__STALL_MODE_MASK 0x30 255252fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__STALL_MODE__SHIFT 0x4 255352fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__STALL_OVERRIDE_MASK 0x40 255452fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__STALL_OVERRIDE__SHIFT 0x6 255552fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__MAXBURST_MASK 0x780 255652fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__MAXBURST__SHIFT 0x7 255752fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__LAZY_TIMER_MASK 0x7800 255852fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__LAZY_TIMER__SHIFT 0xb 255952fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__STALL_OVERRIDE_WTM_MASK 0x8000 256052fb57e7SAlex Deucher #define MC_HUB_RDREQ_XDMAM__STALL_OVERRIDE_WTM__SHIFT 0xf 256152fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__ENABLE_MASK 0x1 256252fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__ENABLE__SHIFT 0x0 256352fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__PRESCALE_MASK 0x6 256452fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__PRESCALE__SHIFT 0x1 256552fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__BLACKOUT_EXEMPT_MASK 0x8 256652fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__BLACKOUT_EXEMPT__SHIFT 0x3 256752fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__STALL_MODE_MASK 0x30 256852fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__STALL_MODE__SHIFT 0x4 256952fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__STALL_OVERRIDE_MASK 0x40 257052fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__STALL_OVERRIDE__SHIFT 0x6 257152fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__MAXBURST_MASK 0x780 257252fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__MAXBURST__SHIFT 0x7 257352fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__LAZY_TIMER_MASK 0x7800 257452fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__LAZY_TIMER__SHIFT 0xb 257552fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__STALL_OVERRIDE_WTM_MASK 0x8000 257652fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__STALL_OVERRIDE_WTM__SHIFT 0xf 257752fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__BYPASS_AVAIL_OVERRIDE_MASK 0x10000 257852fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__BYPASS_AVAIL_OVERRIDE__SHIFT 0x10 257952fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__PRIORITY_DISABLE_MASK 0x20000 258052fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__PRIORITY_DISABLE__SHIFT 0x11 258152fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__STALL_FILTER_ENABLE_MASK 0x40000 258252fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__STALL_FILTER_ENABLE__SHIFT 0x12 258352fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__STALL_THRESHOLD_MASK 0x1f80000 258452fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPG__STALL_THRESHOLD__SHIFT 0x13 258552fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__ENABLE_MASK 0x1 258652fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__ENABLE__SHIFT 0x0 258752fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__PRESCALE_MASK 0x6 258852fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__PRESCALE__SHIFT 0x1 258952fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__BLACKOUT_EXEMPT_MASK 0x8 259052fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__BLACKOUT_EXEMPT__SHIFT 0x3 259152fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__STALL_MODE_MASK 0x30 259252fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__STALL_MODE__SHIFT 0x4 259352fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__STALL_OVERRIDE_MASK 0x40 259452fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__STALL_OVERRIDE__SHIFT 0x6 259552fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__MAXBURST_MASK 0x780 259652fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__MAXBURST__SHIFT 0x7 259752fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__LAZY_TIMER_MASK 0x7800 259852fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__LAZY_TIMER__SHIFT 0xb 259952fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__STALL_OVERRIDE_WTM_MASK 0x8000 260052fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__STALL_OVERRIDE_WTM__SHIFT 0xf 260152fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__BYPASS_AVAIL_OVERRIDE_MASK 0x10000 260252fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__BYPASS_AVAIL_OVERRIDE__SHIFT 0x10 260352fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__PRIORITY_DISABLE_MASK 0x20000 260452fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__PRIORITY_DISABLE__SHIFT 0x11 260552fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__STALL_FILTER_ENABLE_MASK 0x40000 260652fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__STALL_FILTER_ENABLE__SHIFT 0x12 260752fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__STALL_THRESHOLD_MASK 0x1f80000 260852fb57e7SAlex Deucher #define MC_HUB_RDREQ_ACPO__STALL_THRESHOLD__SHIFT 0x13 260952fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__ENABLE_MASK 0x1 261052fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__ENABLE__SHIFT 0x0 261152fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__PRESCALE_MASK 0x6 261252fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__PRESCALE__SHIFT 0x1 261352fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__BLACKOUT_EXEMPT_MASK 0x8 261452fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__BLACKOUT_EXEMPT__SHIFT 0x3 261552fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__STALL_MODE_MASK 0x30 261652fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__STALL_MODE__SHIFT 0x4 261752fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__STALL_OVERRIDE_MASK 0x40 261852fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__STALL_OVERRIDE__SHIFT 0x6 261952fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__MAXBURST_MASK 0x780 262052fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__MAXBURST__SHIFT 0x7 262152fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__LAZY_TIMER_MASK 0x7800 262252fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__LAZY_TIMER__SHIFT 0xb 262352fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__STALL_OVERRIDE_WTM_MASK 0x8000 262452fb57e7SAlex Deucher #define MC_HUB_RDREQ_SAM__STALL_OVERRIDE_WTM__SHIFT 0xf 262552fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__ENABLE_MASK 0x1 262652fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__ENABLE__SHIFT 0x0 262752fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__PRESCALE_MASK 0x6 262852fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__PRESCALE__SHIFT 0x1 262952fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__BLACKOUT_EXEMPT_MASK 0x8 263052fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__BLACKOUT_EXEMPT__SHIFT 0x3 263152fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__STALL_MODE_MASK 0x30 263252fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__STALL_MODE__SHIFT 0x4 263352fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__STALL_OVERRIDE_MASK 0x40 263452fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__STALL_OVERRIDE__SHIFT 0x6 263552fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__MAXBURST_MASK 0x780 263652fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__MAXBURST__SHIFT 0x7 263752fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__LAZY_TIMER_MASK 0x7800 263852fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__LAZY_TIMER__SHIFT 0xb 263952fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__STALL_OVERRIDE_WTM_MASK 0x8000 264052fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__STALL_OVERRIDE_WTM__SHIFT 0xf 264152fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__BYPASS_AVAIL_OVERRIDE_MASK 0x10000 264252fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__BYPASS_AVAIL_OVERRIDE__SHIFT 0x10 264352fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__PRIORITY_DISABLE_MASK 0x20000 264452fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__PRIORITY_DISABLE__SHIFT 0x11 264552fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__STALL_FILTER_ENABLE_MASK 0x40000 264652fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__STALL_FILTER_ENABLE__SHIFT 0x12 264752fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__STALL_THRESHOLD_MASK 0x1f80000 264852fb57e7SAlex Deucher #define MC_HUB_WDP_ACPG__STALL_THRESHOLD__SHIFT 0x13 264952fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__ENABLE_MASK 0x1 265052fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__ENABLE__SHIFT 0x0 265152fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__PRESCALE_MASK 0x6 265252fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__PRESCALE__SHIFT 0x1 265352fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__BLACKOUT_EXEMPT_MASK 0x8 265452fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__BLACKOUT_EXEMPT__SHIFT 0x3 265552fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__STALL_MODE_MASK 0x30 265652fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__STALL_MODE__SHIFT 0x4 265752fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__STALL_OVERRIDE_MASK 0x40 265852fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__STALL_OVERRIDE__SHIFT 0x6 265952fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__MAXBURST_MASK 0x780 266052fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__MAXBURST__SHIFT 0x7 266152fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__LAZY_TIMER_MASK 0x7800 266252fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__LAZY_TIMER__SHIFT 0xb 266352fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__STALL_OVERRIDE_WTM_MASK 0x8000 266452fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__STALL_OVERRIDE_WTM__SHIFT 0xf 266552fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__BYPASS_AVAIL_OVERRIDE_MASK 0x10000 266652fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__BYPASS_AVAIL_OVERRIDE__SHIFT 0x10 266752fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__PRIORITY_DISABLE_MASK 0x20000 266852fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__PRIORITY_DISABLE__SHIFT 0x11 266952fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__STALL_FILTER_ENABLE_MASK 0x40000 267052fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__STALL_FILTER_ENABLE__SHIFT 0x12 267152fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__STALL_THRESHOLD_MASK 0x1f80000 267252fb57e7SAlex Deucher #define MC_HUB_WDP_ACPO__STALL_THRESHOLD__SHIFT 0x13 267352fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__ENABLE_MASK 0x1 267452fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__ENABLE__SHIFT 0x0 267552fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__PRESCALE_MASK 0x6 267652fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__PRESCALE__SHIFT 0x1 267752fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__BLACKOUT_EXEMPT_MASK 0x8 267852fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__BLACKOUT_EXEMPT__SHIFT 0x3 267952fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__STALL_MODE_MASK 0x30 268052fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__STALL_MODE__SHIFT 0x4 268152fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__STALL_OVERRIDE_MASK 0x40 268252fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__STALL_OVERRIDE__SHIFT 0x6 268352fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__MAXBURST_MASK 0x780 268452fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__MAXBURST__SHIFT 0x7 268552fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__LAZY_TIMER_MASK 0x7800 268652fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__LAZY_TIMER__SHIFT 0xb 268752fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__STALL_OVERRIDE_WTM_MASK 0x8000 268852fb57e7SAlex Deucher #define MC_HUB_WDP_SAM__STALL_OVERRIDE_WTM__SHIFT 0xf 268952fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__ENABLE_MASK 0x1 269052fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__ENABLE__SHIFT 0x0 269152fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__PRESCALE_MASK 0x6 269252fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__PRESCALE__SHIFT 0x1 269352fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__BLACKOUT_EXEMPT_MASK 0x8 269452fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__BLACKOUT_EXEMPT__SHIFT 0x3 269552fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__STALL_MODE_MASK 0x30 269652fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__STALL_MODE__SHIFT 0x4 269752fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__STALL_OVERRIDE_MASK 0x40 269852fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__STALL_OVERRIDE__SHIFT 0x6 269952fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__MAXBURST_MASK 0x780 270052fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__MAXBURST__SHIFT 0x7 270152fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__LAZY_TIMER_MASK 0x7800 270252fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__LAZY_TIMER__SHIFT 0xb 270352fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__STALL_OVERRIDE_WTM_MASK 0x8000 270452fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPC__STALL_OVERRIDE_WTM__SHIFT 0xf 270552fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__ENABLE_MASK 0x1 270652fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__ENABLE__SHIFT 0x0 270752fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__PRESCALE_MASK 0x6 270852fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__PRESCALE__SHIFT 0x1 270952fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__BLACKOUT_EXEMPT_MASK 0x8 271052fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__BLACKOUT_EXEMPT__SHIFT 0x3 271152fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__STALL_MODE_MASK 0x30 271252fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__STALL_MODE__SHIFT 0x4 271352fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__STALL_OVERRIDE_MASK 0x40 271452fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__STALL_OVERRIDE__SHIFT 0x6 271552fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__MAXBURST_MASK 0x780 271652fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__MAXBURST__SHIFT 0x7 271752fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__LAZY_TIMER_MASK 0x7800 271852fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__LAZY_TIMER__SHIFT 0xb 271952fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__STALL_OVERRIDE_WTM_MASK 0x8000 272052fb57e7SAlex Deucher #define MC_HUB_RDREQ_CPF__STALL_OVERRIDE_WTM__SHIFT 0xf 272152fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__ENABLE_MASK 0x1 272252fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__ENABLE__SHIFT 0x0 272352fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__PRESCALE_MASK 0x6 272452fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__PRESCALE__SHIFT 0x1 272552fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__BLACKOUT_EXEMPT_MASK 0x8 272652fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__BLACKOUT_EXEMPT__SHIFT 0x3 272752fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__STALL_MODE_MASK 0x30 272852fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__STALL_MODE__SHIFT 0x4 272952fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__STALL_OVERRIDE_MASK 0x40 273052fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__STALL_OVERRIDE__SHIFT 0x6 273152fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__MAXBURST_MASK 0x780 273252fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__MAXBURST__SHIFT 0x7 273352fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__LAZY_TIMER_MASK 0x7800 273452fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__LAZY_TIMER__SHIFT 0xb 273552fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__STALL_OVERRIDE_WTM_MASK 0x8000 273652fb57e7SAlex Deucher #define MC_HUB_WDP_CPC__STALL_OVERRIDE_WTM__SHIFT 0xf 273752fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__ENABLE_MASK 0x1 273852fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__ENABLE__SHIFT 0x0 273952fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__PRESCALE_MASK 0x6 274052fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__PRESCALE__SHIFT 0x1 274152fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__BLACKOUT_EXEMPT_MASK 0x8 274252fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__BLACKOUT_EXEMPT__SHIFT 0x3 274352fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__STALL_MODE_MASK 0x30 274452fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__STALL_MODE__SHIFT 0x4 274552fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__STALL_OVERRIDE_MASK 0x40 274652fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__STALL_OVERRIDE__SHIFT 0x6 274752fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__MAXBURST_MASK 0x780 274852fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__MAXBURST__SHIFT 0x7 274952fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__LAZY_TIMER_MASK 0x7800 275052fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__LAZY_TIMER__SHIFT 0xb 275152fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__STALL_OVERRIDE_WTM_MASK 0x8000 275252fb57e7SAlex Deucher #define MC_HUB_WDP_CPF__STALL_OVERRIDE_WTM__SHIFT 0xf 275352fb57e7SAlex Deucher #define MC_RPB_CONF__XPB_PCIE_ORDER_MASK 0x8000 275452fb57e7SAlex Deucher #define MC_RPB_CONF__XPB_PCIE_ORDER__SHIFT 0xf 275552fb57e7SAlex Deucher #define MC_RPB_CONF__RPB_RD_PCIE_ORDER_MASK 0x10000 275652fb57e7SAlex Deucher #define MC_RPB_CONF__RPB_RD_PCIE_ORDER__SHIFT 0x10 275752fb57e7SAlex Deucher #define MC_RPB_CONF__RPB_WR_PCIE_ORDER_MASK 0x20000 275852fb57e7SAlex Deucher #define MC_RPB_CONF__RPB_WR_PCIE_ORDER__SHIFT 0x11 275952fb57e7SAlex Deucher #define MC_RPB_IF_CONF__RPB_BIF_CREDITS_MASK 0xff 276052fb57e7SAlex Deucher #define MC_RPB_IF_CONF__RPB_BIF_CREDITS__SHIFT 0x0 276152fb57e7SAlex Deucher #define MC_RPB_IF_CONF__OUTSTANDING_WRRET_ASK_MASK 0xff00 276252fb57e7SAlex Deucher #define MC_RPB_IF_CONF__OUTSTANDING_WRRET_ASK__SHIFT 0x8 276352fb57e7SAlex Deucher #define MC_RPB_DBG1__RPB_BIF_OUTSTANDING_RD_MASK 0xff 276452fb57e7SAlex Deucher #define MC_RPB_DBG1__RPB_BIF_OUTSTANDING_RD__SHIFT 0x0 276552fb57e7SAlex Deucher #define MC_RPB_DBG1__RPB_BIF_OUTSTANDING_RD_32B_MASK 0xfff00 276652fb57e7SAlex Deucher #define MC_RPB_DBG1__RPB_BIF_OUTSTANDING_RD_32B__SHIFT 0x8 276752fb57e7SAlex Deucher #define MC_RPB_DBG1__DEBUG_BITS_MASK 0xfff00000 276852fb57e7SAlex Deucher #define MC_RPB_DBG1__DEBUG_BITS__SHIFT 0x14 276952fb57e7SAlex Deucher #define MC_RPB_EFF_CNTL__WR_LAZY_TIMER_MASK 0xff 277052fb57e7SAlex Deucher #define MC_RPB_EFF_CNTL__WR_LAZY_TIMER__SHIFT 0x0 277152fb57e7SAlex Deucher #define MC_RPB_EFF_CNTL__RD_LAZY_TIMER_MASK 0xff00 277252fb57e7SAlex Deucher #define MC_RPB_EFF_CNTL__RD_LAZY_TIMER__SHIFT 0x8 277352fb57e7SAlex Deucher #define MC_RPB_ARB_CNTL__WR_SWITCH_NUM_MASK 0xff 277452fb57e7SAlex Deucher #define MC_RPB_ARB_CNTL__WR_SWITCH_NUM__SHIFT 0x0 277552fb57e7SAlex Deucher #define MC_RPB_ARB_CNTL__RD_SWITCH_NUM_MASK 0xff00 277652fb57e7SAlex Deucher #define MC_RPB_ARB_CNTL__RD_SWITCH_NUM__SHIFT 0x8 277752fb57e7SAlex Deucher #define MC_RPB_ARB_CNTL__ATC_SWITCH_NUM_MASK 0xff0000 277852fb57e7SAlex Deucher #define MC_RPB_ARB_CNTL__ATC_SWITCH_NUM__SHIFT 0x10 277952fb57e7SAlex Deucher #define MC_RPB_BIF_CNTL__ARB_SWITCH_NUM_MASK 0xff 278052fb57e7SAlex Deucher #define MC_RPB_BIF_CNTL__ARB_SWITCH_NUM__SHIFT 0x0 278152fb57e7SAlex Deucher #define MC_RPB_BIF_CNTL__XPB_SWITCH_NUM_MASK 0xff00 278252fb57e7SAlex Deucher #define MC_RPB_BIF_CNTL__XPB_SWITCH_NUM__SHIFT 0x8 278352fb57e7SAlex Deucher #define MC_RPB_WR_SWITCH_CNTL__QUEUE0_SWITCH_NUM_MASK 0xff 278452fb57e7SAlex Deucher #define MC_RPB_WR_SWITCH_CNTL__QUEUE0_SWITCH_NUM__SHIFT 0x0 278552fb57e7SAlex Deucher #define MC_RPB_WR_SWITCH_CNTL__QUEUE1_SWITCH_NUM_MASK 0xff00 278652fb57e7SAlex Deucher #define MC_RPB_WR_SWITCH_CNTL__QUEUE1_SWITCH_NUM__SHIFT 0x8 278752fb57e7SAlex Deucher #define MC_RPB_WR_SWITCH_CNTL__QUEUE2_SWITCH_NUM_MASK 0xff0000 278852fb57e7SAlex Deucher #define MC_RPB_WR_SWITCH_CNTL__QUEUE2_SWITCH_NUM__SHIFT 0x10 278952fb57e7SAlex Deucher #define MC_RPB_WR_SWITCH_CNTL__QUEUE3_SWITCH_NUM_MASK 0xff000000 279052fb57e7SAlex Deucher #define MC_RPB_WR_SWITCH_CNTL__QUEUE3_SWITCH_NUM__SHIFT 0x18 279152fb57e7SAlex Deucher #define MC_RPB_WR_COMBINE_CNTL__WC_ENABLE_MASK 0x1 279252fb57e7SAlex Deucher #define MC_RPB_WR_COMBINE_CNTL__WC_ENABLE__SHIFT 0x0 279352fb57e7SAlex Deucher #define MC_RPB_WR_COMBINE_CNTL__WC_MAX_PACKET_SIZE_MASK 0x6 279452fb57e7SAlex Deucher #define MC_RPB_WR_COMBINE_CNTL__WC_MAX_PACKET_SIZE__SHIFT 0x1 279552fb57e7SAlex Deucher #define MC_RPB_WR_COMBINE_CNTL__WC_FLUSH_TIMER_MASK 0x78 279652fb57e7SAlex Deucher #define MC_RPB_WR_COMBINE_CNTL__WC_FLUSH_TIMER__SHIFT 0x3 279752fb57e7SAlex Deucher #define MC_RPB_WR_COMBINE_CNTL__WC_ALIGN_MASK 0x80 279852fb57e7SAlex Deucher #define MC_RPB_WR_COMBINE_CNTL__WC_ALIGN__SHIFT 0x7 279952fb57e7SAlex Deucher #define MC_RPB_RD_SWITCH_CNTL__QUEUE0_SWITCH_NUM_MASK 0xff 280052fb57e7SAlex Deucher #define MC_RPB_RD_SWITCH_CNTL__QUEUE0_SWITCH_NUM__SHIFT 0x0 280152fb57e7SAlex Deucher #define MC_RPB_RD_SWITCH_CNTL__QUEUE1_SWITCH_NUM_MASK 0xff00 280252fb57e7SAlex Deucher #define MC_RPB_RD_SWITCH_CNTL__QUEUE1_SWITCH_NUM__SHIFT 0x8 280352fb57e7SAlex Deucher #define MC_RPB_RD_SWITCH_CNTL__QUEUE2_SWITCH_NUM_MASK 0xff0000 280452fb57e7SAlex Deucher #define MC_RPB_RD_SWITCH_CNTL__QUEUE2_SWITCH_NUM__SHIFT 0x10 280552fb57e7SAlex Deucher #define MC_RPB_RD_SWITCH_CNTL__QUEUE3_SWITCH_NUM_MASK 0xff000000 280652fb57e7SAlex Deucher #define MC_RPB_RD_SWITCH_CNTL__QUEUE3_SWITCH_NUM__SHIFT 0x18 280752fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_WR__CLIENT_ID_MASK 0xff 280852fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 0x0 280952fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_WR__UPDATE_MODE_MASK 0x100 281052fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_WR__UPDATE_MODE__SHIFT 0x8 281152fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_WR__WRITE_QUEUE_MASK 0x600 281252fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_WR__WRITE_QUEUE__SHIFT 0x9 281352fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_WR__READ_QUEUE_MASK 0x1800 281452fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_WR__READ_QUEUE__SHIFT 0xb 281552fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_WR__UPDATE_MASK 0x2000 281652fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_WR__UPDATE__SHIFT 0xd 281752fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_RD__CLIENT_ID_MASK 0xff 281852fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_RD__CLIENT_ID__SHIFT 0x0 281952fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_RD__WRITE_QUEUE_MASK 0x300 282052fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_RD__WRITE_QUEUE__SHIFT 0x8 282152fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_RD__READ_QUEUE_MASK 0xc00 282252fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_RD__READ_QUEUE__SHIFT 0xa 282352fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__PERF_COUNTER_SELECT_MASK 0x3 282452fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 282552fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__CLEAR_SELECTED_PERF_COUNTER_MASK 0x4 282652fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__CLEAR_SELECTED_PERF_COUNTER__SHIFT 0x2 282752fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__CLEAR_ALL_PERF_COUNTERS_MASK 0x8 282852fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__CLEAR_ALL_PERF_COUNTERS__SHIFT 0x3 282952fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__STOP_ON_COUNTER_SATURATION_MASK 0x10 283052fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__STOP_ON_COUNTER_SATURATION__SHIFT 0x4 283152fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__ENABLE_PERF_COUNTERS_MASK 0x1e0 283252fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__ENABLE_PERF_COUNTERS__SHIFT 0x5 283352fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_0_MASK 0x3e00 283452fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_0__SHIFT 0x9 283552fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_1_MASK 0x7c000 283652fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_1__SHIFT 0xe 283752fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_2_MASK 0xf80000 283852fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_2__SHIFT 0x13 283952fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_3_MASK 0x1f000000 284052fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_3__SHIFT 0x18 284152fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_STATUS__PERFORMANCE_COUNTER_VALUE_MASK 0xffffffff 284252fb57e7SAlex Deucher #define MC_RPB_PERF_COUNTER_STATUS__PERFORMANCE_COUNTER_VALUE__SHIFT 0x0 284352fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_EX__START_MASK 0x1 284452fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_EX__START__SHIFT 0x0 284552fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_EX__OFFSET_MASK 0x3e 284652fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_EX__OFFSET__SHIFT 0x1 284752fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_EX_DATA__WRITE_ENTRIES_MASK 0xffff 284852fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_EX_DATA__WRITE_ENTRIES__SHIFT 0x0 284952fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_EX_DATA__READ_ENTRIES_MASK 0xffff0000 285052fb57e7SAlex Deucher #define MC_RPB_CID_QUEUE_EX_DATA__READ_ENTRIES__SHIFT 0x10 285152fb57e7SAlex Deucher #define MC_SHARED_CHMAP__CHAN0_MASK 0xf 285252fb57e7SAlex Deucher #define MC_SHARED_CHMAP__CHAN0__SHIFT 0x0 285352fb57e7SAlex Deucher #define MC_SHARED_CHMAP__CHAN1_MASK 0xf0 285452fb57e7SAlex Deucher #define MC_SHARED_CHMAP__CHAN1__SHIFT 0x4 285552fb57e7SAlex Deucher #define MC_SHARED_CHMAP__CHAN2_MASK 0xf00 285652fb57e7SAlex Deucher #define MC_SHARED_CHMAP__CHAN2__SHIFT 0x8 285752fb57e7SAlex Deucher #define MC_SHARED_CHMAP__NOOFCHAN_MASK 0xf000 285852fb57e7SAlex Deucher #define MC_SHARED_CHMAP__NOOFCHAN__SHIFT 0xc 285952fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN0_MASK 0x7 286052fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN0__SHIFT 0x0 286152fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN1_MASK 0x38 286252fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN1__SHIFT 0x3 286352fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN2_MASK 0x1c0 286452fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN2__SHIFT 0x6 286552fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN3_MASK 0xe00 286652fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN3__SHIFT 0x9 286752fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN4_MASK 0x7000 286852fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN4__SHIFT 0xc 286952fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN5_MASK 0x38000 287052fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN5__SHIFT 0xf 287152fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN6_MASK 0x1c0000 287252fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN6__SHIFT 0x12 287352fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN7_MASK 0xe00000 287452fb57e7SAlex Deucher #define MC_SHARED_CHREMAP__CHAN7__SHIFT 0x15 287552fb57e7SAlex Deucher #define MC_RD_GRP_GFX__CP_MASK 0xf 287652fb57e7SAlex Deucher #define MC_RD_GRP_GFX__CP__SHIFT 0x0 287752fb57e7SAlex Deucher #define MC_RD_GRP_GFX__SH_MASK 0xf0 287852fb57e7SAlex Deucher #define MC_RD_GRP_GFX__SH__SHIFT 0x4 287952fb57e7SAlex Deucher #define MC_RD_GRP_GFX__IA_MASK 0xf00 288052fb57e7SAlex Deucher #define MC_RD_GRP_GFX__IA__SHIFT 0x8 288152fb57e7SAlex Deucher #define MC_RD_GRP_GFX__ACPG_MASK 0xf000 288252fb57e7SAlex Deucher #define MC_RD_GRP_GFX__ACPG__SHIFT 0xc 288352fb57e7SAlex Deucher #define MC_RD_GRP_GFX__ACPO_MASK 0xf0000 288452fb57e7SAlex Deucher #define MC_RD_GRP_GFX__ACPO__SHIFT 0x10 288552fb57e7SAlex Deucher #define MC_RD_GRP_GFX__XDMAM_MASK 0xf00000 288652fb57e7SAlex Deucher #define MC_RD_GRP_GFX__XDMAM__SHIFT 0x14 288752fb57e7SAlex Deucher #define MC_WR_GRP_GFX__CP_MASK 0xf 288852fb57e7SAlex Deucher #define MC_WR_GRP_GFX__CP__SHIFT 0x0 288952fb57e7SAlex Deucher #define MC_WR_GRP_GFX__SH_MASK 0xf0 289052fb57e7SAlex Deucher #define MC_WR_GRP_GFX__SH__SHIFT 0x4 289152fb57e7SAlex Deucher #define MC_WR_GRP_GFX__ACPG_MASK 0xf00 289252fb57e7SAlex Deucher #define MC_WR_GRP_GFX__ACPG__SHIFT 0x8 289352fb57e7SAlex Deucher #define MC_WR_GRP_GFX__ACPO_MASK 0xf000 289452fb57e7SAlex Deucher #define MC_WR_GRP_GFX__ACPO__SHIFT 0xc 289552fb57e7SAlex Deucher #define MC_WR_GRP_GFX__XDMA_MASK 0xf0000 289652fb57e7SAlex Deucher #define MC_WR_GRP_GFX__XDMA__SHIFT 0x10 289752fb57e7SAlex Deucher #define MC_WR_GRP_GFX__XDMAM_MASK 0xf00000 289852fb57e7SAlex Deucher #define MC_WR_GRP_GFX__XDMAM__SHIFT 0x14 289952fb57e7SAlex Deucher #define MC_RD_GRP_SYS__RLC_MASK 0xf 290052fb57e7SAlex Deucher #define MC_RD_GRP_SYS__RLC__SHIFT 0x0 290152fb57e7SAlex Deucher #define MC_RD_GRP_SYS__VMC_MASK 0xf0 290252fb57e7SAlex Deucher #define MC_RD_GRP_SYS__VMC__SHIFT 0x4 290352fb57e7SAlex Deucher #define MC_RD_GRP_SYS__SDMA1_MASK 0xf00 290452fb57e7SAlex Deucher #define MC_RD_GRP_SYS__SDMA1__SHIFT 0x8 290552fb57e7SAlex Deucher #define MC_RD_GRP_SYS__DMIF_MASK 0xf000 290652fb57e7SAlex Deucher #define MC_RD_GRP_SYS__DMIF__SHIFT 0xc 290752fb57e7SAlex Deucher #define MC_RD_GRP_SYS__MCIF_MASK 0xf0000 290852fb57e7SAlex Deucher #define MC_RD_GRP_SYS__MCIF__SHIFT 0x10 290952fb57e7SAlex Deucher #define MC_RD_GRP_SYS__SMU_MASK 0xf00000 291052fb57e7SAlex Deucher #define MC_RD_GRP_SYS__SMU__SHIFT 0x14 291152fb57e7SAlex Deucher #define MC_RD_GRP_SYS__VCE_MASK 0xf000000 291252fb57e7SAlex Deucher #define MC_RD_GRP_SYS__VCE__SHIFT 0x18 291352fb57e7SAlex Deucher #define MC_RD_GRP_SYS__VCEU_MASK 0xf0000000 291452fb57e7SAlex Deucher #define MC_RD_GRP_SYS__VCEU__SHIFT 0x1c 291552fb57e7SAlex Deucher #define MC_WR_GRP_SYS__IH_MASK 0xf 291652fb57e7SAlex Deucher #define MC_WR_GRP_SYS__IH__SHIFT 0x0 291752fb57e7SAlex Deucher #define MC_WR_GRP_SYS__MCIF_MASK 0xf0 291852fb57e7SAlex Deucher #define MC_WR_GRP_SYS__MCIF__SHIFT 0x4 291952fb57e7SAlex Deucher #define MC_WR_GRP_SYS__RLC_MASK 0xf00 292052fb57e7SAlex Deucher #define MC_WR_GRP_SYS__RLC__SHIFT 0x8 292152fb57e7SAlex Deucher #define MC_WR_GRP_SYS__SAM_MASK 0xf000 292252fb57e7SAlex Deucher #define MC_WR_GRP_SYS__SAM__SHIFT 0xc 292352fb57e7SAlex Deucher #define MC_WR_GRP_SYS__SMU_MASK 0xf0000 292452fb57e7SAlex Deucher #define MC_WR_GRP_SYS__SMU__SHIFT 0x10 292552fb57e7SAlex Deucher #define MC_WR_GRP_SYS__SDMA1_MASK 0xf00000 292652fb57e7SAlex Deucher #define MC_WR_GRP_SYS__SDMA1__SHIFT 0x14 292752fb57e7SAlex Deucher #define MC_WR_GRP_SYS__VCE_MASK 0xf000000 292852fb57e7SAlex Deucher #define MC_WR_GRP_SYS__VCE__SHIFT 0x18 292952fb57e7SAlex Deucher #define MC_WR_GRP_SYS__VCEU_MASK 0xf0000000 293052fb57e7SAlex Deucher #define MC_WR_GRP_SYS__VCEU__SHIFT 0x1c 293152fb57e7SAlex Deucher #define MC_RD_GRP_OTH__UVD_EXT0_MASK 0xf 293252fb57e7SAlex Deucher #define MC_RD_GRP_OTH__UVD_EXT0__SHIFT 0x0 293352fb57e7SAlex Deucher #define MC_RD_GRP_OTH__SDMA0_MASK 0xf0 293452fb57e7SAlex Deucher #define MC_RD_GRP_OTH__SDMA0__SHIFT 0x4 293552fb57e7SAlex Deucher #define MC_RD_GRP_OTH__HDP_MASK 0xf00 293652fb57e7SAlex Deucher #define MC_RD_GRP_OTH__HDP__SHIFT 0x8 293752fb57e7SAlex Deucher #define MC_RD_GRP_OTH__SEM_MASK 0xf000 293852fb57e7SAlex Deucher #define MC_RD_GRP_OTH__SEM__SHIFT 0xc 293952fb57e7SAlex Deucher #define MC_RD_GRP_OTH__UMC_MASK 0xf0000 294052fb57e7SAlex Deucher #define MC_RD_GRP_OTH__UMC__SHIFT 0x10 294152fb57e7SAlex Deucher #define MC_RD_GRP_OTH__UVD_MASK 0xf00000 294252fb57e7SAlex Deucher #define MC_RD_GRP_OTH__UVD__SHIFT 0x14 294352fb57e7SAlex Deucher #define MC_RD_GRP_OTH__UVD_EXT1_MASK 0xf000000 294452fb57e7SAlex Deucher #define MC_RD_GRP_OTH__UVD_EXT1__SHIFT 0x18 294552fb57e7SAlex Deucher #define MC_RD_GRP_OTH__SAM_MASK 0xf0000000 294652fb57e7SAlex Deucher #define MC_RD_GRP_OTH__SAM__SHIFT 0x1c 294752fb57e7SAlex Deucher #define MC_WR_GRP_OTH__UVD_EXT0_MASK 0xf 294852fb57e7SAlex Deucher #define MC_WR_GRP_OTH__UVD_EXT0__SHIFT 0x0 294952fb57e7SAlex Deucher #define MC_WR_GRP_OTH__SDMA0_MASK 0xf0 295052fb57e7SAlex Deucher #define MC_WR_GRP_OTH__SDMA0__SHIFT 0x4 295152fb57e7SAlex Deucher #define MC_WR_GRP_OTH__HDP_MASK 0xf00 295252fb57e7SAlex Deucher #define MC_WR_GRP_OTH__HDP__SHIFT 0x8 295352fb57e7SAlex Deucher #define MC_WR_GRP_OTH__SEM_MASK 0xf000 295452fb57e7SAlex Deucher #define MC_WR_GRP_OTH__SEM__SHIFT 0xc 295552fb57e7SAlex Deucher #define MC_WR_GRP_OTH__UMC_MASK 0xf0000 295652fb57e7SAlex Deucher #define MC_WR_GRP_OTH__UMC__SHIFT 0x10 295752fb57e7SAlex Deucher #define MC_WR_GRP_OTH__UVD_MASK 0xf00000 295852fb57e7SAlex Deucher #define MC_WR_GRP_OTH__UVD__SHIFT 0x14 295952fb57e7SAlex Deucher #define MC_WR_GRP_OTH__XDP_MASK 0xf000000 296052fb57e7SAlex Deucher #define MC_WR_GRP_OTH__XDP__SHIFT 0x18 296152fb57e7SAlex Deucher #define MC_WR_GRP_OTH__UVD_EXT1_MASK 0xf0000000 296252fb57e7SAlex Deucher #define MC_WR_GRP_OTH__UVD_EXT1__SHIFT 0x1c 296352fb57e7SAlex Deucher #define MC_VM_FB_LOCATION__FB_BASE_MASK 0xffff 296452fb57e7SAlex Deucher #define MC_VM_FB_LOCATION__FB_BASE__SHIFT 0x0 296552fb57e7SAlex Deucher #define MC_VM_FB_LOCATION__FB_TOP_MASK 0xffff0000 296652fb57e7SAlex Deucher #define MC_VM_FB_LOCATION__FB_TOP__SHIFT 0x10 296752fb57e7SAlex Deucher #define MC_VM_AGP_TOP__AGP_TOP_MASK 0x3ffff 296852fb57e7SAlex Deucher #define MC_VM_AGP_TOP__AGP_TOP__SHIFT 0x0 296952fb57e7SAlex Deucher #define MC_VM_AGP_BOT__AGP_BOT_MASK 0x3ffff 297052fb57e7SAlex Deucher #define MC_VM_AGP_BOT__AGP_BOT__SHIFT 0x0 297152fb57e7SAlex Deucher #define MC_VM_AGP_BASE__AGP_BASE_MASK 0x3ffff 297252fb57e7SAlex Deucher #define MC_VM_AGP_BASE__AGP_BASE__SHIFT 0x0 297352fb57e7SAlex Deucher #define MC_VM_SYSTEM_APERTURE_LOW_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 297452fb57e7SAlex Deucher #define MC_VM_SYSTEM_APERTURE_LOW_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 297552fb57e7SAlex Deucher #define MC_VM_SYSTEM_APERTURE_HIGH_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 297652fb57e7SAlex Deucher #define MC_VM_SYSTEM_APERTURE_HIGH_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 297752fb57e7SAlex Deucher #define MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 297852fb57e7SAlex Deucher #define MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 297952fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_WRITE_HIT_REGION_0_MODE_MASK 0x3 298052fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_WRITE_HIT_REGION_0_MODE__SHIFT 0x0 298152fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_WRITE_HIT_REGION_1_MODE_MASK 0xc 298252fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_WRITE_HIT_REGION_1_MODE__SHIFT 0x2 298352fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_WRITE_HIT_REGION_2_MODE_MASK 0x30 298452fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_WRITE_HIT_REGION_2_MODE__SHIFT 0x4 298552fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_WRITE_HIT_REGION_3_MODE_MASK 0xc0 298652fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_WRITE_HIT_REGION_3_MODE__SHIFT 0x6 298752fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_MEMORY_WRITE_LOCAL_MASK 0x100 298852fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_MEMORY_WRITE_LOCAL__SHIFT 0x8 298952fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_MEMORY_WRITE_SYSTEM_MASK 0x200 299052fb57e7SAlex Deucher #define MC_VM_DC_WRITE_CNTL__DC_MEMORY_WRITE_SYSTEM__SHIFT 0x9 299152fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_0_LOW_ADDR__PHYSICAL_ADDRESS_MASK 0xfffffff 299252fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_0_LOW_ADDR__PHYSICAL_ADDRESS__SHIFT 0x0 299352fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_1_LOW_ADDR__PHYSICAL_ADDRESS_MASK 0xfffffff 299452fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_1_LOW_ADDR__PHYSICAL_ADDRESS__SHIFT 0x0 299552fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_2_LOW_ADDR__PHYSICAL_ADDRESS_MASK 0xfffffff 299652fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_2_LOW_ADDR__PHYSICAL_ADDRESS__SHIFT 0x0 299752fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_3_LOW_ADDR__PHYSICAL_ADDRESS_MASK 0xfffffff 299852fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_3_LOW_ADDR__PHYSICAL_ADDRESS__SHIFT 0x0 299952fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_0_HIGH_ADDR__PHYSICAL_ADDRESS_MASK 0xfffffff 300052fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_0_HIGH_ADDR__PHYSICAL_ADDRESS__SHIFT 0x0 300152fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_1_HIGH_ADDR__PHYSICAL_ADDRESS_MASK 0xfffffff 300252fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_1_HIGH_ADDR__PHYSICAL_ADDRESS__SHIFT 0x0 300352fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_2_HIGH_ADDR__PHYSICAL_ADDRESS_MASK 0xfffffff 300452fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_2_HIGH_ADDR__PHYSICAL_ADDRESS__SHIFT 0x0 300552fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_3_HIGH_ADDR__PHYSICAL_ADDRESS_MASK 0xfffffff 300652fb57e7SAlex Deucher #define MC_VM_DC_WRITE_HIT_REGION_3_HIGH_ADDR__PHYSICAL_ADDRESS__SHIFT 0x0 300752fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK 0x1 300852fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB__SHIFT 0x0 300952fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_FRAGMENT_PROCESSING_MASK 0x2 301052fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_FRAGMENT_PROCESSING__SHIFT 0x1 301152fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__SYSTEM_ACCESS_MODE_MASK 0x18 301252fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__SYSTEM_ACCESS_MODE__SHIFT 0x3 301352fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__SYSTEM_APERTURE_UNMAPPED_ACCESS_MASK 0x20 301452fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__SYSTEM_APERTURE_UNMAPPED_ACCESS__SHIFT 0x5 301552fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__ENABLE_ADVANCED_DRIVER_MODEL_MASK 0x40 301652fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__ENABLE_ADVANCED_DRIVER_MODEL__SHIFT 0x6 301752fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS_MASK 0x780 301852fb57e7SAlex Deucher #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT 0x7 301952fb57e7SAlex Deucher #define MC_VM_FB_OFFSET__FB_OFFSET_MASK 0x3ffff 302052fb57e7SAlex Deucher #define MC_VM_FB_OFFSET__FB_OFFSET__SHIFT 0x0 302152fb57e7SAlex Deucher #define MC_VM_STEERING__DEFAULT_STEERING_MASK 0x3 302252fb57e7SAlex Deucher #define MC_VM_STEERING__DEFAULT_STEERING__SHIFT 0x0 302352fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD0_WR_ENABLE_MASK 0x1 302452fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD0_WR_ENABLE__SHIFT 0x0 302552fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD1_WR_ENABLE_MASK 0x2 302652fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD1_WR_ENABLE__SHIFT 0x1 302752fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD2_WR_ENABLE_MASK 0x4 302852fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD2_WR_ENABLE__SHIFT 0x2 302952fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD3_WR_ENABLE_MASK 0x8 303052fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD3_WR_ENABLE__SHIFT 0x3 303152fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD4_WR_ENABLE_MASK 0x10 303252fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD4_WR_ENABLE__SHIFT 0x4 303352fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD5_WR_ENABLE_MASK 0x20 303452fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD5_WR_ENABLE__SHIFT 0x5 303552fb57e7SAlex Deucher #define MC_CONFIG_MCD__MC_RD_ENABLE_MASK 0x700 303652fb57e7SAlex Deucher #define MC_CONFIG_MCD__MC_RD_ENABLE__SHIFT 0x8 303752fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD_INDEX_MODE_ENABLE_MASK 0x80000000 303852fb57e7SAlex Deucher #define MC_CONFIG_MCD__MCD_INDEX_MODE_ENABLE__SHIFT 0x1f 303952fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD0_WR_ENABLE_MASK 0x1 304052fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD0_WR_ENABLE__SHIFT 0x0 304152fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD1_WR_ENABLE_MASK 0x2 304252fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD1_WR_ENABLE__SHIFT 0x1 304352fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD2_WR_ENABLE_MASK 0x4 304452fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD2_WR_ENABLE__SHIFT 0x2 304552fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD3_WR_ENABLE_MASK 0x8 304652fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD3_WR_ENABLE__SHIFT 0x3 304752fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD4_WR_ENABLE_MASK 0x10 304852fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD4_WR_ENABLE__SHIFT 0x4 304952fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD5_WR_ENABLE_MASK 0x20 305052fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MCD5_WR_ENABLE__SHIFT 0x5 305152fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MC_RD_ENABLE_MASK 0x700 305252fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__MC_RD_ENABLE__SHIFT 0x8 305352fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__INDEX_MASK 0x1fffe000 305452fb57e7SAlex Deucher #define MC_CG_CONFIG_MCD__INDEX__SHIFT 0xd 305552fb57e7SAlex Deucher #define MC_MEM_POWER_LS__LS_SETUP_MASK 0x3f 305652fb57e7SAlex Deucher #define MC_MEM_POWER_LS__LS_SETUP__SHIFT 0x0 305752fb57e7SAlex Deucher #define MC_MEM_POWER_LS__LS_HOLD_MASK 0xfc0 305852fb57e7SAlex Deucher #define MC_MEM_POWER_LS__LS_HOLD__SHIFT 0x6 305952fb57e7SAlex Deucher #define MC_SHARED_BLACKOUT_CNTL__BLACKOUT_MODE_MASK 0x7 306052fb57e7SAlex Deucher #define MC_SHARED_BLACKOUT_CNTL__BLACKOUT_MODE__SHIFT 0x0 306152fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__INVALIDATE_L1_TLB_MASK 0x1 306252fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__INVALIDATE_L1_TLB__SHIFT 0x0 306352fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__SEND_FREE_AT_RTN_MASK 0x100 306452fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__SEND_FREE_AT_RTN__SHIFT 0x8 306552fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__EFFECTIVE_L1_TLB_SIZE_MASK 0xe00 306652fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__EFFECTIVE_L1_TLB_SIZE__SHIFT 0x9 306752fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__EFFECTIVE_L1_QUEUE_SIZE_MASK 0x7000 306852fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__EFFECTIVE_L1_QUEUE_SIZE__SHIFT 0xc 306952fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__L1_TLB_DEBUG_MASK 0x78000 307052fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__L1_TLB_DEBUG__SHIFT 0xf 307152fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__L1_TLB_FORCE_MISS_MASK 0x80000 307252fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_DEBUG__L1_TLB_FORCE_MISS__SHIFT 0x13 307352fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__INVALIDATE_L1_TLB_MASK 0x1 307452fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__INVALIDATE_L1_TLB__SHIFT 0x0 307552fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__SEND_FREE_AT_RTN_MASK 0x100 307652fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__SEND_FREE_AT_RTN__SHIFT 0x8 307752fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__EFFECTIVE_L1_TLB_SIZE_MASK 0xe00 307852fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__EFFECTIVE_L1_TLB_SIZE__SHIFT 0x9 307952fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__EFFECTIVE_L1_QUEUE_SIZE_MASK 0x7000 308052fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__EFFECTIVE_L1_QUEUE_SIZE__SHIFT 0xc 308152fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__L1_TLB_DEBUG_MASK 0x78000 308252fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__L1_TLB_DEBUG__SHIFT 0xf 308352fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__L1_TLB_FORCE_MISS_MASK 0x80000 308452fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_DEBUG__L1_TLB_FORCE_MISS__SHIFT 0x13 308552fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_STATUS__BUSY_MASK 0x1 308652fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB0_STATUS__BUSY__SHIFT 0x0 308752fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB1_STATUS__BUSY_MASK 0x1 308852fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB1_STATUS__BUSY__SHIFT 0x0 308952fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_STATUS__BUSY_MASK 0x1 309052fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB2_STATUS__BUSY__SHIFT 0x0 309152fb57e7SAlex Deucher #define MC_VM_MB_L2ARBITER_L2_CREDITS__L2_IF_CREDITS_MASK 0x3f 309252fb57e7SAlex Deucher #define MC_VM_MB_L2ARBITER_L2_CREDITS__L2_IF_CREDITS__SHIFT 0x0 309352fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__INVALIDATE_L1_TLB_MASK 0x1 309452fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__INVALIDATE_L1_TLB__SHIFT 0x0 309552fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__SEND_FREE_AT_RTN_MASK 0x100 309652fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__SEND_FREE_AT_RTN__SHIFT 0x8 309752fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__EFFECTIVE_L1_TLB_SIZE_MASK 0xe00 309852fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__EFFECTIVE_L1_TLB_SIZE__SHIFT 0x9 309952fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__EFFECTIVE_L1_QUEUE_SIZE_MASK 0x7000 310052fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__EFFECTIVE_L1_QUEUE_SIZE__SHIFT 0xc 310152fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__L1_TLB_DEBUG_MASK 0x78000 310252fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__L1_TLB_DEBUG__SHIFT 0xf 310352fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__L1_TLB_FORCE_MISS_MASK 0x80000 310452fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_DEBUG__L1_TLB_FORCE_MISS__SHIFT 0x13 310552fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_STATUS__BUSY_MASK 0x1 310652fb57e7SAlex Deucher #define MC_VM_MB_L1_TLB3_STATUS__BUSY__SHIFT 0x0 310752fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__INVALIDATE_L1_TLB_MASK 0x1 310852fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__INVALIDATE_L1_TLB__SHIFT 0x0 310952fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__SEND_FREE_AT_RTN_MASK 0x100 311052fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__SEND_FREE_AT_RTN__SHIFT 0x8 311152fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__EFFECTIVE_L1_TLB_SIZE_MASK 0xe00 311252fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__EFFECTIVE_L1_TLB_SIZE__SHIFT 0x9 311352fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__EFFECTIVE_L1_QUEUE_SIZE_MASK 0x7000 311452fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__EFFECTIVE_L1_QUEUE_SIZE__SHIFT 0xc 311552fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__L1_TLB_DEBUG_MASK 0x78000 311652fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__L1_TLB_DEBUG__SHIFT 0xf 311752fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__L1_TLB_FORCE_MISS_MASK 0x80000 311852fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_DEBUG__L1_TLB_FORCE_MISS__SHIFT 0x13 311952fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__INVALIDATE_L1_TLB_MASK 0x1 312052fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__INVALIDATE_L1_TLB__SHIFT 0x0 312152fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__SEND_FREE_AT_RTN_MASK 0x100 312252fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__SEND_FREE_AT_RTN__SHIFT 0x8 312352fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__EFFECTIVE_L1_TLB_SIZE_MASK 0xe00 312452fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__EFFECTIVE_L1_TLB_SIZE__SHIFT 0x9 312552fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__EFFECTIVE_L1_QUEUE_SIZE_MASK 0x7000 312652fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__EFFECTIVE_L1_QUEUE_SIZE__SHIFT 0xc 312752fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__L1_TLB_DEBUG_MASK 0x78000 312852fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__L1_TLB_DEBUG__SHIFT 0xf 312952fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__L1_TLB_FORCE_MISS_MASK 0x80000 313052fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_DEBUG__L1_TLB_FORCE_MISS__SHIFT 0x13 313152fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__INVALIDATE_L1_TLB_MASK 0x1 313252fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__INVALIDATE_L1_TLB__SHIFT 0x0 313352fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__SEND_FREE_AT_RTN_MASK 0x100 313452fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__SEND_FREE_AT_RTN__SHIFT 0x8 313552fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__EFFECTIVE_L1_TLB_SIZE_MASK 0xe00 313652fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__EFFECTIVE_L1_TLB_SIZE__SHIFT 0x9 313752fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__EFFECTIVE_L1_QUEUE_SIZE_MASK 0x7000 313852fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__EFFECTIVE_L1_QUEUE_SIZE__SHIFT 0xc 313952fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__L1_TLB_DEBUG_MASK 0x78000 314052fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__L1_TLB_DEBUG__SHIFT 0xf 314152fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__L1_TLB_FORCE_MISS_MASK 0x80000 314252fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_DEBUG__L1_TLB_FORCE_MISS__SHIFT 0x13 314352fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_STATUS__BUSY_MASK 0x1 314452fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB0_STATUS__BUSY__SHIFT 0x0 314552fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_STATUS__BUSY_MASK 0x1 314652fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB1_STATUS__BUSY__SHIFT 0x0 314752fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_STATUS__BUSY_MASK 0x1 314852fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB2_STATUS__BUSY__SHIFT 0x0 314952fb57e7SAlex Deucher #define MC_VM_MD_L2ARBITER_L2_CREDITS__L2_IF_CREDITS_MASK 0x3f 315052fb57e7SAlex Deucher #define MC_VM_MD_L2ARBITER_L2_CREDITS__L2_IF_CREDITS__SHIFT 0x0 315152fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__INVALIDATE_L1_TLB_MASK 0x1 315252fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__INVALIDATE_L1_TLB__SHIFT 0x0 315352fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__SEND_FREE_AT_RTN_MASK 0x100 315452fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__SEND_FREE_AT_RTN__SHIFT 0x8 315552fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__EFFECTIVE_L1_TLB_SIZE_MASK 0xe00 315652fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__EFFECTIVE_L1_TLB_SIZE__SHIFT 0x9 315752fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__EFFECTIVE_L1_QUEUE_SIZE_MASK 0x7000 315852fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__EFFECTIVE_L1_QUEUE_SIZE__SHIFT 0xc 315952fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__L1_TLB_DEBUG_MASK 0x78000 316052fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__L1_TLB_DEBUG__SHIFT 0xf 316152fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__L1_TLB_FORCE_MISS_MASK 0x80000 316252fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_DEBUG__L1_TLB_FORCE_MISS__SHIFT 0x13 316352fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_STATUS__BUSY_MASK 0x1 316452fb57e7SAlex Deucher #define MC_VM_MD_L1_TLB3_STATUS__BUSY__SHIFT 0x0 316552fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR0__BASE_ADDR_MASK 0x1ffffff 316652fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR0__BASE_ADDR__SHIFT 0x0 316752fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR1__BASE_ADDR_MASK 0x1ffffff 316852fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR1__BASE_ADDR__SHIFT 0x0 316952fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR2__BASE_ADDR_MASK 0x1ffffff 317052fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR2__BASE_ADDR__SHIFT 0x0 317152fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR3__BASE_ADDR_MASK 0x1ffffff 317252fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR3__BASE_ADDR__SHIFT 0x0 317352fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR4__BASE_ADDR_MASK 0x1ffffff 317452fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR4__BASE_ADDR__SHIFT 0x0 317552fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR5__BASE_ADDR_MASK 0x1ffffff 317652fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR5__BASE_ADDR__SHIFT 0x0 317752fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR6__BASE_ADDR_MASK 0x1ffffff 317852fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR6__BASE_ADDR__SHIFT 0x0 317952fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR7__BASE_ADDR_MASK 0x1ffffff 318052fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR7__BASE_ADDR__SHIFT 0x0 318152fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR8__BASE_ADDR_MASK 0x1ffffff 318252fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR8__BASE_ADDR__SHIFT 0x0 318352fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR9__BASE_ADDR_MASK 0x1ffffff 318452fb57e7SAlex Deucher #define MC_XPB_RTR_SRC_APRTR9__BASE_ADDR__SHIFT 0x0 318552fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_SRC_APRTR0__BASE_ADDR_MASK 0x1ffffff 318652fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_SRC_APRTR0__BASE_ADDR__SHIFT 0x0 318752fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_SRC_APRTR1__BASE_ADDR_MASK 0x1ffffff 318852fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_SRC_APRTR1__BASE_ADDR__SHIFT 0x0 318952fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_SRC_APRTR2__BASE_ADDR_MASK 0x1ffffff 319052fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_SRC_APRTR2__BASE_ADDR__SHIFT 0x0 319152fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_SRC_APRTR3__BASE_ADDR_MASK 0x1ffffff 319252fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_SRC_APRTR3__BASE_ADDR__SHIFT 0x0 319352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__NMR_MASK 0x1 319452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__NMR__SHIFT 0x0 319552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__DEST_OFFSET_MASK 0xffffe 319652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__DEST_OFFSET__SHIFT 0x1 319752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__DEST_SEL_MASK 0xf00000 319852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__DEST_SEL__SHIFT 0x14 319952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__DEST_SEL_RPB_MASK 0x1000000 320052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__DEST_SEL_RPB__SHIFT 0x18 320152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__SIDE_OK_MASK 0x2000000 320252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__SIDE_OK__SHIFT 0x19 320352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__APRTR_SIZE_MASK 0x7c000000 320452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP0__APRTR_SIZE__SHIFT 0x1a 320552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__NMR_MASK 0x1 320652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__NMR__SHIFT 0x0 320752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__DEST_OFFSET_MASK 0xffffe 320852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__DEST_OFFSET__SHIFT 0x1 320952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__DEST_SEL_MASK 0xf00000 321052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__DEST_SEL__SHIFT 0x14 321152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__DEST_SEL_RPB_MASK 0x1000000 321252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__DEST_SEL_RPB__SHIFT 0x18 321352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__SIDE_OK_MASK 0x2000000 321452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__SIDE_OK__SHIFT 0x19 321552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__APRTR_SIZE_MASK 0x7c000000 321652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP1__APRTR_SIZE__SHIFT 0x1a 321752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__NMR_MASK 0x1 321852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__NMR__SHIFT 0x0 321952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__DEST_OFFSET_MASK 0xffffe 322052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__DEST_OFFSET__SHIFT 0x1 322152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__DEST_SEL_MASK 0xf00000 322252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__DEST_SEL__SHIFT 0x14 322352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__DEST_SEL_RPB_MASK 0x1000000 322452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__DEST_SEL_RPB__SHIFT 0x18 322552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__SIDE_OK_MASK 0x2000000 322652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__SIDE_OK__SHIFT 0x19 322752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__APRTR_SIZE_MASK 0x7c000000 322852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP2__APRTR_SIZE__SHIFT 0x1a 322952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__NMR_MASK 0x1 323052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__NMR__SHIFT 0x0 323152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__DEST_OFFSET_MASK 0xffffe 323252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__DEST_OFFSET__SHIFT 0x1 323352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__DEST_SEL_MASK 0xf00000 323452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__DEST_SEL__SHIFT 0x14 323552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__DEST_SEL_RPB_MASK 0x1000000 323652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__DEST_SEL_RPB__SHIFT 0x18 323752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__SIDE_OK_MASK 0x2000000 323852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__SIDE_OK__SHIFT 0x19 323952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__APRTR_SIZE_MASK 0x7c000000 324052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP3__APRTR_SIZE__SHIFT 0x1a 324152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__NMR_MASK 0x1 324252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__NMR__SHIFT 0x0 324352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__DEST_OFFSET_MASK 0xffffe 324452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__DEST_OFFSET__SHIFT 0x1 324552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__DEST_SEL_MASK 0xf00000 324652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__DEST_SEL__SHIFT 0x14 324752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__DEST_SEL_RPB_MASK 0x1000000 324852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__DEST_SEL_RPB__SHIFT 0x18 324952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__SIDE_OK_MASK 0x2000000 325052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__SIDE_OK__SHIFT 0x19 325152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__APRTR_SIZE_MASK 0x7c000000 325252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP4__APRTR_SIZE__SHIFT 0x1a 325352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__NMR_MASK 0x1 325452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__NMR__SHIFT 0x0 325552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__DEST_OFFSET_MASK 0xffffe 325652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__DEST_OFFSET__SHIFT 0x1 325752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__DEST_SEL_MASK 0xf00000 325852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__DEST_SEL__SHIFT 0x14 325952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__DEST_SEL_RPB_MASK 0x1000000 326052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__DEST_SEL_RPB__SHIFT 0x18 326152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__SIDE_OK_MASK 0x2000000 326252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__SIDE_OK__SHIFT 0x19 326352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__APRTR_SIZE_MASK 0x7c000000 326452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP5__APRTR_SIZE__SHIFT 0x1a 326552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__NMR_MASK 0x1 326652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__NMR__SHIFT 0x0 326752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__DEST_OFFSET_MASK 0xffffe 326852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__DEST_OFFSET__SHIFT 0x1 326952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__DEST_SEL_MASK 0xf00000 327052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__DEST_SEL__SHIFT 0x14 327152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__DEST_SEL_RPB_MASK 0x1000000 327252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__DEST_SEL_RPB__SHIFT 0x18 327352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__SIDE_OK_MASK 0x2000000 327452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__SIDE_OK__SHIFT 0x19 327552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__APRTR_SIZE_MASK 0x7c000000 327652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP6__APRTR_SIZE__SHIFT 0x1a 327752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__NMR_MASK 0x1 327852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__NMR__SHIFT 0x0 327952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__DEST_OFFSET_MASK 0xffffe 328052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__DEST_OFFSET__SHIFT 0x1 328152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__DEST_SEL_MASK 0xf00000 328252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__DEST_SEL__SHIFT 0x14 328352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__DEST_SEL_RPB_MASK 0x1000000 328452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__DEST_SEL_RPB__SHIFT 0x18 328552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__SIDE_OK_MASK 0x2000000 328652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__SIDE_OK__SHIFT 0x19 328752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__APRTR_SIZE_MASK 0x7c000000 328852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP7__APRTR_SIZE__SHIFT 0x1a 328952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__NMR_MASK 0x1 329052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__NMR__SHIFT 0x0 329152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__DEST_OFFSET_MASK 0xffffe 329252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__DEST_OFFSET__SHIFT 0x1 329352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__DEST_SEL_MASK 0xf00000 329452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__DEST_SEL__SHIFT 0x14 329552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__DEST_SEL_RPB_MASK 0x1000000 329652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__DEST_SEL_RPB__SHIFT 0x18 329752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__SIDE_OK_MASK 0x2000000 329852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__SIDE_OK__SHIFT 0x19 329952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__APRTR_SIZE_MASK 0x7c000000 330052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP8__APRTR_SIZE__SHIFT 0x1a 330152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__NMR_MASK 0x1 330252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__NMR__SHIFT 0x0 330352fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__DEST_OFFSET_MASK 0xffffe 330452fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__DEST_OFFSET__SHIFT 0x1 330552fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__DEST_SEL_MASK 0xf00000 330652fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__DEST_SEL__SHIFT 0x14 330752fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__DEST_SEL_RPB_MASK 0x1000000 330852fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__DEST_SEL_RPB__SHIFT 0x18 330952fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__SIDE_OK_MASK 0x2000000 331052fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__SIDE_OK__SHIFT 0x19 331152fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__APRTR_SIZE_MASK 0x7c000000 331252fb57e7SAlex Deucher #define MC_XPB_RTR_DEST_MAP9__APRTR_SIZE__SHIFT 0x1a 331352fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__NMR_MASK 0x1 331452fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__NMR__SHIFT 0x0 331552fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__DEST_OFFSET_MASK 0xffffe 331652fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__DEST_OFFSET__SHIFT 0x1 331752fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__DEST_SEL_MASK 0xf00000 331852fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__DEST_SEL__SHIFT 0x14 331952fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__DEST_SEL_RPB_MASK 0x1000000 332052fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__DEST_SEL_RPB__SHIFT 0x18 332152fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__SIDE_OK_MASK 0x2000000 332252fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__SIDE_OK__SHIFT 0x19 332352fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__APRTR_SIZE_MASK 0x7c000000 332452fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP0__APRTR_SIZE__SHIFT 0x1a 332552fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__NMR_MASK 0x1 332652fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__NMR__SHIFT 0x0 332752fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__DEST_OFFSET_MASK 0xffffe 332852fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__DEST_OFFSET__SHIFT 0x1 332952fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__DEST_SEL_MASK 0xf00000 333052fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__DEST_SEL__SHIFT 0x14 333152fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__DEST_SEL_RPB_MASK 0x1000000 333252fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__DEST_SEL_RPB__SHIFT 0x18 333352fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__SIDE_OK_MASK 0x2000000 333452fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__SIDE_OK__SHIFT 0x19 333552fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__APRTR_SIZE_MASK 0x7c000000 333652fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP1__APRTR_SIZE__SHIFT 0x1a 333752fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__NMR_MASK 0x1 333852fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__NMR__SHIFT 0x0 333952fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__DEST_OFFSET_MASK 0xffffe 334052fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__DEST_OFFSET__SHIFT 0x1 334152fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__DEST_SEL_MASK 0xf00000 334252fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__DEST_SEL__SHIFT 0x14 334352fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__DEST_SEL_RPB_MASK 0x1000000 334452fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__DEST_SEL_RPB__SHIFT 0x18 334552fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__SIDE_OK_MASK 0x2000000 334652fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__SIDE_OK__SHIFT 0x19 334752fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__APRTR_SIZE_MASK 0x7c000000 334852fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP2__APRTR_SIZE__SHIFT 0x1a 334952fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__NMR_MASK 0x1 335052fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__NMR__SHIFT 0x0 335152fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__DEST_OFFSET_MASK 0xffffe 335252fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__DEST_OFFSET__SHIFT 0x1 335352fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__DEST_SEL_MASK 0xf00000 335452fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__DEST_SEL__SHIFT 0x14 335552fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__DEST_SEL_RPB_MASK 0x1000000 335652fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__DEST_SEL_RPB__SHIFT 0x18 335752fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__SIDE_OK_MASK 0x2000000 335852fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__SIDE_OK__SHIFT 0x19 335952fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__APRTR_SIZE_MASK 0x7c000000 336052fb57e7SAlex Deucher #define MC_XPB_XDMA_RTR_DEST_MAP3__APRTR_SIZE__SHIFT 0x1a 336152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG0__WCB_NUM_MASK 0xf 336252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG0__WCB_NUM__SHIFT 0x0 336352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG0__LB_TYPE_MASK 0x70 336452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG0__LB_TYPE__SHIFT 0x4 336552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG0__P2P_BAR_MASK 0x380 336652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG0__P2P_BAR__SHIFT 0x7 336752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG0__HOST_FLUSH_MASK 0x3c00 336852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG0__HOST_FLUSH__SHIFT 0xa 336952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG0__SIDE_FLUSH_MASK 0x3c000 337052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG0__SIDE_FLUSH__SHIFT 0xe 337152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG1__WCB_NUM_MASK 0xf 337252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG1__WCB_NUM__SHIFT 0x0 337352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG1__LB_TYPE_MASK 0x70 337452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG1__LB_TYPE__SHIFT 0x4 337552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG1__P2P_BAR_MASK 0x380 337652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG1__P2P_BAR__SHIFT 0x7 337752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG1__HOST_FLUSH_MASK 0x3c00 337852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG1__HOST_FLUSH__SHIFT 0xa 337952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG1__SIDE_FLUSH_MASK 0x3c000 338052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG1__SIDE_FLUSH__SHIFT 0xe 338152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG2__WCB_NUM_MASK 0xf 338252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG2__WCB_NUM__SHIFT 0x0 338352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG2__LB_TYPE_MASK 0x70 338452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG2__LB_TYPE__SHIFT 0x4 338552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG2__P2P_BAR_MASK 0x380 338652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG2__P2P_BAR__SHIFT 0x7 338752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG2__HOST_FLUSH_MASK 0x3c00 338852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG2__HOST_FLUSH__SHIFT 0xa 338952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG2__SIDE_FLUSH_MASK 0x3c000 339052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG2__SIDE_FLUSH__SHIFT 0xe 339152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG3__WCB_NUM_MASK 0xf 339252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG3__WCB_NUM__SHIFT 0x0 339352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG3__LB_TYPE_MASK 0x70 339452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG3__LB_TYPE__SHIFT 0x4 339552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG3__P2P_BAR_MASK 0x380 339652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG3__P2P_BAR__SHIFT 0x7 339752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG3__HOST_FLUSH_MASK 0x3c00 339852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG3__HOST_FLUSH__SHIFT 0xa 339952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG3__SIDE_FLUSH_MASK 0x3c000 340052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG3__SIDE_FLUSH__SHIFT 0xe 340152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG4__WCB_NUM_MASK 0xf 340252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG4__WCB_NUM__SHIFT 0x0 340352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG4__LB_TYPE_MASK 0x70 340452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG4__LB_TYPE__SHIFT 0x4 340552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG4__P2P_BAR_MASK 0x380 340652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG4__P2P_BAR__SHIFT 0x7 340752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG4__HOST_FLUSH_MASK 0x3c00 340852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG4__HOST_FLUSH__SHIFT 0xa 340952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG4__SIDE_FLUSH_MASK 0x3c000 341052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG4__SIDE_FLUSH__SHIFT 0xe 341152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG5__WCB_NUM_MASK 0xf 341252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG5__WCB_NUM__SHIFT 0x0 341352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG5__LB_TYPE_MASK 0x70 341452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG5__LB_TYPE__SHIFT 0x4 341552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG5__P2P_BAR_MASK 0x380 341652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG5__P2P_BAR__SHIFT 0x7 341752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG5__HOST_FLUSH_MASK 0x3c00 341852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG5__HOST_FLUSH__SHIFT 0xa 341952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG5__SIDE_FLUSH_MASK 0x3c000 342052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG5__SIDE_FLUSH__SHIFT 0xe 342152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG6__WCB_NUM_MASK 0xf 342252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG6__WCB_NUM__SHIFT 0x0 342352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG6__LB_TYPE_MASK 0x70 342452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG6__LB_TYPE__SHIFT 0x4 342552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG6__P2P_BAR_MASK 0x380 342652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG6__P2P_BAR__SHIFT 0x7 342752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG6__HOST_FLUSH_MASK 0x3c00 342852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG6__HOST_FLUSH__SHIFT 0xa 342952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG6__SIDE_FLUSH_MASK 0x3c000 343052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG6__SIDE_FLUSH__SHIFT 0xe 343152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG7__WCB_NUM_MASK 0xf 343252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG7__WCB_NUM__SHIFT 0x0 343352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG7__LB_TYPE_MASK 0x70 343452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG7__LB_TYPE__SHIFT 0x4 343552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG7__P2P_BAR_MASK 0x380 343652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG7__P2P_BAR__SHIFT 0x7 343752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG7__HOST_FLUSH_MASK 0x3c00 343852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG7__HOST_FLUSH__SHIFT 0xa 343952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG7__SIDE_FLUSH_MASK 0x3c000 344052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG7__SIDE_FLUSH__SHIFT 0xe 344152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG8__WCB_NUM_MASK 0xf 344252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG8__WCB_NUM__SHIFT 0x0 344352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG8__LB_TYPE_MASK 0x70 344452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG8__LB_TYPE__SHIFT 0x4 344552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG8__P2P_BAR_MASK 0x380 344652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG8__P2P_BAR__SHIFT 0x7 344752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG8__HOST_FLUSH_MASK 0x3c00 344852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG8__HOST_FLUSH__SHIFT 0xa 344952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG8__SIDE_FLUSH_MASK 0x3c000 345052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG8__SIDE_FLUSH__SHIFT 0xe 345152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG9__WCB_NUM_MASK 0xf 345252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG9__WCB_NUM__SHIFT 0x0 345352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG9__LB_TYPE_MASK 0x70 345452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG9__LB_TYPE__SHIFT 0x4 345552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG9__P2P_BAR_MASK 0x380 345652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG9__P2P_BAR__SHIFT 0x7 345752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG9__HOST_FLUSH_MASK 0x3c00 345852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG9__HOST_FLUSH__SHIFT 0xa 345952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG9__SIDE_FLUSH_MASK 0x3c000 346052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG9__SIDE_FLUSH__SHIFT 0xe 346152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG10__WCB_NUM_MASK 0xf 346252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG10__WCB_NUM__SHIFT 0x0 346352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG10__LB_TYPE_MASK 0x70 346452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG10__LB_TYPE__SHIFT 0x4 346552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG10__P2P_BAR_MASK 0x380 346652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG10__P2P_BAR__SHIFT 0x7 346752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG10__HOST_FLUSH_MASK 0x3c00 346852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG10__HOST_FLUSH__SHIFT 0xa 346952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG10__SIDE_FLUSH_MASK 0x3c000 347052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG10__SIDE_FLUSH__SHIFT 0xe 347152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG11__WCB_NUM_MASK 0xf 347252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG11__WCB_NUM__SHIFT 0x0 347352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG11__LB_TYPE_MASK 0x70 347452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG11__LB_TYPE__SHIFT 0x4 347552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG11__P2P_BAR_MASK 0x380 347652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG11__P2P_BAR__SHIFT 0x7 347752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG11__HOST_FLUSH_MASK 0x3c00 347852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG11__HOST_FLUSH__SHIFT 0xa 347952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG11__SIDE_FLUSH_MASK 0x3c000 348052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG11__SIDE_FLUSH__SHIFT 0xe 348152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG12__WCB_NUM_MASK 0xf 348252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG12__WCB_NUM__SHIFT 0x0 348352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG12__LB_TYPE_MASK 0x70 348452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG12__LB_TYPE__SHIFT 0x4 348552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG12__P2P_BAR_MASK 0x380 348652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG12__P2P_BAR__SHIFT 0x7 348752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG12__HOST_FLUSH_MASK 0x3c00 348852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG12__HOST_FLUSH__SHIFT 0xa 348952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG12__SIDE_FLUSH_MASK 0x3c000 349052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG12__SIDE_FLUSH__SHIFT 0xe 349152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG13__WCB_NUM_MASK 0xf 349252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG13__WCB_NUM__SHIFT 0x0 349352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG13__LB_TYPE_MASK 0x70 349452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG13__LB_TYPE__SHIFT 0x4 349552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG13__P2P_BAR_MASK 0x380 349652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG13__P2P_BAR__SHIFT 0x7 349752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG13__HOST_FLUSH_MASK 0x3c00 349852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG13__HOST_FLUSH__SHIFT 0xa 349952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG13__SIDE_FLUSH_MASK 0x3c000 350052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG13__SIDE_FLUSH__SHIFT 0xe 350152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG14__WCB_NUM_MASK 0xf 350252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG14__WCB_NUM__SHIFT 0x0 350352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG14__LB_TYPE_MASK 0x70 350452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG14__LB_TYPE__SHIFT 0x4 350552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG14__P2P_BAR_MASK 0x380 350652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG14__P2P_BAR__SHIFT 0x7 350752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG14__HOST_FLUSH_MASK 0x3c00 350852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG14__HOST_FLUSH__SHIFT 0xa 350952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG14__SIDE_FLUSH_MASK 0x3c000 351052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG14__SIDE_FLUSH__SHIFT 0xe 351152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG15__WCB_NUM_MASK 0xf 351252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG15__WCB_NUM__SHIFT 0x0 351352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG15__LB_TYPE_MASK 0x70 351452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG15__LB_TYPE__SHIFT 0x4 351552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG15__P2P_BAR_MASK 0x380 351652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG15__P2P_BAR__SHIFT 0x7 351752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG15__HOST_FLUSH_MASK 0x3c00 351852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG15__HOST_FLUSH__SHIFT 0xa 351952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG15__SIDE_FLUSH_MASK 0x3c000 352052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG15__SIDE_FLUSH__SHIFT 0xe 352152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG16__WCB_NUM_MASK 0xf 352252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG16__WCB_NUM__SHIFT 0x0 352352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG16__LB_TYPE_MASK 0x70 352452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG16__LB_TYPE__SHIFT 0x4 352552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG16__P2P_BAR_MASK 0x380 352652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG16__P2P_BAR__SHIFT 0x7 352752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG16__HOST_FLUSH_MASK 0x3c00 352852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG16__HOST_FLUSH__SHIFT 0xa 352952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG16__SIDE_FLUSH_MASK 0x3c000 353052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG16__SIDE_FLUSH__SHIFT 0xe 353152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG17__WCB_NUM_MASK 0xf 353252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG17__WCB_NUM__SHIFT 0x0 353352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG17__LB_TYPE_MASK 0x70 353452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG17__LB_TYPE__SHIFT 0x4 353552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG17__P2P_BAR_MASK 0x380 353652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG17__P2P_BAR__SHIFT 0x7 353752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG17__HOST_FLUSH_MASK 0x3c00 353852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG17__HOST_FLUSH__SHIFT 0xa 353952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG17__SIDE_FLUSH_MASK 0x3c000 354052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG17__SIDE_FLUSH__SHIFT 0xe 354152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG18__WCB_NUM_MASK 0xf 354252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG18__WCB_NUM__SHIFT 0x0 354352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG18__LB_TYPE_MASK 0x70 354452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG18__LB_TYPE__SHIFT 0x4 354552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG18__P2P_BAR_MASK 0x380 354652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG18__P2P_BAR__SHIFT 0x7 354752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG18__HOST_FLUSH_MASK 0x3c00 354852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG18__HOST_FLUSH__SHIFT 0xa 354952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG18__SIDE_FLUSH_MASK 0x3c000 355052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG18__SIDE_FLUSH__SHIFT 0xe 355152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG19__WCB_NUM_MASK 0xf 355252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG19__WCB_NUM__SHIFT 0x0 355352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG19__LB_TYPE_MASK 0x70 355452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG19__LB_TYPE__SHIFT 0x4 355552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG19__P2P_BAR_MASK 0x380 355652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG19__P2P_BAR__SHIFT 0x7 355752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG19__HOST_FLUSH_MASK 0x3c00 355852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG19__HOST_FLUSH__SHIFT 0xa 355952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG19__SIDE_FLUSH_MASK 0x3c000 356052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG19__SIDE_FLUSH__SHIFT 0xe 356152fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA__CMP0_MASK 0xff 356252fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA__CMP0__SHIFT 0x0 356352fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA__MSK0_MASK 0xff00 356452fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA__MSK0__SHIFT 0x8 356552fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA__VLD0_MASK 0x10000 356652fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA__VLD0__SHIFT 0x10 356752fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA__CMP1_MASK 0x1fe0000 356852fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA__CMP1__SHIFT 0x11 356952fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA__VLD1_MASK 0x2000000 357052fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA__VLD1__SHIFT 0x19 357152fb57e7SAlex Deucher #define MC_XPB_LB_ADDR__CMP0_MASK 0x3ff 357252fb57e7SAlex Deucher #define MC_XPB_LB_ADDR__CMP0__SHIFT 0x0 357352fb57e7SAlex Deucher #define MC_XPB_LB_ADDR__MASK0_MASK 0xffc00 357452fb57e7SAlex Deucher #define MC_XPB_LB_ADDR__MASK0__SHIFT 0xa 357552fb57e7SAlex Deucher #define MC_XPB_LB_ADDR__CMP1_MASK 0x3f00000 357652fb57e7SAlex Deucher #define MC_XPB_LB_ADDR__CMP1__SHIFT 0x14 357752fb57e7SAlex Deucher #define MC_XPB_LB_ADDR__MASK1_MASK 0xfc000000 357852fb57e7SAlex Deucher #define MC_XPB_LB_ADDR__MASK1__SHIFT 0x1a 357952fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_HST__CHANGE_PREF_MASK 0x3f 358052fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_HST__CHANGE_PREF__SHIFT 0x0 358152fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_HST__STRONG_PREF_MASK 0xfc0 358252fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_HST__STRONG_PREF__SHIFT 0x6 358352fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_HST__USE_UNFULL_MASK 0x3f000 358452fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_HST__USE_UNFULL__SHIFT 0xc 358552fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_SID__CHANGE_PREF_MASK 0x3f 358652fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_SID__CHANGE_PREF__SHIFT 0x0 358752fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_SID__STRONG_PREF_MASK 0xfc0 358852fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_SID__STRONG_PREF__SHIFT 0x6 358952fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_SID__USE_UNFULL_MASK 0x3f000 359052fb57e7SAlex Deucher #define MC_XPB_UNC_THRESH_SID__USE_UNFULL__SHIFT 0xc 359152fb57e7SAlex Deucher #define MC_XPB_WCB_STS__PBUF_VLD_MASK 0xffff 359252fb57e7SAlex Deucher #define MC_XPB_WCB_STS__PBUF_VLD__SHIFT 0x0 359352fb57e7SAlex Deucher #define MC_XPB_WCB_STS__WCB_HST_DATA_BUF_CNT_MASK 0x7f0000 359452fb57e7SAlex Deucher #define MC_XPB_WCB_STS__WCB_HST_DATA_BUF_CNT__SHIFT 0x10 359552fb57e7SAlex Deucher #define MC_XPB_WCB_STS__WCB_SID_DATA_BUF_CNT_MASK 0x3f800000 359652fb57e7SAlex Deucher #define MC_XPB_WCB_STS__WCB_SID_DATA_BUF_CNT__SHIFT 0x17 359752fb57e7SAlex Deucher #define MC_XPB_WCB_CFG__TIMEOUT_MASK 0xffff 359852fb57e7SAlex Deucher #define MC_XPB_WCB_CFG__TIMEOUT__SHIFT 0x0 359952fb57e7SAlex Deucher #define MC_XPB_WCB_CFG__HST_MAX_MASK 0x30000 360052fb57e7SAlex Deucher #define MC_XPB_WCB_CFG__HST_MAX__SHIFT 0x10 360152fb57e7SAlex Deucher #define MC_XPB_WCB_CFG__SID_MAX_MASK 0xc0000 360252fb57e7SAlex Deucher #define MC_XPB_WCB_CFG__SID_MAX__SHIFT 0x12 360352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__ADDR_SIZE_MASK 0xf 360452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__ADDR_SIZE__SHIFT 0x0 360552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__SEND_BAR_MASK 0x30 360652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__SEND_BAR__SHIFT 0x4 360752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__SNOOP_MASK 0x40 360852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__SNOOP__SHIFT 0x6 360952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__SEND_DIS_MASK 0x80 361052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__SEND_DIS__SHIFT 0x7 361152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__COMPRESS_DIS_MASK 0x100 361252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__COMPRESS_DIS__SHIFT 0x8 361352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__UPDATE_DIS_MASK 0x200 361452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__UPDATE_DIS__SHIFT 0x9 361552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__REGBAR_FROM_SYSBAR_MASK 0x400 361652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__REGBAR_FROM_SYSBAR__SHIFT 0xa 361752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__RD_EN_MASK 0x800 361852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__RD_EN__SHIFT 0xb 361952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__ATC_TRANSLATED_MASK 0x1000 362052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_CFG__ATC_TRANSLATED__SHIFT 0xc 362152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__HOST_FLUSH_MASK 0xf 362252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__HOST_FLUSH__SHIFT 0x0 362352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__REG_SYS_BAR_MASK 0xf0 362452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__REG_SYS_BAR__SHIFT 0x4 362552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__MEM_SYS_BAR_MASK 0xf00 362652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__MEM_SYS_BAR__SHIFT 0x8 362752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__VALID_MASK 0x1000 362852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__VALID__SHIFT 0xc 362952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__SEND_DIS_MASK 0x2000 363052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__SEND_DIS__SHIFT 0xd 363152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__COMPRESS_DIS_MASK 0x4000 363252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__COMPRESS_DIS__SHIFT 0xe 363352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__RESERVED_MASK 0x8000 363452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__RESERVED__SHIFT 0xf 363552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__ADDRESS_MASK 0xffff0000 363652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR0__ADDRESS__SHIFT 0x10 363752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__HOST_FLUSH_MASK 0xf 363852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__HOST_FLUSH__SHIFT 0x0 363952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__REG_SYS_BAR_MASK 0xf0 364052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__REG_SYS_BAR__SHIFT 0x4 364152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__MEM_SYS_BAR_MASK 0xf00 364252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__MEM_SYS_BAR__SHIFT 0x8 364352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__VALID_MASK 0x1000 364452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__VALID__SHIFT 0xc 364552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__SEND_DIS_MASK 0x2000 364652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__SEND_DIS__SHIFT 0xd 364752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__COMPRESS_DIS_MASK 0x4000 364852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__COMPRESS_DIS__SHIFT 0xe 364952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__RESERVED_MASK 0x8000 365052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__RESERVED__SHIFT 0xf 365152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__ADDRESS_MASK 0xffff0000 365252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR1__ADDRESS__SHIFT 0x10 365352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__HOST_FLUSH_MASK 0xf 365452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__HOST_FLUSH__SHIFT 0x0 365552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__REG_SYS_BAR_MASK 0xf0 365652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__REG_SYS_BAR__SHIFT 0x4 365752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__MEM_SYS_BAR_MASK 0xf00 365852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__MEM_SYS_BAR__SHIFT 0x8 365952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__VALID_MASK 0x1000 366052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__VALID__SHIFT 0xc 366152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__SEND_DIS_MASK 0x2000 366252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__SEND_DIS__SHIFT 0xd 366352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__COMPRESS_DIS_MASK 0x4000 366452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__COMPRESS_DIS__SHIFT 0xe 366552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__RESERVED_MASK 0x8000 366652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__RESERVED__SHIFT 0xf 366752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__ADDRESS_MASK 0xffff0000 366852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR2__ADDRESS__SHIFT 0x10 366952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__HOST_FLUSH_MASK 0xf 367052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__HOST_FLUSH__SHIFT 0x0 367152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__REG_SYS_BAR_MASK 0xf0 367252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__REG_SYS_BAR__SHIFT 0x4 367352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__MEM_SYS_BAR_MASK 0xf00 367452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__MEM_SYS_BAR__SHIFT 0x8 367552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__VALID_MASK 0x1000 367652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__VALID__SHIFT 0xc 367752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__SEND_DIS_MASK 0x2000 367852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__SEND_DIS__SHIFT 0xd 367952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__COMPRESS_DIS_MASK 0x4000 368052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__COMPRESS_DIS__SHIFT 0xe 368152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__RESERVED_MASK 0x8000 368252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__RESERVED__SHIFT 0xf 368352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__ADDRESS_MASK 0xffff0000 368452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR3__ADDRESS__SHIFT 0x10 368552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__HOST_FLUSH_MASK 0xf 368652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__HOST_FLUSH__SHIFT 0x0 368752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__REG_SYS_BAR_MASK 0xf0 368852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__REG_SYS_BAR__SHIFT 0x4 368952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__MEM_SYS_BAR_MASK 0xf00 369052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__MEM_SYS_BAR__SHIFT 0x8 369152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__VALID_MASK 0x1000 369252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__VALID__SHIFT 0xc 369352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__SEND_DIS_MASK 0x2000 369452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__SEND_DIS__SHIFT 0xd 369552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__COMPRESS_DIS_MASK 0x4000 369652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__COMPRESS_DIS__SHIFT 0xe 369752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__RESERVED_MASK 0x8000 369852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__RESERVED__SHIFT 0xf 369952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__ADDRESS_MASK 0xffff0000 370052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR4__ADDRESS__SHIFT 0x10 370152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__HOST_FLUSH_MASK 0xf 370252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__HOST_FLUSH__SHIFT 0x0 370352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__REG_SYS_BAR_MASK 0xf0 370452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__REG_SYS_BAR__SHIFT 0x4 370552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__MEM_SYS_BAR_MASK 0xf00 370652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__MEM_SYS_BAR__SHIFT 0x8 370752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__VALID_MASK 0x1000 370852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__VALID__SHIFT 0xc 370952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__SEND_DIS_MASK 0x2000 371052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__SEND_DIS__SHIFT 0xd 371152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__COMPRESS_DIS_MASK 0x4000 371252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__COMPRESS_DIS__SHIFT 0xe 371352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__RESERVED_MASK 0x8000 371452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__RESERVED__SHIFT 0xf 371552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__ADDRESS_MASK 0xffff0000 371652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR5__ADDRESS__SHIFT 0x10 371752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__HOST_FLUSH_MASK 0xf 371852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__HOST_FLUSH__SHIFT 0x0 371952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__REG_SYS_BAR_MASK 0xf0 372052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__REG_SYS_BAR__SHIFT 0x4 372152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__MEM_SYS_BAR_MASK 0xf00 372252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__MEM_SYS_BAR__SHIFT 0x8 372352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__VALID_MASK 0x1000 372452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__VALID__SHIFT 0xc 372552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__SEND_DIS_MASK 0x2000 372652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__SEND_DIS__SHIFT 0xd 372752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__COMPRESS_DIS_MASK 0x4000 372852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__COMPRESS_DIS__SHIFT 0xe 372952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__RESERVED_MASK 0x8000 373052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__RESERVED__SHIFT 0xf 373152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__ADDRESS_MASK 0xffff0000 373252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR6__ADDRESS__SHIFT 0x10 373352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__HOST_FLUSH_MASK 0xf 373452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__HOST_FLUSH__SHIFT 0x0 373552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__REG_SYS_BAR_MASK 0xf0 373652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__REG_SYS_BAR__SHIFT 0x4 373752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__MEM_SYS_BAR_MASK 0xf00 373852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__MEM_SYS_BAR__SHIFT 0x8 373952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__VALID_MASK 0x1000 374052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__VALID__SHIFT 0xc 374152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__SEND_DIS_MASK 0x2000 374252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__SEND_DIS__SHIFT 0xd 374352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__COMPRESS_DIS_MASK 0x4000 374452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__COMPRESS_DIS__SHIFT 0xe 374552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__RESERVED_MASK 0x8000 374652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__RESERVED__SHIFT 0xf 374752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__ADDRESS_MASK 0xffff0000 374852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR7__ADDRESS__SHIFT 0x10 374952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__SEL_MASK 0xff 375052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__SEL__SHIFT 0x0 375152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__REG_SYS_BAR_MASK 0xf00 375252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__REG_SYS_BAR__SHIFT 0x8 375352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__VALID_MASK 0x1000 375452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__VALID__SHIFT 0xc 375552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__SEND_DIS_MASK 0x2000 375652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__SEND_DIS__SHIFT 0xd 375752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__COMPRESS_DIS_MASK 0x4000 375852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__COMPRESS_DIS__SHIFT 0xe 375952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__RESERVED_MASK 0x8000 376052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__RESERVED__SHIFT 0xf 376152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__ADDRESS_MASK 0xffff0000 376252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_SETUP__ADDRESS__SHIFT 0x10 376352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DEBUG__SEL_MASK 0xff 376452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DEBUG__SEL__SHIFT 0x0 376552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DEBUG__HOST_FLUSH_MASK 0xf00 376652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DEBUG__HOST_FLUSH__SHIFT 0x8 376752fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DEBUG__MEM_SYS_BAR_MASK 0xf000 376852fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DEBUG__MEM_SYS_BAR__SHIFT 0xc 376952fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DELTA_ABOVE__EN_MASK 0xff 377052fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DELTA_ABOVE__EN__SHIFT 0x0 377152fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DELTA_ABOVE__DELTA_MASK 0xfffff00 377252fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DELTA_ABOVE__DELTA__SHIFT 0x8 377352fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DELTA_BELOW__EN_MASK 0xff 377452fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DELTA_BELOW__EN__SHIFT 0x0 377552fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DELTA_BELOW__DELTA_MASK 0xfffff00 377652fb57e7SAlex Deucher #define MC_XPB_P2P_BAR_DELTA_BELOW__DELTA__SHIFT 0x8 377752fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR0__VALID_MASK 0x1 377852fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR0__VALID__SHIFT 0x0 377952fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR0__SIDE_OK_MASK 0x2 378052fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR0__SIDE_OK__SHIFT 0x1 378152fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR0__ADDR_MASK 0x7fffffc 378252fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR0__ADDR__SHIFT 0x2 378352fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR1__VALID_MASK 0x1 378452fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR1__VALID__SHIFT 0x0 378552fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR1__SIDE_OK_MASK 0x2 378652fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR1__SIDE_OK__SHIFT 0x1 378752fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR1__ADDR_MASK 0x7fffffc 378852fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR1__ADDR__SHIFT 0x2 378952fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR2__VALID_MASK 0x1 379052fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR2__VALID__SHIFT 0x0 379152fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR2__SIDE_OK_MASK 0x2 379252fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR2__SIDE_OK__SHIFT 0x1 379352fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR2__ADDR_MASK 0x7fffffc 379452fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR2__ADDR__SHIFT 0x2 379552fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR3__VALID_MASK 0x1 379652fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR3__VALID__SHIFT 0x0 379752fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR3__SIDE_OK_MASK 0x2 379852fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR3__SIDE_OK__SHIFT 0x1 379952fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR3__ADDR_MASK 0x7fffffc 380052fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR3__ADDR__SHIFT 0x2 380152fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR4__VALID_MASK 0x1 380252fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR4__VALID__SHIFT 0x0 380352fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR4__SIDE_OK_MASK 0x2 380452fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR4__SIDE_OK__SHIFT 0x1 380552fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR4__ADDR_MASK 0x7fffffc 380652fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR4__ADDR__SHIFT 0x2 380752fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR5__VALID_MASK 0x1 380852fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR5__VALID__SHIFT 0x0 380952fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR5__SIDE_OK_MASK 0x2 381052fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR5__SIDE_OK__SHIFT 0x1 381152fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR5__ADDR_MASK 0x7fffffc 381252fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR5__ADDR__SHIFT 0x2 381352fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR6__VALID_MASK 0x1 381452fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR6__VALID__SHIFT 0x0 381552fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR6__SIDE_OK_MASK 0x2 381652fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR6__SIDE_OK__SHIFT 0x1 381752fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR6__ADDR_MASK 0x7fffffc 381852fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR6__ADDR__SHIFT 0x2 381952fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR7__VALID_MASK 0x1 382052fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR7__VALID__SHIFT 0x0 382152fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR7__SIDE_OK_MASK 0x2 382252fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR7__SIDE_OK__SHIFT 0x1 382352fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR7__ADDR_MASK 0x7fffffc 382452fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR7__ADDR__SHIFT 0x2 382552fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR8__VALID_MASK 0x1 382652fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR8__VALID__SHIFT 0x0 382752fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR8__SIDE_OK_MASK 0x2 382852fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR8__SIDE_OK__SHIFT 0x1 382952fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR8__ADDR_MASK 0x7fffffc 383052fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR8__ADDR__SHIFT 0x2 383152fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR9__VALID_MASK 0x1 383252fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR9__VALID__SHIFT 0x0 383352fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR9__SIDE_OK_MASK 0x2 383452fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR9__SIDE_OK__SHIFT 0x1 383552fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR9__ADDR_MASK 0x7fffffc 383652fb57e7SAlex Deucher #define MC_XPB_PEER_SYS_BAR9__ADDR__SHIFT 0x2 383752fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR0__VALID_MASK 0x1 383852fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR0__VALID__SHIFT 0x0 383952fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR0__SIDE_OK_MASK 0x2 384052fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR0__SIDE_OK__SHIFT 0x1 384152fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR0__ADDR_MASK 0x7fffffc 384252fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR0__ADDR__SHIFT 0x2 384352fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR1__VALID_MASK 0x1 384452fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR1__VALID__SHIFT 0x0 384552fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR1__SIDE_OK_MASK 0x2 384652fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR1__SIDE_OK__SHIFT 0x1 384752fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR1__ADDR_MASK 0x7fffffc 384852fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR1__ADDR__SHIFT 0x2 384952fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR2__VALID_MASK 0x1 385052fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR2__VALID__SHIFT 0x0 385152fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR2__SIDE_OK_MASK 0x2 385252fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR2__SIDE_OK__SHIFT 0x1 385352fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR2__ADDR_MASK 0x7fffffc 385452fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR2__ADDR__SHIFT 0x2 385552fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR3__VALID_MASK 0x1 385652fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR3__VALID__SHIFT 0x0 385752fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR3__SIDE_OK_MASK 0x2 385852fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR3__SIDE_OK__SHIFT 0x1 385952fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR3__ADDR_MASK 0x7fffffc 386052fb57e7SAlex Deucher #define MC_XPB_XDMA_PEER_SYS_BAR3__ADDR__SHIFT 0x2 386152fb57e7SAlex Deucher #define MC_XPB_CLK_GAT__ONDLY_MASK 0x3f 386252fb57e7SAlex Deucher #define MC_XPB_CLK_GAT__ONDLY__SHIFT 0x0 386352fb57e7SAlex Deucher #define MC_XPB_CLK_GAT__OFFDLY_MASK 0xfc0 386452fb57e7SAlex Deucher #define MC_XPB_CLK_GAT__OFFDLY__SHIFT 0x6 386552fb57e7SAlex Deucher #define MC_XPB_CLK_GAT__RDYDLY_MASK 0x3f000 386652fb57e7SAlex Deucher #define MC_XPB_CLK_GAT__RDYDLY__SHIFT 0xc 386752fb57e7SAlex Deucher #define MC_XPB_CLK_GAT__ENABLE_MASK 0x40000 386852fb57e7SAlex Deucher #define MC_XPB_CLK_GAT__ENABLE__SHIFT 0x12 386952fb57e7SAlex Deucher #define MC_XPB_CLK_GAT__MEM_LS_ENABLE_MASK 0x80000 387052fb57e7SAlex Deucher #define MC_XPB_CLK_GAT__MEM_LS_ENABLE__SHIFT 0x13 387152fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__RPB_WRREQ_CRD_MASK 0xff 387252fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__RPB_WRREQ_CRD__SHIFT 0x0 387352fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__MC_WRRET_ASK_MASK 0xff00 387452fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__MC_WRRET_ASK__SHIFT 0x8 387552fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__XSP_REQ_CRD_MASK 0x7f0000 387652fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__XSP_REQ_CRD__SHIFT 0x10 387752fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__BIF_REG_SNOOP_SEL_MASK 0x800000 387852fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__BIF_REG_SNOOP_SEL__SHIFT 0x17 387952fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__BIF_REG_SNOOP_VAL_MASK 0x1000000 388052fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__BIF_REG_SNOOP_VAL__SHIFT 0x18 388152fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__BIF_MEM_SNOOP_SEL_MASK 0x2000000 388252fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__BIF_MEM_SNOOP_SEL__SHIFT 0x19 388352fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__BIF_MEM_SNOOP_VAL_MASK 0x4000000 388452fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__BIF_MEM_SNOOP_VAL__SHIFT 0x1a 388552fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__XSP_SNOOP_SEL_MASK 0x18000000 388652fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__XSP_SNOOP_SEL__SHIFT 0x1b 388752fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__XSP_SNOOP_VAL_MASK 0x20000000 388852fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__XSP_SNOOP_VAL__SHIFT 0x1d 388952fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__XSP_ORDERING_SEL_MASK 0x40000000 389052fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__XSP_ORDERING_SEL__SHIFT 0x1e 389152fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__XSP_ORDERING_VAL_MASK 0x80000000 389252fb57e7SAlex Deucher #define MC_XPB_INTF_CFG__XSP_ORDERING_VAL__SHIFT 0x1f 389352fb57e7SAlex Deucher #define MC_XPB_INTF_STS__RPB_WRREQ_CRD_MASK 0xff 389452fb57e7SAlex Deucher #define MC_XPB_INTF_STS__RPB_WRREQ_CRD__SHIFT 0x0 389552fb57e7SAlex Deucher #define MC_XPB_INTF_STS__XSP_REQ_CRD_MASK 0x7f00 389652fb57e7SAlex Deucher #define MC_XPB_INTF_STS__XSP_REQ_CRD__SHIFT 0x8 389752fb57e7SAlex Deucher #define MC_XPB_INTF_STS__HOP_DATA_BUF_FULL_MASK 0x8000 389852fb57e7SAlex Deucher #define MC_XPB_INTF_STS__HOP_DATA_BUF_FULL__SHIFT 0xf 389952fb57e7SAlex Deucher #define MC_XPB_INTF_STS__HOP_ATTR_BUF_FULL_MASK 0x10000 390052fb57e7SAlex Deucher #define MC_XPB_INTF_STS__HOP_ATTR_BUF_FULL__SHIFT 0x10 390152fb57e7SAlex Deucher #define MC_XPB_INTF_STS__CNS_BUF_FULL_MASK 0x20000 390252fb57e7SAlex Deucher #define MC_XPB_INTF_STS__CNS_BUF_FULL__SHIFT 0x11 390352fb57e7SAlex Deucher #define MC_XPB_INTF_STS__CNS_BUF_BUSY_MASK 0x40000 390452fb57e7SAlex Deucher #define MC_XPB_INTF_STS__CNS_BUF_BUSY__SHIFT 0x12 390552fb57e7SAlex Deucher #define MC_XPB_INTF_STS__RPB_RDREQ_CRD_MASK 0x7f80000 390652fb57e7SAlex Deucher #define MC_XPB_INTF_STS__RPB_RDREQ_CRD__SHIFT 0x13 390752fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_ANY_PBUF_MASK 0x1 390852fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_ANY_PBUF__SHIFT 0x0 390952fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_HST_DATA_BUF_CNT_MASK 0xfe 391052fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_HST_DATA_BUF_CNT__SHIFT 0x1 391152fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_SID_DATA_BUF_CNT_MASK 0x7f00 391252fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_SID_DATA_BUF_CNT__SHIFT 0x8 391352fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_HST_RD_PTR_BUF_FULL_MASK 0x8000 391452fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_HST_RD_PTR_BUF_FULL__SHIFT 0xf 391552fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_SID_RD_PTR_BUF_FULL_MASK 0x10000 391652fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_SID_RD_PTR_BUF_FULL__SHIFT 0x10 391752fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_HST_REQ_FIFO_FULL_MASK 0x20000 391852fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_HST_REQ_FIFO_FULL__SHIFT 0x11 391952fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_SID_REQ_FIFO_FULL_MASK 0x40000 392052fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_SID_REQ_FIFO_FULL__SHIFT 0x12 392152fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_HST_REQ_OBUF_FULL_MASK 0x80000 392252fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_HST_REQ_OBUF_FULL__SHIFT 0x13 392352fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_SID_REQ_OBUF_FULL_MASK 0x100000 392452fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_SID_REQ_OBUF_FULL__SHIFT 0x14 392552fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_HST_DATA_OBUF_FULL_MASK 0x200000 392652fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_HST_DATA_OBUF_FULL__SHIFT 0x15 392752fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_SID_DATA_OBUF_FULL_MASK 0x400000 392852fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__WCB_SID_DATA_OBUF_FULL__SHIFT 0x16 392952fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__RET_BUF_FULL_MASK 0x800000 393052fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__RET_BUF_FULL__SHIFT 0x17 393152fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__XPB_CLK_BUSY_BITS_MASK 0xff000000 393252fb57e7SAlex Deucher #define MC_XPB_PIPE_STS__XPB_CLK_BUSY_BITS__SHIFT 0x18 393352fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__WRREQ_BYPASS_XPB_MASK 0x1 393452fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__WRREQ_BYPASS_XPB__SHIFT 0x0 393552fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_CNS_RTR_REQ_MASK 0x2 393652fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_CNS_RTR_REQ__SHIFT 0x1 393752fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_RTR_RPB_WRREQ_MASK 0x4 393852fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_RTR_RPB_WRREQ__SHIFT 0x2 393952fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_RTR_MAP_REQ_MASK 0x8 394052fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_RTR_MAP_REQ__SHIFT 0x3 394152fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_MAP_WCB_REQ_MASK 0x10 394252fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_MAP_WCB_REQ__SHIFT 0x4 394352fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_WCB_SID_REQ_MASK 0x20 394452fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_WCB_SID_REQ__SHIFT 0x5 394552fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_MC_XSP_REQ_SEND_MASK 0x40 394652fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_MC_XSP_REQ_SEND__SHIFT 0x6 394752fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_WCB_HST_REQ_MASK 0x80 394852fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_WCB_HST_REQ__SHIFT 0x7 394952fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_HST_HOP_REQ_MASK 0x100 395052fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_HST_HOP_REQ__SHIFT 0x8 395152fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_XPB_RPB_REQ_ATTR_MASK 0x200 395252fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__STALL_XPB_RPB_REQ_ATTR__SHIFT 0x9 395352fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_CNS_MASK 0x400 395452fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_CNS__SHIFT 0xa 395552fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_RTR_MASK 0x800 395652fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_RTR__SHIFT 0xb 395752fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_RET_MASK 0x1000 395852fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_RET__SHIFT 0xc 395952fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_MAP_MASK 0x2000 396052fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_MAP__SHIFT 0xd 396152fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_WCB_MASK 0x4000 396252fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_WCB__SHIFT 0xe 396352fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_HST_MASK 0x8000 396452fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_HST__SHIFT 0xf 396552fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_HOP_MASK 0x10000 396652fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_HOP__SHIFT 0x10 396752fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_SID_MASK 0x20000 396852fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_SID__SHIFT 0x11 396952fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_SRB_MASK 0x40000 397052fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_SRB__SHIFT 0x12 397152fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_CGR_MASK 0x80000 397252fb57e7SAlex Deucher #define MC_XPB_SUB_CTRL__RESET_CGR__SHIFT 0x13 397352fb57e7SAlex Deucher #define MC_XPB_MAP_INVERT_FLUSH_NUM_LSB__ALTER_FLUSH_NUM_MASK 0xffff 397452fb57e7SAlex Deucher #define MC_XPB_MAP_INVERT_FLUSH_NUM_LSB__ALTER_FLUSH_NUM__SHIFT 0x0 397552fb57e7SAlex Deucher #define MC_XPB_PERF_KNOBS__CNS_FIFO_DEPTH_MASK 0x3f 397652fb57e7SAlex Deucher #define MC_XPB_PERF_KNOBS__CNS_FIFO_DEPTH__SHIFT 0x0 397752fb57e7SAlex Deucher #define MC_XPB_PERF_KNOBS__WCB_HST_FIFO_DEPTH_MASK 0xfc0 397852fb57e7SAlex Deucher #define MC_XPB_PERF_KNOBS__WCB_HST_FIFO_DEPTH__SHIFT 0x6 397952fb57e7SAlex Deucher #define MC_XPB_PERF_KNOBS__WCB_SID_FIFO_DEPTH_MASK 0x3f000 398052fb57e7SAlex Deucher #define MC_XPB_PERF_KNOBS__WCB_SID_FIFO_DEPTH__SHIFT 0xc 398152fb57e7SAlex Deucher #define MC_XPB_STICKY__BITS_MASK 0xffffffff 398252fb57e7SAlex Deucher #define MC_XPB_STICKY__BITS__SHIFT 0x0 398352fb57e7SAlex Deucher #define MC_XPB_STICKY_W1C__BITS_MASK 0xffffffff 398452fb57e7SAlex Deucher #define MC_XPB_STICKY_W1C__BITS__SHIFT 0x0 398552fb57e7SAlex Deucher #define MC_XPB_MISC_CFG__FIELDNAME0_MASK 0xff 398652fb57e7SAlex Deucher #define MC_XPB_MISC_CFG__FIELDNAME0__SHIFT 0x0 398752fb57e7SAlex Deucher #define MC_XPB_MISC_CFG__FIELDNAME1_MASK 0xff00 398852fb57e7SAlex Deucher #define MC_XPB_MISC_CFG__FIELDNAME1__SHIFT 0x8 398952fb57e7SAlex Deucher #define MC_XPB_MISC_CFG__FIELDNAME2_MASK 0xff0000 399052fb57e7SAlex Deucher #define MC_XPB_MISC_CFG__FIELDNAME2__SHIFT 0x10 399152fb57e7SAlex Deucher #define MC_XPB_MISC_CFG__FIELDNAME3_MASK 0x7f000000 399252fb57e7SAlex Deucher #define MC_XPB_MISC_CFG__FIELDNAME3__SHIFT 0x18 399352fb57e7SAlex Deucher #define MC_XPB_MISC_CFG__TRIGGERNAME_MASK 0x80000000 399452fb57e7SAlex Deucher #define MC_XPB_MISC_CFG__TRIGGERNAME__SHIFT 0x1f 399552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG20__WCB_NUM_MASK 0xf 399652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG20__WCB_NUM__SHIFT 0x0 399752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG20__LB_TYPE_MASK 0x70 399852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG20__LB_TYPE__SHIFT 0x4 399952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG20__P2P_BAR_MASK 0x380 400052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG20__P2P_BAR__SHIFT 0x7 400152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG20__HOST_FLUSH_MASK 0x3c00 400252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG20__HOST_FLUSH__SHIFT 0xa 400352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG20__SIDE_FLUSH_MASK 0x3c000 400452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG20__SIDE_FLUSH__SHIFT 0xe 400552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG21__WCB_NUM_MASK 0xf 400652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG21__WCB_NUM__SHIFT 0x0 400752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG21__LB_TYPE_MASK 0x70 400852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG21__LB_TYPE__SHIFT 0x4 400952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG21__P2P_BAR_MASK 0x380 401052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG21__P2P_BAR__SHIFT 0x7 401152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG21__HOST_FLUSH_MASK 0x3c00 401252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG21__HOST_FLUSH__SHIFT 0xa 401352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG21__SIDE_FLUSH_MASK 0x3c000 401452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG21__SIDE_FLUSH__SHIFT 0xe 401552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG22__WCB_NUM_MASK 0xf 401652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG22__WCB_NUM__SHIFT 0x0 401752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG22__LB_TYPE_MASK 0x70 401852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG22__LB_TYPE__SHIFT 0x4 401952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG22__P2P_BAR_MASK 0x380 402052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG22__P2P_BAR__SHIFT 0x7 402152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG22__HOST_FLUSH_MASK 0x3c00 402252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG22__HOST_FLUSH__SHIFT 0xa 402352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG22__SIDE_FLUSH_MASK 0x3c000 402452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG22__SIDE_FLUSH__SHIFT 0xe 402552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG23__WCB_NUM_MASK 0xf 402652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG23__WCB_NUM__SHIFT 0x0 402752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG23__LB_TYPE_MASK 0x70 402852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG23__LB_TYPE__SHIFT 0x4 402952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG23__P2P_BAR_MASK 0x380 403052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG23__P2P_BAR__SHIFT 0x7 403152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG23__HOST_FLUSH_MASK 0x3c00 403252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG23__HOST_FLUSH__SHIFT 0xa 403352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG23__SIDE_FLUSH_MASK 0x3c000 403452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG23__SIDE_FLUSH__SHIFT 0xe 403552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG24__WCB_NUM_MASK 0xf 403652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG24__WCB_NUM__SHIFT 0x0 403752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG24__LB_TYPE_MASK 0x70 403852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG24__LB_TYPE__SHIFT 0x4 403952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG24__P2P_BAR_MASK 0x380 404052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG24__P2P_BAR__SHIFT 0x7 404152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG24__HOST_FLUSH_MASK 0x3c00 404252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG24__HOST_FLUSH__SHIFT 0xa 404352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG24__SIDE_FLUSH_MASK 0x3c000 404452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG24__SIDE_FLUSH__SHIFT 0xe 404552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG25__WCB_NUM_MASK 0xf 404652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG25__WCB_NUM__SHIFT 0x0 404752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG25__LB_TYPE_MASK 0x70 404852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG25__LB_TYPE__SHIFT 0x4 404952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG25__P2P_BAR_MASK 0x380 405052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG25__P2P_BAR__SHIFT 0x7 405152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG25__HOST_FLUSH_MASK 0x3c00 405252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG25__HOST_FLUSH__SHIFT 0xa 405352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG25__SIDE_FLUSH_MASK 0x3c000 405452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG25__SIDE_FLUSH__SHIFT 0xe 405552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG26__WCB_NUM_MASK 0xf 405652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG26__WCB_NUM__SHIFT 0x0 405752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG26__LB_TYPE_MASK 0x70 405852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG26__LB_TYPE__SHIFT 0x4 405952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG26__P2P_BAR_MASK 0x380 406052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG26__P2P_BAR__SHIFT 0x7 406152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG26__HOST_FLUSH_MASK 0x3c00 406252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG26__HOST_FLUSH__SHIFT 0xa 406352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG26__SIDE_FLUSH_MASK 0x3c000 406452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG26__SIDE_FLUSH__SHIFT 0xe 406552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG27__WCB_NUM_MASK 0xf 406652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG27__WCB_NUM__SHIFT 0x0 406752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG27__LB_TYPE_MASK 0x70 406852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG27__LB_TYPE__SHIFT 0x4 406952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG27__P2P_BAR_MASK 0x380 407052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG27__P2P_BAR__SHIFT 0x7 407152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG27__HOST_FLUSH_MASK 0x3c00 407252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG27__HOST_FLUSH__SHIFT 0xa 407352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG27__SIDE_FLUSH_MASK 0x3c000 407452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG27__SIDE_FLUSH__SHIFT 0xe 407552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG28__WCB_NUM_MASK 0xf 407652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG28__WCB_NUM__SHIFT 0x0 407752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG28__LB_TYPE_MASK 0x70 407852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG28__LB_TYPE__SHIFT 0x4 407952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG28__P2P_BAR_MASK 0x380 408052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG28__P2P_BAR__SHIFT 0x7 408152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG28__HOST_FLUSH_MASK 0x3c00 408252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG28__HOST_FLUSH__SHIFT 0xa 408352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG28__SIDE_FLUSH_MASK 0x3c000 408452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG28__SIDE_FLUSH__SHIFT 0xe 408552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG29__WCB_NUM_MASK 0xf 408652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG29__WCB_NUM__SHIFT 0x0 408752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG29__LB_TYPE_MASK 0x70 408852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG29__LB_TYPE__SHIFT 0x4 408952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG29__P2P_BAR_MASK 0x380 409052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG29__P2P_BAR__SHIFT 0x7 409152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG29__HOST_FLUSH_MASK 0x3c00 409252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG29__HOST_FLUSH__SHIFT 0xa 409352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG29__SIDE_FLUSH_MASK 0x3c000 409452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG29__SIDE_FLUSH__SHIFT 0xe 409552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG30__WCB_NUM_MASK 0xf 409652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG30__WCB_NUM__SHIFT 0x0 409752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG30__LB_TYPE_MASK 0x70 409852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG30__LB_TYPE__SHIFT 0x4 409952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG30__P2P_BAR_MASK 0x380 410052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG30__P2P_BAR__SHIFT 0x7 410152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG30__HOST_FLUSH_MASK 0x3c00 410252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG30__HOST_FLUSH__SHIFT 0xa 410352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG30__SIDE_FLUSH_MASK 0x3c000 410452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG30__SIDE_FLUSH__SHIFT 0xe 410552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG31__WCB_NUM_MASK 0xf 410652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG31__WCB_NUM__SHIFT 0x0 410752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG31__LB_TYPE_MASK 0x70 410852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG31__LB_TYPE__SHIFT 0x4 410952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG31__P2P_BAR_MASK 0x380 411052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG31__P2P_BAR__SHIFT 0x7 411152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG31__HOST_FLUSH_MASK 0x3c00 411252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG31__HOST_FLUSH__SHIFT 0xa 411352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG31__SIDE_FLUSH_MASK 0x3c000 411452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG31__SIDE_FLUSH__SHIFT 0xe 411552fb57e7SAlex Deucher #define MC_XPB_INTF_CFG2__RPB_RDREQ_CRD_MASK 0xff 411652fb57e7SAlex Deucher #define MC_XPB_INTF_CFG2__RPB_RDREQ_CRD__SHIFT 0x0 411752fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA_RD__CMP0_MASK 0xff 411852fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA_RD__CMP0__SHIFT 0x0 411952fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA_RD__MSK0_MASK 0xff00 412052fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA_RD__MSK0__SHIFT 0x8 412152fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA_RD__VLD0_MASK 0x10000 412252fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA_RD__VLD0__SHIFT 0x10 412352fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA_RD__CMP1_MASK 0x1fe0000 412452fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA_RD__CMP1__SHIFT 0x11 412552fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA_RD__VLD1_MASK 0x2000000 412652fb57e7SAlex Deucher #define MC_XPB_CLG_EXTRA_RD__VLD1__SHIFT 0x19 412752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG32__WCB_NUM_MASK 0xf 412852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG32__WCB_NUM__SHIFT 0x0 412952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG32__LB_TYPE_MASK 0x70 413052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG32__LB_TYPE__SHIFT 0x4 413152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG32__P2P_BAR_MASK 0x380 413252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG32__P2P_BAR__SHIFT 0x7 413352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG32__HOST_FLUSH_MASK 0x3c00 413452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG32__HOST_FLUSH__SHIFT 0xa 413552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG32__SIDE_FLUSH_MASK 0x3c000 413652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG32__SIDE_FLUSH__SHIFT 0xe 413752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG33__WCB_NUM_MASK 0xf 413852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG33__WCB_NUM__SHIFT 0x0 413952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG33__LB_TYPE_MASK 0x70 414052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG33__LB_TYPE__SHIFT 0x4 414152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG33__P2P_BAR_MASK 0x380 414252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG33__P2P_BAR__SHIFT 0x7 414352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG33__HOST_FLUSH_MASK 0x3c00 414452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG33__HOST_FLUSH__SHIFT 0xa 414552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG33__SIDE_FLUSH_MASK 0x3c000 414652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG33__SIDE_FLUSH__SHIFT 0xe 414752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG34__WCB_NUM_MASK 0xf 414852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG34__WCB_NUM__SHIFT 0x0 414952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG34__LB_TYPE_MASK 0x70 415052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG34__LB_TYPE__SHIFT 0x4 415152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG34__P2P_BAR_MASK 0x380 415252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG34__P2P_BAR__SHIFT 0x7 415352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG34__HOST_FLUSH_MASK 0x3c00 415452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG34__HOST_FLUSH__SHIFT 0xa 415552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG34__SIDE_FLUSH_MASK 0x3c000 415652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG34__SIDE_FLUSH__SHIFT 0xe 415752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG35__WCB_NUM_MASK 0xf 415852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG35__WCB_NUM__SHIFT 0x0 415952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG35__LB_TYPE_MASK 0x70 416052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG35__LB_TYPE__SHIFT 0x4 416152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG35__P2P_BAR_MASK 0x380 416252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG35__P2P_BAR__SHIFT 0x7 416352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG35__HOST_FLUSH_MASK 0x3c00 416452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG35__HOST_FLUSH__SHIFT 0xa 416552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG35__SIDE_FLUSH_MASK 0x3c000 416652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG35__SIDE_FLUSH__SHIFT 0xe 416752fb57e7SAlex Deucher #define MC_XPB_CLG_CFG36__WCB_NUM_MASK 0xf 416852fb57e7SAlex Deucher #define MC_XPB_CLG_CFG36__WCB_NUM__SHIFT 0x0 416952fb57e7SAlex Deucher #define MC_XPB_CLG_CFG36__LB_TYPE_MASK 0x70 417052fb57e7SAlex Deucher #define MC_XPB_CLG_CFG36__LB_TYPE__SHIFT 0x4 417152fb57e7SAlex Deucher #define MC_XPB_CLG_CFG36__P2P_BAR_MASK 0x380 417252fb57e7SAlex Deucher #define MC_XPB_CLG_CFG36__P2P_BAR__SHIFT 0x7 417352fb57e7SAlex Deucher #define MC_XPB_CLG_CFG36__HOST_FLUSH_MASK 0x3c00 417452fb57e7SAlex Deucher #define MC_XPB_CLG_CFG36__HOST_FLUSH__SHIFT 0xa 417552fb57e7SAlex Deucher #define MC_XPB_CLG_CFG36__SIDE_FLUSH_MASK 0x3c000 417652fb57e7SAlex Deucher #define MC_XPB_CLG_CFG36__SIDE_FLUSH__SHIFT 0xe 417752fb57e7SAlex Deucher #define MC_XBAR_ADDR_DEC__NO_DIV_BY_3_MASK 0x1 417852fb57e7SAlex Deucher #define MC_XBAR_ADDR_DEC__NO_DIV_BY_3__SHIFT 0x0 417952fb57e7SAlex Deucher #define MC_XBAR_ADDR_DEC__GECC_MASK 0x2 418052fb57e7SAlex Deucher #define MC_XBAR_ADDR_DEC__GECC__SHIFT 0x1 418152fb57e7SAlex Deucher #define MC_XBAR_ADDR_DEC__RB_SPLIT_MASK 0x4 418252fb57e7SAlex Deucher #define MC_XBAR_ADDR_DEC__RB_SPLIT__SHIFT 0x2 418352fb57e7SAlex Deucher #define MC_XBAR_ADDR_DEC__RB_SPLIT_COLHI_MASK 0x8 418452fb57e7SAlex Deucher #define MC_XBAR_ADDR_DEC__RB_SPLIT_COLHI__SHIFT 0x3 418552fb57e7SAlex Deucher #define MC_XBAR_REMOTE__WRREQ_EN_GOQ_MASK 0x1 418652fb57e7SAlex Deucher #define MC_XBAR_REMOTE__WRREQ_EN_GOQ__SHIFT 0x0 418752fb57e7SAlex Deucher #define MC_XBAR_REMOTE__RDREQ_EN_GOQ_MASK 0x2 418852fb57e7SAlex Deucher #define MC_XBAR_REMOTE__RDREQ_EN_GOQ__SHIFT 0x1 418952fb57e7SAlex Deucher #define MC_XBAR_WRREQ_CREDIT__OUT0_MASK 0xff 419052fb57e7SAlex Deucher #define MC_XBAR_WRREQ_CREDIT__OUT0__SHIFT 0x0 419152fb57e7SAlex Deucher #define MC_XBAR_WRREQ_CREDIT__OUT1_MASK 0xff00 419252fb57e7SAlex Deucher #define MC_XBAR_WRREQ_CREDIT__OUT1__SHIFT 0x8 419352fb57e7SAlex Deucher #define MC_XBAR_WRREQ_CREDIT__OUT2_MASK 0xff0000 419452fb57e7SAlex Deucher #define MC_XBAR_WRREQ_CREDIT__OUT2__SHIFT 0x10 419552fb57e7SAlex Deucher #define MC_XBAR_WRREQ_CREDIT__OUT3_MASK 0xff000000 419652fb57e7SAlex Deucher #define MC_XBAR_WRREQ_CREDIT__OUT3__SHIFT 0x18 419752fb57e7SAlex Deucher #define MC_XBAR_RDREQ_CREDIT__OUT0_MASK 0xff 419852fb57e7SAlex Deucher #define MC_XBAR_RDREQ_CREDIT__OUT0__SHIFT 0x0 419952fb57e7SAlex Deucher #define MC_XBAR_RDREQ_CREDIT__OUT1_MASK 0xff00 420052fb57e7SAlex Deucher #define MC_XBAR_RDREQ_CREDIT__OUT1__SHIFT 0x8 420152fb57e7SAlex Deucher #define MC_XBAR_RDREQ_CREDIT__OUT2_MASK 0xff0000 420252fb57e7SAlex Deucher #define MC_XBAR_RDREQ_CREDIT__OUT2__SHIFT 0x10 420352fb57e7SAlex Deucher #define MC_XBAR_RDREQ_CREDIT__OUT3_MASK 0xff000000 420452fb57e7SAlex Deucher #define MC_XBAR_RDREQ_CREDIT__OUT3__SHIFT 0x18 420552fb57e7SAlex Deucher #define MC_XBAR_RDREQ_PRI_CREDIT__OUT0_MASK 0xff 420652fb57e7SAlex Deucher #define MC_XBAR_RDREQ_PRI_CREDIT__OUT0__SHIFT 0x0 420752fb57e7SAlex Deucher #define MC_XBAR_RDREQ_PRI_CREDIT__OUT1_MASK 0xff00 420852fb57e7SAlex Deucher #define MC_XBAR_RDREQ_PRI_CREDIT__OUT1__SHIFT 0x8 420952fb57e7SAlex Deucher #define MC_XBAR_RDREQ_PRI_CREDIT__OUT2_MASK 0xff0000 421052fb57e7SAlex Deucher #define MC_XBAR_RDREQ_PRI_CREDIT__OUT2__SHIFT 0x10 421152fb57e7SAlex Deucher #define MC_XBAR_RDREQ_PRI_CREDIT__OUT3_MASK 0xff000000 421252fb57e7SAlex Deucher #define MC_XBAR_RDREQ_PRI_CREDIT__OUT3__SHIFT 0x18 421352fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT1__OUT0_MASK 0xff 421452fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT1__OUT0__SHIFT 0x0 421552fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT1__OUT1_MASK 0xff00 421652fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT1__OUT1__SHIFT 0x8 421752fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT1__OUT2_MASK 0xff0000 421852fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT1__OUT2__SHIFT 0x10 421952fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT1__OUT3_MASK 0xff000000 422052fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT1__OUT3__SHIFT 0x18 422152fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT2__OUT4_MASK 0xff 422252fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT2__OUT4__SHIFT 0x0 422352fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT2__OUT5_MASK 0xff00 422452fb57e7SAlex Deucher #define MC_XBAR_WRRET_CREDIT2__OUT5__SHIFT 0x8 422552fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT1__OUT0_MASK 0xff 422652fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT1__OUT0__SHIFT 0x0 422752fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT1__OUT1_MASK 0xff00 422852fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT1__OUT1__SHIFT 0x8 422952fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT1__OUT2_MASK 0xff0000 423052fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT1__OUT2__SHIFT 0x10 423152fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT1__OUT3_MASK 0xff000000 423252fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT1__OUT3__SHIFT 0x18 423352fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT2__OUT4_MASK 0xff 423452fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT2__OUT4__SHIFT 0x0 423552fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT2__OUT5_MASK 0xff00 423652fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT2__OUT5__SHIFT 0x8 423752fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT2__HUB_LP_RDRET_SKID_MASK 0xff0000 423852fb57e7SAlex Deucher #define MC_XBAR_RDRET_CREDIT2__HUB_LP_RDRET_SKID__SHIFT 0x10 423952fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT1__OUT0_MASK 0xff 424052fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT1__OUT0__SHIFT 0x0 424152fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT1__OUT1_MASK 0xff00 424252fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT1__OUT1__SHIFT 0x8 424352fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT1__OUT2_MASK 0xff0000 424452fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT1__OUT2__SHIFT 0x10 424552fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT1__OUT3_MASK 0xff000000 424652fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT1__OUT3__SHIFT 0x18 424752fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT2__OUT4_MASK 0xff 424852fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT2__OUT4__SHIFT 0x0 424952fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT2__OUT5_MASK 0xff00 425052fb57e7SAlex Deucher #define MC_XBAR_RDRET_PRI_CREDIT2__OUT5__SHIFT 0x8 425152fb57e7SAlex Deucher #define MC_XBAR_CHTRIREMAP__CH0_MASK 0x3 425252fb57e7SAlex Deucher #define MC_XBAR_CHTRIREMAP__CH0__SHIFT 0x0 425352fb57e7SAlex Deucher #define MC_XBAR_CHTRIREMAP__CH1_MASK 0xc 425452fb57e7SAlex Deucher #define MC_XBAR_CHTRIREMAP__CH1__SHIFT 0x2 425552fb57e7SAlex Deucher #define MC_XBAR_CHTRIREMAP__CH2_MASK 0x30 425652fb57e7SAlex Deucher #define MC_XBAR_CHTRIREMAP__CH2__SHIFT 0x4 425752fb57e7SAlex Deucher #define MC_XBAR_TWOCHAN__DISABLE_ONEPORT_MASK 0x1 425852fb57e7SAlex Deucher #define MC_XBAR_TWOCHAN__DISABLE_ONEPORT__SHIFT 0x0 425952fb57e7SAlex Deucher #define MC_XBAR_TWOCHAN__CH0_MASK 0x6 426052fb57e7SAlex Deucher #define MC_XBAR_TWOCHAN__CH0__SHIFT 0x1 426152fb57e7SAlex Deucher #define MC_XBAR_TWOCHAN__CH1_MASK 0x18 426252fb57e7SAlex Deucher #define MC_XBAR_TWOCHAN__CH1__SHIFT 0x3 426352fb57e7SAlex Deucher #define MC_XBAR_ARB__HUBRD_HIGHEST_MASK 0x1 426452fb57e7SAlex Deucher #define MC_XBAR_ARB__HUBRD_HIGHEST__SHIFT 0x0 426552fb57e7SAlex Deucher #define MC_XBAR_ARB__DISABLE_HUB_STALL_HIGHEST_MASK 0x2 426652fb57e7SAlex Deucher #define MC_XBAR_ARB__DISABLE_HUB_STALL_HIGHEST__SHIFT 0x1 426752fb57e7SAlex Deucher #define MC_XBAR_ARB__BREAK_BURST_CID_CHANGE_MASK 0x4 426852fb57e7SAlex Deucher #define MC_XBAR_ARB__BREAK_BURST_CID_CHANGE__SHIFT 0x2 426952fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__RD_PORT0_MASK 0xf 427052fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__RD_PORT0__SHIFT 0x0 427152fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__RD_PORT1_MASK 0xf0 427252fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__RD_PORT1__SHIFT 0x4 427352fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__RD_PORT2_MASK 0xf00 427452fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__RD_PORT2__SHIFT 0x8 427552fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__RD_PORT3_MASK 0xf000 427652fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__RD_PORT3__SHIFT 0xc 427752fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__WR_PORT0_MASK 0xf0000 427852fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__WR_PORT0__SHIFT 0x10 427952fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__WR_PORT1_MASK 0xf00000 428052fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__WR_PORT1__SHIFT 0x14 428152fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__WR_PORT2_MASK 0xf000000 428252fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__WR_PORT2__SHIFT 0x18 428352fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__WR_PORT3_MASK 0xf0000000 428452fb57e7SAlex Deucher #define MC_XBAR_ARB_MAX_BURST__WR_PORT3__SHIFT 0x1c 428552fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL0__START_THRESH_MASK 0xfff 428652fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL0__START_THRESH__SHIFT 0x0 428752fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL0__STOP_THRESH_MASK 0xfff000 428852fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL0__STOP_THRESH__SHIFT 0xc 428952fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL0__START_MODE_MASK 0x3000000 429052fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL0__START_MODE__SHIFT 0x18 429152fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL0__STOP_MODE_MASK 0xc000000 429252fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL0__STOP_MODE__SHIFT 0x1a 429352fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL0__ALLOW_WRAP_MASK 0x10000000 429452fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL0__ALLOW_WRAP__SHIFT 0x1c 429552fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL1__THRESH_CNTR_ID_MASK 0xff 429652fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL1__THRESH_CNTR_ID__SHIFT 0x0 429752fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL1__START_TRIG_ID_MASK 0xff00 429852fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL1__START_TRIG_ID__SHIFT 0x8 429952fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL1__STOP_TRIG_ID_MASK 0xff0000 430052fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL1__STOP_TRIG_ID__SHIFT 0x10 430152fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL2__MON0_ID_MASK 0xff 430252fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL2__MON0_ID__SHIFT 0x0 430352fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL2__MON1_ID_MASK 0xff00 430452fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL2__MON1_ID__SHIFT 0x8 430552fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL2__MON2_ID_MASK 0xff0000 430652fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL2__MON2_ID__SHIFT 0x10 430752fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL2__MON3_ID_MASK 0xff000000 430852fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_CNTL2__MON3_ID__SHIFT 0x18 430952fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_RSLT0__COUNT_MASK 0xffffffff 431052fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_RSLT0__COUNT__SHIFT 0x0 431152fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_RSLT1__COUNT_MASK 0xffffffff 431252fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_RSLT1__COUNT__SHIFT 0x0 431352fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_RSLT2__COUNT_MASK 0xffffffff 431452fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_RSLT2__COUNT__SHIFT 0x0 431552fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_RSLT3__COUNT_MASK 0xffffffff 431652fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_RSLT3__COUNT__SHIFT 0x0 431752fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_MAX_THSH__MON0_MASK 0xff 431852fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_MAX_THSH__MON0__SHIFT 0x0 431952fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_MAX_THSH__MON1_MASK 0xff00 432052fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_MAX_THSH__MON1__SHIFT 0x8 432152fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_MAX_THSH__MON2_MASK 0xff0000 432252fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_MAX_THSH__MON2__SHIFT 0x10 432352fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_MAX_THSH__MON3_MASK 0xff000000 432452fb57e7SAlex Deucher #define MC_XBAR_PERF_MON_MAX_THSH__MON3__SHIFT 0x18 432552fb57e7SAlex Deucher #define MC_XBAR_SPARE0__BIT_MASK 0xffffffff 432652fb57e7SAlex Deucher #define MC_XBAR_SPARE0__BIT__SHIFT 0x0 432752fb57e7SAlex Deucher #define MC_XBAR_SPARE1__BIT_MASK 0xffffffff 432852fb57e7SAlex Deucher #define MC_XBAR_SPARE1__BIT__SHIFT 0x0 432952fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_LO__COUNTER_LO_MASK 0xffffffff 433052fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 433152fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_LO__COUNTER_LO_MASK 0xffffffff 433252fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 433352fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_LO__COUNTER_LO_MASK 0xffffffff 433452fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 433552fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_LO__COUNTER_LO_MASK 0xffffffff 433652fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 433752fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_LO__COUNTER_LO_MASK 0xffffffff 433852fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 433952fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_LO__COUNTER_LO_MASK 0xffffffff 434052fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 434152fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_LO__COUNTER_LO_MASK 0xffffffff 434252fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 434352fb57e7SAlex Deucher #define ATC_PERFCOUNTER_LO__COUNTER_LO_MASK 0xffffffff 434452fb57e7SAlex Deucher #define ATC_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 434552fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_HI__COUNTER_HI_MASK 0xffff 434652fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 434752fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xffff0000 434852fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 434952fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_HI__COUNTER_HI_MASK 0xffff 435052fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 435152fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xffff0000 435252fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 435352fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_HI__COUNTER_HI_MASK 0xffff 435452fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 435552fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xffff0000 435652fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 435752fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_HI__COUNTER_HI_MASK 0xffff 435852fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 435952fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xffff0000 436052fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 436152fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_HI__COUNTER_HI_MASK 0xffff 436252fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 436352fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xffff0000 436452fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 436552fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_HI__COUNTER_HI_MASK 0xffff 436652fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 436752fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xffff0000 436852fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 436952fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_HI__COUNTER_HI_MASK 0xffff 437052fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 437152fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xffff0000 437252fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 437352fb57e7SAlex Deucher #define ATC_PERFCOUNTER_HI__COUNTER_HI_MASK 0xffff 437452fb57e7SAlex Deucher #define ATC_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 437552fb57e7SAlex Deucher #define ATC_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xffff0000 437652fb57e7SAlex Deucher #define ATC_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 437752fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER0_CFG__PERF_SEL_MASK 0xff 437852fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 437952fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0xff00 438052fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 438152fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER0_CFG__PERF_MODE_MASK 0xf000000 438252fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 438352fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000 438452fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 438552fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000 438652fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 438752fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER1_CFG__PERF_SEL_MASK 0xff 438852fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 438952fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0xff00 439052fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 439152fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER1_CFG__PERF_MODE_MASK 0xf000000 439252fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 439352fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 439452fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 439552fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000 439652fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 439752fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER2_CFG__PERF_SEL_MASK 0xff 439852fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER2_CFG__PERF_SEL__SHIFT 0x0 439952fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER2_CFG__PERF_SEL_END_MASK 0xff00 440052fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER2_CFG__PERF_SEL_END__SHIFT 0x8 440152fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER2_CFG__PERF_MODE_MASK 0xf000000 440252fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER2_CFG__PERF_MODE__SHIFT 0x18 440352fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER2_CFG__ENABLE_MASK 0x10000000 440452fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER2_CFG__ENABLE__SHIFT 0x1c 440552fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER2_CFG__CLEAR_MASK 0x20000000 440652fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER2_CFG__CLEAR__SHIFT 0x1d 440752fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER3_CFG__PERF_SEL_MASK 0xff 440852fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER3_CFG__PERF_SEL__SHIFT 0x0 440952fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER3_CFG__PERF_SEL_END_MASK 0xff00 441052fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER3_CFG__PERF_SEL_END__SHIFT 0x8 441152fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER3_CFG__PERF_MODE_MASK 0xf000000 441252fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER3_CFG__PERF_MODE__SHIFT 0x18 441352fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER3_CFG__ENABLE_MASK 0x10000000 441452fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER3_CFG__ENABLE__SHIFT 0x1c 441552fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER3_CFG__CLEAR_MASK 0x20000000 441652fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER3_CFG__CLEAR__SHIFT 0x1d 441752fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER0_CFG__PERF_SEL_MASK 0xff 441852fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 441952fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0xff00 442052fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 442152fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER0_CFG__PERF_MODE_MASK 0xf000000 442252fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 442352fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000 442452fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 442552fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000 442652fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 442752fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER1_CFG__PERF_SEL_MASK 0xff 442852fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 442952fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0xff00 443052fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 443152fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER1_CFG__PERF_MODE_MASK 0xf000000 443252fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 443352fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 443452fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 443552fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000 443652fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 443752fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER2_CFG__PERF_SEL_MASK 0xff 443852fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER2_CFG__PERF_SEL__SHIFT 0x0 443952fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER2_CFG__PERF_SEL_END_MASK 0xff00 444052fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER2_CFG__PERF_SEL_END__SHIFT 0x8 444152fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER2_CFG__PERF_MODE_MASK 0xf000000 444252fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER2_CFG__PERF_MODE__SHIFT 0x18 444352fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER2_CFG__ENABLE_MASK 0x10000000 444452fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER2_CFG__ENABLE__SHIFT 0x1c 444552fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER2_CFG__CLEAR_MASK 0x20000000 444652fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER2_CFG__CLEAR__SHIFT 0x1d 444752fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER3_CFG__PERF_SEL_MASK 0xff 444852fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER3_CFG__PERF_SEL__SHIFT 0x0 444952fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER3_CFG__PERF_SEL_END_MASK 0xff00 445052fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER3_CFG__PERF_SEL_END__SHIFT 0x8 445152fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER3_CFG__PERF_MODE_MASK 0xf000000 445252fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER3_CFG__PERF_MODE__SHIFT 0x18 445352fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER3_CFG__ENABLE_MASK 0x10000000 445452fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER3_CFG__ENABLE__SHIFT 0x1c 445552fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER3_CFG__CLEAR_MASK 0x20000000 445652fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER3_CFG__CLEAR__SHIFT 0x1d 445752fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER0_CFG__PERF_SEL_MASK 0xff 445852fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 445952fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0xff00 446052fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 446152fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER0_CFG__PERF_MODE_MASK 0xf000000 446252fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 446352fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000 446452fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 446552fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000 446652fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 446752fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER1_CFG__PERF_SEL_MASK 0xff 446852fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 446952fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0xff00 447052fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 447152fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER1_CFG__PERF_MODE_MASK 0xf000000 447252fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 447352fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 447452fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 447552fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000 447652fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 447752fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER2_CFG__PERF_SEL_MASK 0xff 447852fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER2_CFG__PERF_SEL__SHIFT 0x0 447952fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER2_CFG__PERF_SEL_END_MASK 0xff00 448052fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER2_CFG__PERF_SEL_END__SHIFT 0x8 448152fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER2_CFG__PERF_MODE_MASK 0xf000000 448252fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER2_CFG__PERF_MODE__SHIFT 0x18 448352fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER2_CFG__ENABLE_MASK 0x10000000 448452fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER2_CFG__ENABLE__SHIFT 0x1c 448552fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER2_CFG__CLEAR_MASK 0x20000000 448652fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER2_CFG__CLEAR__SHIFT 0x1d 448752fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER3_CFG__PERF_SEL_MASK 0xff 448852fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER3_CFG__PERF_SEL__SHIFT 0x0 448952fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER3_CFG__PERF_SEL_END_MASK 0xff00 449052fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER3_CFG__PERF_SEL_END__SHIFT 0x8 449152fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER3_CFG__PERF_MODE_MASK 0xf000000 449252fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER3_CFG__PERF_MODE__SHIFT 0x18 449352fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER3_CFG__ENABLE_MASK 0x10000000 449452fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER3_CFG__ENABLE__SHIFT 0x1c 449552fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER3_CFG__CLEAR_MASK 0x20000000 449652fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER3_CFG__CLEAR__SHIFT 0x1d 449752fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER0_CFG__PERF_SEL_MASK 0xff 449852fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 449952fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0xff00 450052fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 450152fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER0_CFG__PERF_MODE_MASK 0xf000000 450252fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 450352fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000 450452fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 450552fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000 450652fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 450752fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER1_CFG__PERF_SEL_MASK 0xff 450852fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 450952fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0xff00 451052fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 451152fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER1_CFG__PERF_MODE_MASK 0xf000000 451252fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 451352fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 451452fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 451552fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000 451652fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 451752fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER2_CFG__PERF_SEL_MASK 0xff 451852fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER2_CFG__PERF_SEL__SHIFT 0x0 451952fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER2_CFG__PERF_SEL_END_MASK 0xff00 452052fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER2_CFG__PERF_SEL_END__SHIFT 0x8 452152fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER2_CFG__PERF_MODE_MASK 0xf000000 452252fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER2_CFG__PERF_MODE__SHIFT 0x18 452352fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER2_CFG__ENABLE_MASK 0x10000000 452452fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER2_CFG__ENABLE__SHIFT 0x1c 452552fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER2_CFG__CLEAR_MASK 0x20000000 452652fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER2_CFG__CLEAR__SHIFT 0x1d 452752fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER3_CFG__PERF_SEL_MASK 0xff 452852fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER3_CFG__PERF_SEL__SHIFT 0x0 452952fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER3_CFG__PERF_SEL_END_MASK 0xff00 453052fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER3_CFG__PERF_SEL_END__SHIFT 0x8 453152fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER3_CFG__PERF_MODE_MASK 0xf000000 453252fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER3_CFG__PERF_MODE__SHIFT 0x18 453352fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER3_CFG__ENABLE_MASK 0x10000000 453452fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER3_CFG__ENABLE__SHIFT 0x1c 453552fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER3_CFG__CLEAR_MASK 0x20000000 453652fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER3_CFG__CLEAR__SHIFT 0x1d 453752fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER0_CFG__PERF_SEL_MASK 0xff 453852fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 453952fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0xff00 454052fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 454152fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER0_CFG__PERF_MODE_MASK 0xf000000 454252fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 454352fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000 454452fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 454552fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000 454652fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 454752fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER1_CFG__PERF_SEL_MASK 0xff 454852fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 454952fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0xff00 455052fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 455152fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER1_CFG__PERF_MODE_MASK 0xf000000 455252fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 455352fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 455452fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 455552fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000 455652fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 455752fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER2_CFG__PERF_SEL_MASK 0xff 455852fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER2_CFG__PERF_SEL__SHIFT 0x0 455952fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER2_CFG__PERF_SEL_END_MASK 0xff00 456052fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER2_CFG__PERF_SEL_END__SHIFT 0x8 456152fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER2_CFG__PERF_MODE_MASK 0xf000000 456252fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER2_CFG__PERF_MODE__SHIFT 0x18 456352fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER2_CFG__ENABLE_MASK 0x10000000 456452fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER2_CFG__ENABLE__SHIFT 0x1c 456552fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER2_CFG__CLEAR_MASK 0x20000000 456652fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER2_CFG__CLEAR__SHIFT 0x1d 456752fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER3_CFG__PERF_SEL_MASK 0xff 456852fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER3_CFG__PERF_SEL__SHIFT 0x0 456952fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER3_CFG__PERF_SEL_END_MASK 0xff00 457052fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER3_CFG__PERF_SEL_END__SHIFT 0x8 457152fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER3_CFG__PERF_MODE_MASK 0xf000000 457252fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER3_CFG__PERF_MODE__SHIFT 0x18 457352fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER3_CFG__ENABLE_MASK 0x10000000 457452fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER3_CFG__ENABLE__SHIFT 0x1c 457552fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER3_CFG__CLEAR_MASK 0x20000000 457652fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER3_CFG__CLEAR__SHIFT 0x1d 457752fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER0_CFG__PERF_SEL_MASK 0xff 457852fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 457952fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0xff00 458052fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 458152fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER0_CFG__PERF_MODE_MASK 0xf000000 458252fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 458352fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000 458452fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 458552fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000 458652fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 458752fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER1_CFG__PERF_SEL_MASK 0xff 458852fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 458952fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0xff00 459052fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 459152fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER1_CFG__PERF_MODE_MASK 0xf000000 459252fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 459352fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 459452fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 459552fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000 459652fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 459752fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER2_CFG__PERF_SEL_MASK 0xff 459852fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER2_CFG__PERF_SEL__SHIFT 0x0 459952fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER2_CFG__PERF_SEL_END_MASK 0xff00 460052fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER2_CFG__PERF_SEL_END__SHIFT 0x8 460152fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER2_CFG__PERF_MODE_MASK 0xf000000 460252fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER2_CFG__PERF_MODE__SHIFT 0x18 460352fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER2_CFG__ENABLE_MASK 0x10000000 460452fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER2_CFG__ENABLE__SHIFT 0x1c 460552fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER2_CFG__CLEAR_MASK 0x20000000 460652fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER2_CFG__CLEAR__SHIFT 0x1d 460752fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER3_CFG__PERF_SEL_MASK 0xff 460852fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER3_CFG__PERF_SEL__SHIFT 0x0 460952fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER3_CFG__PERF_SEL_END_MASK 0xff00 461052fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER3_CFG__PERF_SEL_END__SHIFT 0x8 461152fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER3_CFG__PERF_MODE_MASK 0xf000000 461252fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER3_CFG__PERF_MODE__SHIFT 0x18 461352fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER3_CFG__ENABLE_MASK 0x10000000 461452fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER3_CFG__ENABLE__SHIFT 0x1c 461552fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER3_CFG__CLEAR_MASK 0x20000000 461652fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER3_CFG__CLEAR__SHIFT 0x1d 461752fb57e7SAlex Deucher #define ATC_PERFCOUNTER0_CFG__PERF_SEL_MASK 0xff 461852fb57e7SAlex Deucher #define ATC_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 461952fb57e7SAlex Deucher #define ATC_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0xff00 462052fb57e7SAlex Deucher #define ATC_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 462152fb57e7SAlex Deucher #define ATC_PERFCOUNTER0_CFG__PERF_MODE_MASK 0xf000000 462252fb57e7SAlex Deucher #define ATC_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 462352fb57e7SAlex Deucher #define ATC_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000 462452fb57e7SAlex Deucher #define ATC_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 462552fb57e7SAlex Deucher #define ATC_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000 462652fb57e7SAlex Deucher #define ATC_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 462752fb57e7SAlex Deucher #define ATC_PERFCOUNTER1_CFG__PERF_SEL_MASK 0xff 462852fb57e7SAlex Deucher #define ATC_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 462952fb57e7SAlex Deucher #define ATC_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0xff00 463052fb57e7SAlex Deucher #define ATC_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 463152fb57e7SAlex Deucher #define ATC_PERFCOUNTER1_CFG__PERF_MODE_MASK 0xf000000 463252fb57e7SAlex Deucher #define ATC_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 463352fb57e7SAlex Deucher #define ATC_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 463452fb57e7SAlex Deucher #define ATC_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 463552fb57e7SAlex Deucher #define ATC_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000 463652fb57e7SAlex Deucher #define ATC_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 463752fb57e7SAlex Deucher #define ATC_PERFCOUNTER2_CFG__PERF_SEL_MASK 0xff 463852fb57e7SAlex Deucher #define ATC_PERFCOUNTER2_CFG__PERF_SEL__SHIFT 0x0 463952fb57e7SAlex Deucher #define ATC_PERFCOUNTER2_CFG__PERF_SEL_END_MASK 0xff00 464052fb57e7SAlex Deucher #define ATC_PERFCOUNTER2_CFG__PERF_SEL_END__SHIFT 0x8 464152fb57e7SAlex Deucher #define ATC_PERFCOUNTER2_CFG__PERF_MODE_MASK 0xf000000 464252fb57e7SAlex Deucher #define ATC_PERFCOUNTER2_CFG__PERF_MODE__SHIFT 0x18 464352fb57e7SAlex Deucher #define ATC_PERFCOUNTER2_CFG__ENABLE_MASK 0x10000000 464452fb57e7SAlex Deucher #define ATC_PERFCOUNTER2_CFG__ENABLE__SHIFT 0x1c 464552fb57e7SAlex Deucher #define ATC_PERFCOUNTER2_CFG__CLEAR_MASK 0x20000000 464652fb57e7SAlex Deucher #define ATC_PERFCOUNTER2_CFG__CLEAR__SHIFT 0x1d 464752fb57e7SAlex Deucher #define ATC_PERFCOUNTER3_CFG__PERF_SEL_MASK 0xff 464852fb57e7SAlex Deucher #define ATC_PERFCOUNTER3_CFG__PERF_SEL__SHIFT 0x0 464952fb57e7SAlex Deucher #define ATC_PERFCOUNTER3_CFG__PERF_SEL_END_MASK 0xff00 465052fb57e7SAlex Deucher #define ATC_PERFCOUNTER3_CFG__PERF_SEL_END__SHIFT 0x8 465152fb57e7SAlex Deucher #define ATC_PERFCOUNTER3_CFG__PERF_MODE_MASK 0xf000000 465252fb57e7SAlex Deucher #define ATC_PERFCOUNTER3_CFG__PERF_MODE__SHIFT 0x18 465352fb57e7SAlex Deucher #define ATC_PERFCOUNTER3_CFG__ENABLE_MASK 0x10000000 465452fb57e7SAlex Deucher #define ATC_PERFCOUNTER3_CFG__ENABLE__SHIFT 0x1c 465552fb57e7SAlex Deucher #define ATC_PERFCOUNTER3_CFG__CLEAR_MASK 0x20000000 465652fb57e7SAlex Deucher #define ATC_PERFCOUNTER3_CFG__CLEAR__SHIFT 0x1d 465752fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER0_CFG__PERF_SEL_MASK 0xff 465852fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 465952fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0xff00 466052fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 466152fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER0_CFG__PERF_MODE_MASK 0xf000000 466252fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 466352fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000 466452fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 466552fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000 466652fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 466752fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER1_CFG__PERF_SEL_MASK 0xff 466852fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 466952fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0xff00 467052fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 467152fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER1_CFG__PERF_MODE_MASK 0xf000000 467252fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 467352fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 467452fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 467552fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000 467652fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 467752fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0xf 467852fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 467952fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0xff00 468052fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 468152fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0xff0000 468252fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 468352fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x1000000 468452fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 468552fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x2000000 468652fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 468752fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x4000000 468852fb57e7SAlex Deucher #define MC_CITF_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 468952fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0xf 469052fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 469152fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0xff00 469252fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 469352fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0xff0000 469452fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 469552fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x1000000 469652fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 469752fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x2000000 469852fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 469952fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x4000000 470052fb57e7SAlex Deucher #define MC_HUB_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 470152fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0xf 470252fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 470352fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0xff00 470452fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 470552fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0xff0000 470652fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 470752fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x1000000 470852fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 470952fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x2000000 471052fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 471152fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x4000000 471252fb57e7SAlex Deucher #define MC_RPB_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 471352fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0xf 471452fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 471552fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0xff00 471652fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 471752fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0xff0000 471852fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 471952fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x1000000 472052fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 472152fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x2000000 472252fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 472352fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x4000000 472452fb57e7SAlex Deucher #define MC_MCBVM_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 472552fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0xf 472652fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 472752fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0xff00 472852fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 472952fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0xff0000 473052fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 473152fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x1000000 473252fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 473352fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x2000000 473452fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 473552fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x4000000 473652fb57e7SAlex Deucher #define MC_MCDVM_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 473752fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0xf 473852fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 473952fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0xff00 474052fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 474152fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0xff0000 474252fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 474352fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x1000000 474452fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 474552fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x2000000 474652fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 474752fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x4000000 474852fb57e7SAlex Deucher #define MC_VM_L2_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 474952fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0xf 475052fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 475152fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0xff00 475252fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 475352fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0xff0000 475452fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 475552fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x1000000 475652fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 475752fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x2000000 475852fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 475952fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x4000000 476052fb57e7SAlex Deucher #define MC_ARB_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 476152fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0xf 476252fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 476352fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0xff00 476452fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 476552fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0xff0000 476652fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 476752fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x1000000 476852fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 476952fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x2000000 477052fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 477152fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x4000000 477252fb57e7SAlex Deucher #define ATC_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 477352fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_LO__COUNTER_LO_MASK 0xffffffff 477452fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 477552fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_HI__COUNTER_HI_MASK 0xffff 477652fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 477752fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xffff0000 477852fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 477952fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER0_CFG__PERF_SEL_MASK 0xff 478052fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 478152fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0xff00 478252fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 478352fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER0_CFG__PERF_MODE_MASK 0xf000000 478452fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 478552fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000 478652fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 478752fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000 478852fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 478952fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER1_CFG__PERF_SEL_MASK 0xff 479052fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 479152fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0xff00 479252fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 479352fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER1_CFG__PERF_MODE_MASK 0xf000000 479452fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 479552fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 479652fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 479752fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000 479852fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 479952fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0xf 480052fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 480152fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0xff00 480252fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 480352fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0xff0000 480452fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 480552fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x1000000 480652fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 480752fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x2000000 480852fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 480952fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x4000000 481052fb57e7SAlex Deucher #define CHUB_ATC_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 481152fb57e7SAlex Deucher #define MC_ARB_PERF_MON_CNTL0_ECC__ALLOW_WRAP_MASK 0x1 481252fb57e7SAlex Deucher #define MC_ARB_PERF_MON_CNTL0_ECC__ALLOW_WRAP__SHIFT 0x0 481352fb57e7SAlex Deucher #define ATC_VM_APERTURE0_LOW_ADDR__VIRTUAL_PAGE_NUMBER_MASK 0xfffffff 481452fb57e7SAlex Deucher #define ATC_VM_APERTURE0_LOW_ADDR__VIRTUAL_PAGE_NUMBER__SHIFT 0x0 481552fb57e7SAlex Deucher #define ATC_VM_APERTURE1_LOW_ADDR__VIRTUAL_PAGE_NUMBER_MASK 0xfffffff 481652fb57e7SAlex Deucher #define ATC_VM_APERTURE1_LOW_ADDR__VIRTUAL_PAGE_NUMBER__SHIFT 0x0 481752fb57e7SAlex Deucher #define ATC_VM_APERTURE0_HIGH_ADDR__VIRTUAL_PAGE_NUMBER_MASK 0xfffffff 481852fb57e7SAlex Deucher #define ATC_VM_APERTURE0_HIGH_ADDR__VIRTUAL_PAGE_NUMBER__SHIFT 0x0 481952fb57e7SAlex Deucher #define ATC_VM_APERTURE1_HIGH_ADDR__VIRTUAL_PAGE_NUMBER_MASK 0xfffffff 482052fb57e7SAlex Deucher #define ATC_VM_APERTURE1_HIGH_ADDR__VIRTUAL_PAGE_NUMBER__SHIFT 0x0 482152fb57e7SAlex Deucher #define ATC_VM_APERTURE0_CNTL__ATS_ACCESS_MODE_MASK 0x3 482252fb57e7SAlex Deucher #define ATC_VM_APERTURE0_CNTL__ATS_ACCESS_MODE__SHIFT 0x0 482352fb57e7SAlex Deucher #define ATC_VM_APERTURE1_CNTL__ATS_ACCESS_MODE_MASK 0x3 482452fb57e7SAlex Deucher #define ATC_VM_APERTURE1_CNTL__ATS_ACCESS_MODE__SHIFT 0x0 482552fb57e7SAlex Deucher #define ATC_VM_APERTURE0_CNTL2__VMIDS_USING_RANGE_MASK 0xffff 482652fb57e7SAlex Deucher #define ATC_VM_APERTURE0_CNTL2__VMIDS_USING_RANGE__SHIFT 0x0 482752fb57e7SAlex Deucher #define ATC_VM_APERTURE1_CNTL2__VMIDS_USING_RANGE_MASK 0xffff 482852fb57e7SAlex Deucher #define ATC_VM_APERTURE1_CNTL2__VMIDS_USING_RANGE__SHIFT 0x0 482952fb57e7SAlex Deucher #define ATC_ATS_CNTL__DISABLE_ATC_MASK 0x1 483052fb57e7SAlex Deucher #define ATC_ATS_CNTL__DISABLE_ATC__SHIFT 0x0 483152fb57e7SAlex Deucher #define ATC_ATS_CNTL__DISABLE_PRI_MASK 0x2 483252fb57e7SAlex Deucher #define ATC_ATS_CNTL__DISABLE_PRI__SHIFT 0x1 483352fb57e7SAlex Deucher #define ATC_ATS_CNTL__DISABLE_PASID_MASK 0x4 483452fb57e7SAlex Deucher #define ATC_ATS_CNTL__DISABLE_PASID__SHIFT 0x2 483552fb57e7SAlex Deucher #define ATC_ATS_CNTL__CREDITS_ATS_RPB_MASK 0x3f00 483652fb57e7SAlex Deucher #define ATC_ATS_CNTL__CREDITS_ATS_RPB__SHIFT 0x8 483752fb57e7SAlex Deucher #define ATC_ATS_CNTL__DEBUG_ECO_MASK 0xf0000 483852fb57e7SAlex Deucher #define ATC_ATS_CNTL__DEBUG_ECO__SHIFT 0x10 483952fb57e7SAlex Deucher #define ATC_ATS_DEBUG__INVALIDATE_ALL_MASK 0x1 484052fb57e7SAlex Deucher #define ATC_ATS_DEBUG__INVALIDATE_ALL__SHIFT 0x0 484152fb57e7SAlex Deucher #define ATC_ATS_DEBUG__IDENT_RETURN_MASK 0x2 484252fb57e7SAlex Deucher #define ATC_ATS_DEBUG__IDENT_RETURN__SHIFT 0x1 484352fb57e7SAlex Deucher #define ATC_ATS_DEBUG__ADDRESS_TRANSLATION_REQUEST_WRITE_PERMS_MASK 0x4 484452fb57e7SAlex Deucher #define ATC_ATS_DEBUG__ADDRESS_TRANSLATION_REQUEST_WRITE_PERMS__SHIFT 0x2 484552fb57e7SAlex Deucher #define ATC_ATS_DEBUG__PAGE_REQUESTS_USE_RELAXED_ORDERING_MASK 0x20 484652fb57e7SAlex Deucher #define ATC_ATS_DEBUG__PAGE_REQUESTS_USE_RELAXED_ORDERING__SHIFT 0x5 484752fb57e7SAlex Deucher #define ATC_ATS_DEBUG__PRIV_BIT_MASK 0x40 484852fb57e7SAlex Deucher #define ATC_ATS_DEBUG__PRIV_BIT__SHIFT 0x6 484952fb57e7SAlex Deucher #define ATC_ATS_DEBUG__EXE_BIT_MASK 0x80 485052fb57e7SAlex Deucher #define ATC_ATS_DEBUG__EXE_BIT__SHIFT 0x7 485152fb57e7SAlex Deucher #define ATC_ATS_DEBUG__PAGE_REQUEST_PERMS_MASK 0x100 485252fb57e7SAlex Deucher #define ATC_ATS_DEBUG__PAGE_REQUEST_PERMS__SHIFT 0x8 485352fb57e7SAlex Deucher #define ATC_ATS_DEBUG__UNTRANSLATED_ONLY_REQUESTS_CARRY_SIZE_MASK 0x200 485452fb57e7SAlex Deucher #define ATC_ATS_DEBUG__UNTRANSLATED_ONLY_REQUESTS_CARRY_SIZE__SHIFT 0x9 485552fb57e7SAlex Deucher #define ATC_ATS_DEBUG__NUM_REQUESTS_AT_ERR_MASK 0x3c00 485652fb57e7SAlex Deucher #define ATC_ATS_DEBUG__NUM_REQUESTS_AT_ERR__SHIFT 0xa 485752fb57e7SAlex Deucher #define ATC_ATS_DEBUG__DISALLOW_ERR_TO_DONE_MASK 0x4000 485852fb57e7SAlex Deucher #define ATC_ATS_DEBUG__DISALLOW_ERR_TO_DONE__SHIFT 0xe 485952fb57e7SAlex Deucher #define ATC_ATS_DEBUG__IGNORE_FED_MASK 0x8000 486052fb57e7SAlex Deucher #define ATC_ATS_DEBUG__IGNORE_FED__SHIFT 0xf 486152fb57e7SAlex Deucher #define ATC_ATS_DEBUG__INVALIDATION_REQUESTS_DISALLOWED_WHEN_ATC_IS_DISABLED_MASK 0x10000 486252fb57e7SAlex Deucher #define ATC_ATS_DEBUG__INVALIDATION_REQUESTS_DISALLOWED_WHEN_ATC_IS_DISABLED__SHIFT 0x10 486352fb57e7SAlex Deucher #define ATC_ATS_DEBUG__DEBUG_BUS_SELECT_MASK 0x20000 486452fb57e7SAlex Deucher #define ATC_ATS_DEBUG__DEBUG_BUS_SELECT__SHIFT 0x11 486552fb57e7SAlex Deucher #define ATC_ATS_FAULT_DEBUG__CREDITS_ATS_IH_MASK 0x1f 486652fb57e7SAlex Deucher #define ATC_ATS_FAULT_DEBUG__CREDITS_ATS_IH__SHIFT 0x0 486752fb57e7SAlex Deucher #define ATC_ATS_FAULT_DEBUG__ALLOW_SUBSEQUENT_FAULT_STATUS_ADDR_UPDATES_MASK 0x100 486852fb57e7SAlex Deucher #define ATC_ATS_FAULT_DEBUG__ALLOW_SUBSEQUENT_FAULT_STATUS_ADDR_UPDATES__SHIFT 0x8 486952fb57e7SAlex Deucher #define ATC_ATS_FAULT_DEBUG__CLEAR_FAULT_STATUS_ADDR_MASK 0x10000 487052fb57e7SAlex Deucher #define ATC_ATS_FAULT_DEBUG__CLEAR_FAULT_STATUS_ADDR__SHIFT 0x10 487152fb57e7SAlex Deucher #define ATC_ATS_STATUS__BUSY_MASK 0x1 487252fb57e7SAlex Deucher #define ATC_ATS_STATUS__BUSY__SHIFT 0x0 487352fb57e7SAlex Deucher #define ATC_ATS_STATUS__CRASHED_MASK 0x2 487452fb57e7SAlex Deucher #define ATC_ATS_STATUS__CRASHED__SHIFT 0x1 487552fb57e7SAlex Deucher #define ATC_ATS_STATUS__DEADLOCK_DETECTION_MASK 0x4 487652fb57e7SAlex Deucher #define ATC_ATS_STATUS__DEADLOCK_DETECTION__SHIFT 0x2 487752fb57e7SAlex Deucher #define ATC_ATS_FAULT_CNTL__FAULT_REGISTER_LOG_MASK 0x3f 487852fb57e7SAlex Deucher #define ATC_ATS_FAULT_CNTL__FAULT_REGISTER_LOG__SHIFT 0x0 487952fb57e7SAlex Deucher #define ATC_ATS_FAULT_CNTL__FAULT_INTERRUPT_TABLE_MASK 0xfc00 488052fb57e7SAlex Deucher #define ATC_ATS_FAULT_CNTL__FAULT_INTERRUPT_TABLE__SHIFT 0xa 488152fb57e7SAlex Deucher #define ATC_ATS_FAULT_CNTL__FAULT_CRASH_TABLE_MASK 0x3f00000 488252fb57e7SAlex Deucher #define ATC_ATS_FAULT_CNTL__FAULT_CRASH_TABLE__SHIFT 0x14 488352fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__FAULT_TYPE_MASK 0x3f 488452fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__FAULT_TYPE__SHIFT 0x0 488552fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__VMID_MASK 0x7c00 488652fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__VMID__SHIFT 0xa 488752fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO_MASK 0x8000 488852fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO__SHIFT 0xf 488952fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO2_MASK 0x10000 489052fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO2__SHIFT 0x10 489152fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__INVALIDATION_MASK 0x20000 489252fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__INVALIDATION__SHIFT 0x11 489352fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__PAGE_REQUEST_MASK 0x40000 489452fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__PAGE_REQUEST__SHIFT 0x12 489552fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__STATUS_MASK 0xf80000 489652fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__STATUS__SHIFT 0x13 489752fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__PAGE_ADDR_HIGH_MASK 0xf000000 489852fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_INFO__PAGE_ADDR_HIGH__SHIFT 0x18 489952fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_ADDR__PAGE_ADDR_MASK 0xffffffff 490052fb57e7SAlex Deucher #define ATC_ATS_FAULT_STATUS_ADDR__PAGE_ADDR__SHIFT 0x0 490152fb57e7SAlex Deucher #define ATC_ATS_DEFAULT_PAGE_LOW__DEFAULT_PAGE_MASK 0xffffffff 490252fb57e7SAlex Deucher #define ATC_ATS_DEFAULT_PAGE_LOW__DEFAULT_PAGE__SHIFT 0x0 490352fb57e7SAlex Deucher #define ATC_ATS_DEFAULT_PAGE_CNTL__SEND_DEFAULT_PAGE_MASK 0x1 490452fb57e7SAlex Deucher #define ATC_ATS_DEFAULT_PAGE_CNTL__SEND_DEFAULT_PAGE__SHIFT 0x0 490552fb57e7SAlex Deucher #define ATC_ATS_DEFAULT_PAGE_CNTL__DEFAULT_PAGE_HIGH_MASK 0x3c 490652fb57e7SAlex Deucher #define ATC_ATS_DEFAULT_PAGE_CNTL__DEFAULT_PAGE_HIGH__SHIFT 0x2 490752fb57e7SAlex Deucher #define ATC_MISC_CG__OFFDLY_MASK 0xfc0 490852fb57e7SAlex Deucher #define ATC_MISC_CG__OFFDLY__SHIFT 0x6 490952fb57e7SAlex Deucher #define ATC_MISC_CG__ENABLE_MASK 0x40000 491052fb57e7SAlex Deucher #define ATC_MISC_CG__ENABLE__SHIFT 0x12 491152fb57e7SAlex Deucher #define ATC_MISC_CG__MEM_LS_ENABLE_MASK 0x80000 491252fb57e7SAlex Deucher #define ATC_MISC_CG__MEM_LS_ENABLE__SHIFT 0x13 491352fb57e7SAlex Deucher #define ATC_L2_CNTL__NUMBER_OF_TRANSLATION_READ_REQUESTS_MASK 0x3 491452fb57e7SAlex Deucher #define ATC_L2_CNTL__NUMBER_OF_TRANSLATION_READ_REQUESTS__SHIFT 0x0 491552fb57e7SAlex Deucher #define ATC_L2_CNTL__NUMBER_OF_TRANSLATION_WRITE_REQUESTS_MASK 0x30 491652fb57e7SAlex Deucher #define ATC_L2_CNTL__NUMBER_OF_TRANSLATION_WRITE_REQUESTS__SHIFT 0x4 491752fb57e7SAlex Deucher #define ATC_L2_CNTL__NUMBER_OF_TRANSLATION_READS_DEPENDS_ON_ADDR_MOD_MASK 0x100 491852fb57e7SAlex Deucher #define ATC_L2_CNTL__NUMBER_OF_TRANSLATION_READS_DEPENDS_ON_ADDR_MOD__SHIFT 0x8 491952fb57e7SAlex Deucher #define ATC_L2_CNTL__NUMBER_OF_TRANSLATION_WRITES_DEPENDS_ON_ADDR_MOD_MASK 0x200 492052fb57e7SAlex Deucher #define ATC_L2_CNTL__NUMBER_OF_TRANSLATION_WRITES_DEPENDS_ON_ADDR_MOD__SHIFT 0x9 492152fb57e7SAlex Deucher #define ATC_L2_CNTL2__BANK_SELECT_MASK 0x3f 492252fb57e7SAlex Deucher #define ATC_L2_CNTL2__BANK_SELECT__SHIFT 0x0 492352fb57e7SAlex Deucher #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK 0xc0 492452fb57e7SAlex Deucher #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT 0x6 492552fb57e7SAlex Deucher #define ATC_L2_CNTL2__ENABLE_L2_CACHE_LRU_UPDATE_BY_WRITE_MASK 0x100 492652fb57e7SAlex Deucher #define ATC_L2_CNTL2__ENABLE_L2_CACHE_LRU_UPDATE_BY_WRITE__SHIFT 0x8 492752fb57e7SAlex Deucher #define ATC_L2_CNTL2__L2_CACHE_SWAP_TAG_INDEX_LSBS_MASK 0xe00 492852fb57e7SAlex Deucher #define ATC_L2_CNTL2__L2_CACHE_SWAP_TAG_INDEX_LSBS__SHIFT 0x9 492952fb57e7SAlex Deucher #define ATC_L2_CNTL2__L2_CACHE_VMID_MODE_MASK 0x7000 493052fb57e7SAlex Deucher #define ATC_L2_CNTL2__L2_CACHE_VMID_MODE__SHIFT 0xc 493152fb57e7SAlex Deucher #define ATC_L2_CNTL2__L2_CACHE_UPDATE_WILDCARD_REFERENCE_VALUE_MASK 0x1f8000 493252fb57e7SAlex Deucher #define ATC_L2_CNTL2__L2_CACHE_UPDATE_WILDCARD_REFERENCE_VALUE__SHIFT 0xf 493352fb57e7SAlex Deucher #define ATC_L2_DEBUG__CREDITS_L2_ATS_MASK 0x3f 493452fb57e7SAlex Deucher #define ATC_L2_DEBUG__CREDITS_L2_ATS__SHIFT 0x0 493552fb57e7SAlex Deucher #define ATC_L2_DEBUG2__EFFECTIVE_CACHE_SIZE_MASK 0x1f 493652fb57e7SAlex Deucher #define ATC_L2_DEBUG2__EFFECTIVE_CACHE_SIZE__SHIFT 0x0 493752fb57e7SAlex Deucher #define ATC_L2_DEBUG2__EFFECTIVE_WORK_QUEUE_SIZE_MASK 0xe0 493852fb57e7SAlex Deucher #define ATC_L2_DEBUG2__EFFECTIVE_WORK_QUEUE_SIZE__SHIFT 0x5 493952fb57e7SAlex Deucher #define ATC_L2_DEBUG2__FORCE_CACHE_MISS_MASK 0x100 494052fb57e7SAlex Deucher #define ATC_L2_DEBUG2__FORCE_CACHE_MISS__SHIFT 0x8 494152fb57e7SAlex Deucher #define ATC_L2_DEBUG2__INVALIDATE_ALL_MASK 0x200 494252fb57e7SAlex Deucher #define ATC_L2_DEBUG2__INVALIDATE_ALL__SHIFT 0x9 494352fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x400 494452fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DISABLE_INVALIDATE_PER_DOMAIN__SHIFT 0xa 494552fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DISABLE_CACHING_SPECULATIVE_READ_RETURNS_MASK 0x800 494652fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DISABLE_CACHING_SPECULATIVE_READ_RETURNS__SHIFT 0xb 494752fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DISABLE_CACHING_SPECULATIVE_WRITE_RETURNS_MASK 0x1000 494852fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DISABLE_CACHING_SPECULATIVE_WRITE_RETURNS__SHIFT 0xc 494952fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DISABLE_CACHING_FAULT_RETURNS_MASK 0x4000 495052fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DISABLE_CACHING_FAULT_RETURNS__SHIFT 0xe 495152fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DEBUG_BUS_SELECT_MASK 0x18000 495252fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DEBUG_BUS_SELECT__SHIFT 0xf 495352fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DEBUG_ECO_MASK 0x60000 495452fb57e7SAlex Deucher #define ATC_L2_DEBUG2__DEBUG_ECO__SHIFT 0x11 495552fb57e7SAlex Deucher #define ATC_L1_CNTL__DONT_NEED_ATS_BEHAVIOR_MASK 0x3 495652fb57e7SAlex Deucher #define ATC_L1_CNTL__DONT_NEED_ATS_BEHAVIOR__SHIFT 0x0 495752fb57e7SAlex Deucher #define ATC_L1_CNTL__NEED_ATS_BEHAVIOR_MASK 0x4 495852fb57e7SAlex Deucher #define ATC_L1_CNTL__NEED_ATS_BEHAVIOR__SHIFT 0x2 495952fb57e7SAlex Deucher #define ATC_L1_CNTL__NEED_ATS_SNOOP_DEFAULT_MASK 0x10 496052fb57e7SAlex Deucher #define ATC_L1_CNTL__NEED_ATS_SNOOP_DEFAULT__SHIFT 0x4 496152fb57e7SAlex Deucher #define ATC_L1_ADDRESS_OFFSET__LOGICAL_ADDRESS_MASK 0xffffffff 496252fb57e7SAlex Deucher #define ATC_L1_ADDRESS_OFFSET__LOGICAL_ADDRESS__SHIFT 0x0 496352fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__DISABLE_FRAGMENTS_MASK 0x1 496452fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__DISABLE_FRAGMENTS__SHIFT 0x0 496552fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__DISABLE_INVALIDATE_BY_ADDRESS_RANGE_MASK 0x2 496652fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__DISABLE_INVALIDATE_BY_ADDRESS_RANGE__SHIFT 0x1 496752fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__EFFECTIVE_CAM_SIZE_MASK 0xf0 496852fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__EFFECTIVE_CAM_SIZE__SHIFT 0x4 496952fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__EFFECTIVE_WORK_QUEUE_SIZE_MASK 0x700 497052fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__EFFECTIVE_WORK_QUEUE_SIZE__SHIFT 0x8 497152fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__CREDITS_L1_L2_MASK 0x3f000 497252fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__CREDITS_L1_L2__SHIFT 0xc 497352fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__CREDITS_L1_RPB_MASK 0xff00000 497452fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__CREDITS_L1_RPB__SHIFT 0x14 497552fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__DEBUG_ECO_MASK 0x30000000 497652fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__DEBUG_ECO__SHIFT 0x1c 497752fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__INVALIDATE_ALL_MASK 0x40000000 497852fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__INVALIDATE_ALL__SHIFT 0x1e 497952fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__DISABLE_CACHING_FAULT_RETURNS_MASK 0x80000000 498052fb57e7SAlex Deucher #define ATC_L1RD_DEBUG_TLB__DISABLE_CACHING_FAULT_RETURNS__SHIFT 0x1f 498152fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__DISABLE_FRAGMENTS_MASK 0x1 498252fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__DISABLE_FRAGMENTS__SHIFT 0x0 498352fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__DISABLE_INVALIDATE_BY_ADDRESS_RANGE_MASK 0x2 498452fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__DISABLE_INVALIDATE_BY_ADDRESS_RANGE__SHIFT 0x1 498552fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__EFFECTIVE_CAM_SIZE_MASK 0xf0 498652fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__EFFECTIVE_CAM_SIZE__SHIFT 0x4 498752fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__EFFECTIVE_WORK_QUEUE_SIZE_MASK 0x700 498852fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__EFFECTIVE_WORK_QUEUE_SIZE__SHIFT 0x8 498952fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__CREDITS_L1_L2_MASK 0x3f000 499052fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__CREDITS_L1_L2__SHIFT 0xc 499152fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__CREDITS_L1_RPB_MASK 0xff00000 499252fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__CREDITS_L1_RPB__SHIFT 0x14 499352fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__DEBUG_ECO_MASK 0x30000000 499452fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__DEBUG_ECO__SHIFT 0x1c 499552fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__INVALIDATE_ALL_MASK 0x40000000 499652fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__INVALIDATE_ALL__SHIFT 0x1e 499752fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__DISABLE_CACHING_FAULT_RETURNS_MASK 0x80000000 499852fb57e7SAlex Deucher #define ATC_L1WR_DEBUG_TLB__DISABLE_CACHING_FAULT_RETURNS__SHIFT 0x1f 499952fb57e7SAlex Deucher #define ATC_L1RD_STATUS__BUSY_MASK 0x1 500052fb57e7SAlex Deucher #define ATC_L1RD_STATUS__BUSY__SHIFT 0x0 500152fb57e7SAlex Deucher #define ATC_L1RD_STATUS__DEADLOCK_DETECTION_MASK 0x2 500252fb57e7SAlex Deucher #define ATC_L1RD_STATUS__DEADLOCK_DETECTION__SHIFT 0x1 500352fb57e7SAlex Deucher #define ATC_L1RD_STATUS__BAD_NEED_ATS_MASK 0x100 500452fb57e7SAlex Deucher #define ATC_L1RD_STATUS__BAD_NEED_ATS__SHIFT 0x8 500552fb57e7SAlex Deucher #define ATC_L1WR_STATUS__BUSY_MASK 0x1 500652fb57e7SAlex Deucher #define ATC_L1WR_STATUS__BUSY__SHIFT 0x0 500752fb57e7SAlex Deucher #define ATC_L1WR_STATUS__DEADLOCK_DETECTION_MASK 0x2 500852fb57e7SAlex Deucher #define ATC_L1WR_STATUS__DEADLOCK_DETECTION__SHIFT 0x1 500952fb57e7SAlex Deucher #define ATC_L1WR_STATUS__BAD_NEED_ATS_MASK 0x100 501052fb57e7SAlex Deucher #define ATC_L1WR_STATUS__BAD_NEED_ATS__SHIFT 0x8 501152fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID0_REMAPPING_FINISHED_MASK 0x1 501252fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID0_REMAPPING_FINISHED__SHIFT 0x0 501352fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID1_REMAPPING_FINISHED_MASK 0x2 501452fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID1_REMAPPING_FINISHED__SHIFT 0x1 501552fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID2_REMAPPING_FINISHED_MASK 0x4 501652fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID2_REMAPPING_FINISHED__SHIFT 0x2 501752fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID3_REMAPPING_FINISHED_MASK 0x8 501852fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID3_REMAPPING_FINISHED__SHIFT 0x3 501952fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID4_REMAPPING_FINISHED_MASK 0x10 502052fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID4_REMAPPING_FINISHED__SHIFT 0x4 502152fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID5_REMAPPING_FINISHED_MASK 0x20 502252fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID5_REMAPPING_FINISHED__SHIFT 0x5 502352fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID6_REMAPPING_FINISHED_MASK 0x40 502452fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID6_REMAPPING_FINISHED__SHIFT 0x6 502552fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID7_REMAPPING_FINISHED_MASK 0x80 502652fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID7_REMAPPING_FINISHED__SHIFT 0x7 502752fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID8_REMAPPING_FINISHED_MASK 0x100 502852fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID8_REMAPPING_FINISHED__SHIFT 0x8 502952fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID9_REMAPPING_FINISHED_MASK 0x200 503052fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID9_REMAPPING_FINISHED__SHIFT 0x9 503152fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID10_REMAPPING_FINISHED_MASK 0x400 503252fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID10_REMAPPING_FINISHED__SHIFT 0xa 503352fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID11_REMAPPING_FINISHED_MASK 0x800 503452fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID11_REMAPPING_FINISHED__SHIFT 0xb 503552fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID12_REMAPPING_FINISHED_MASK 0x1000 503652fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID12_REMAPPING_FINISHED__SHIFT 0xc 503752fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID13_REMAPPING_FINISHED_MASK 0x2000 503852fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID13_REMAPPING_FINISHED__SHIFT 0xd 503952fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID14_REMAPPING_FINISHED_MASK 0x4000 504052fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID14_REMAPPING_FINISHED__SHIFT 0xe 504152fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID15_REMAPPING_FINISHED_MASK 0x8000 504252fb57e7SAlex Deucher #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID15_REMAPPING_FINISHED__SHIFT 0xf 504352fb57e7SAlex Deucher #define ATC_VMID0_PASID_MAPPING__PASID_MASK 0xffff 504452fb57e7SAlex Deucher #define ATC_VMID0_PASID_MAPPING__PASID__SHIFT 0x0 504552fb57e7SAlex Deucher #define ATC_VMID0_PASID_MAPPING__VALID_MASK 0x80000000 504652fb57e7SAlex Deucher #define ATC_VMID0_PASID_MAPPING__VALID__SHIFT 0x1f 504752fb57e7SAlex Deucher #define ATC_VMID1_PASID_MAPPING__PASID_MASK 0xffff 504852fb57e7SAlex Deucher #define ATC_VMID1_PASID_MAPPING__PASID__SHIFT 0x0 504952fb57e7SAlex Deucher #define ATC_VMID1_PASID_MAPPING__VALID_MASK 0x80000000 505052fb57e7SAlex Deucher #define ATC_VMID1_PASID_MAPPING__VALID__SHIFT 0x1f 505152fb57e7SAlex Deucher #define ATC_VMID2_PASID_MAPPING__PASID_MASK 0xffff 505252fb57e7SAlex Deucher #define ATC_VMID2_PASID_MAPPING__PASID__SHIFT 0x0 505352fb57e7SAlex Deucher #define ATC_VMID2_PASID_MAPPING__VALID_MASK 0x80000000 505452fb57e7SAlex Deucher #define ATC_VMID2_PASID_MAPPING__VALID__SHIFT 0x1f 505552fb57e7SAlex Deucher #define ATC_VMID3_PASID_MAPPING__PASID_MASK 0xffff 505652fb57e7SAlex Deucher #define ATC_VMID3_PASID_MAPPING__PASID__SHIFT 0x0 505752fb57e7SAlex Deucher #define ATC_VMID3_PASID_MAPPING__VALID_MASK 0x80000000 505852fb57e7SAlex Deucher #define ATC_VMID3_PASID_MAPPING__VALID__SHIFT 0x1f 505952fb57e7SAlex Deucher #define ATC_VMID4_PASID_MAPPING__PASID_MASK 0xffff 506052fb57e7SAlex Deucher #define ATC_VMID4_PASID_MAPPING__PASID__SHIFT 0x0 506152fb57e7SAlex Deucher #define ATC_VMID4_PASID_MAPPING__VALID_MASK 0x80000000 506252fb57e7SAlex Deucher #define ATC_VMID4_PASID_MAPPING__VALID__SHIFT 0x1f 506352fb57e7SAlex Deucher #define ATC_VMID5_PASID_MAPPING__PASID_MASK 0xffff 506452fb57e7SAlex Deucher #define ATC_VMID5_PASID_MAPPING__PASID__SHIFT 0x0 506552fb57e7SAlex Deucher #define ATC_VMID5_PASID_MAPPING__VALID_MASK 0x80000000 506652fb57e7SAlex Deucher #define ATC_VMID5_PASID_MAPPING__VALID__SHIFT 0x1f 506752fb57e7SAlex Deucher #define ATC_VMID6_PASID_MAPPING__PASID_MASK 0xffff 506852fb57e7SAlex Deucher #define ATC_VMID6_PASID_MAPPING__PASID__SHIFT 0x0 506952fb57e7SAlex Deucher #define ATC_VMID6_PASID_MAPPING__VALID_MASK 0x80000000 507052fb57e7SAlex Deucher #define ATC_VMID6_PASID_MAPPING__VALID__SHIFT 0x1f 507152fb57e7SAlex Deucher #define ATC_VMID7_PASID_MAPPING__PASID_MASK 0xffff 507252fb57e7SAlex Deucher #define ATC_VMID7_PASID_MAPPING__PASID__SHIFT 0x0 507352fb57e7SAlex Deucher #define ATC_VMID7_PASID_MAPPING__VALID_MASK 0x80000000 507452fb57e7SAlex Deucher #define ATC_VMID7_PASID_MAPPING__VALID__SHIFT 0x1f 507552fb57e7SAlex Deucher #define ATC_VMID8_PASID_MAPPING__PASID_MASK 0xffff 507652fb57e7SAlex Deucher #define ATC_VMID8_PASID_MAPPING__PASID__SHIFT 0x0 507752fb57e7SAlex Deucher #define ATC_VMID8_PASID_MAPPING__VALID_MASK 0x80000000 507852fb57e7SAlex Deucher #define ATC_VMID8_PASID_MAPPING__VALID__SHIFT 0x1f 507952fb57e7SAlex Deucher #define ATC_VMID9_PASID_MAPPING__PASID_MASK 0xffff 508052fb57e7SAlex Deucher #define ATC_VMID9_PASID_MAPPING__PASID__SHIFT 0x0 508152fb57e7SAlex Deucher #define ATC_VMID9_PASID_MAPPING__VALID_MASK 0x80000000 508252fb57e7SAlex Deucher #define ATC_VMID9_PASID_MAPPING__VALID__SHIFT 0x1f 508352fb57e7SAlex Deucher #define ATC_VMID10_PASID_MAPPING__PASID_MASK 0xffff 508452fb57e7SAlex Deucher #define ATC_VMID10_PASID_MAPPING__PASID__SHIFT 0x0 508552fb57e7SAlex Deucher #define ATC_VMID10_PASID_MAPPING__VALID_MASK 0x80000000 508652fb57e7SAlex Deucher #define ATC_VMID10_PASID_MAPPING__VALID__SHIFT 0x1f 508752fb57e7SAlex Deucher #define ATC_VMID11_PASID_MAPPING__PASID_MASK 0xffff 508852fb57e7SAlex Deucher #define ATC_VMID11_PASID_MAPPING__PASID__SHIFT 0x0 508952fb57e7SAlex Deucher #define ATC_VMID11_PASID_MAPPING__VALID_MASK 0x80000000 509052fb57e7SAlex Deucher #define ATC_VMID11_PASID_MAPPING__VALID__SHIFT 0x1f 509152fb57e7SAlex Deucher #define ATC_VMID12_PASID_MAPPING__PASID_MASK 0xffff 509252fb57e7SAlex Deucher #define ATC_VMID12_PASID_MAPPING__PASID__SHIFT 0x0 509352fb57e7SAlex Deucher #define ATC_VMID12_PASID_MAPPING__VALID_MASK 0x80000000 509452fb57e7SAlex Deucher #define ATC_VMID12_PASID_MAPPING__VALID__SHIFT 0x1f 509552fb57e7SAlex Deucher #define ATC_VMID13_PASID_MAPPING__PASID_MASK 0xffff 509652fb57e7SAlex Deucher #define ATC_VMID13_PASID_MAPPING__PASID__SHIFT 0x0 509752fb57e7SAlex Deucher #define ATC_VMID13_PASID_MAPPING__VALID_MASK 0x80000000 509852fb57e7SAlex Deucher #define ATC_VMID13_PASID_MAPPING__VALID__SHIFT 0x1f 509952fb57e7SAlex Deucher #define ATC_VMID14_PASID_MAPPING__PASID_MASK 0xffff 510052fb57e7SAlex Deucher #define ATC_VMID14_PASID_MAPPING__PASID__SHIFT 0x0 510152fb57e7SAlex Deucher #define ATC_VMID14_PASID_MAPPING__VALID_MASK 0x80000000 510252fb57e7SAlex Deucher #define ATC_VMID14_PASID_MAPPING__VALID__SHIFT 0x1f 510352fb57e7SAlex Deucher #define ATC_VMID15_PASID_MAPPING__PASID_MASK 0xffff 510452fb57e7SAlex Deucher #define ATC_VMID15_PASID_MAPPING__PASID__SHIFT 0x0 510552fb57e7SAlex Deucher #define ATC_VMID15_PASID_MAPPING__VALID_MASK 0x80000000 510652fb57e7SAlex Deucher #define ATC_VMID15_PASID_MAPPING__VALID__SHIFT 0x1f 510752fb57e7SAlex Deucher #define GMCON_RENG_RAM_INDEX__RENG_RAM_INDEX_MASK 0x3ff 510852fb57e7SAlex Deucher #define GMCON_RENG_RAM_INDEX__RENG_RAM_INDEX__SHIFT 0x0 510952fb57e7SAlex Deucher #define GMCON_RENG_RAM_DATA__RENG_RAM_DATA_MASK 0xffffffff 511052fb57e7SAlex Deucher #define GMCON_RENG_RAM_DATA__RENG_RAM_DATA__SHIFT 0x0 511152fb57e7SAlex Deucher #define GMCON_RENG_EXECUTE__RENG_EXECUTE_ON_PWR_UP_MASK 0x1 511252fb57e7SAlex Deucher #define GMCON_RENG_EXECUTE__RENG_EXECUTE_ON_PWR_UP__SHIFT 0x0 511352fb57e7SAlex Deucher #define GMCON_RENG_EXECUTE__RENG_EXECUTE_NOW_MASK 0x2 511452fb57e7SAlex Deucher #define GMCON_RENG_EXECUTE__RENG_EXECUTE_NOW__SHIFT 0x1 511552fb57e7SAlex Deucher #define GMCON_RENG_EXECUTE__RENG_EXECUTE_NOW_START_PTR_MASK 0xffc 511652fb57e7SAlex Deucher #define GMCON_RENG_EXECUTE__RENG_EXECUTE_NOW_START_PTR__SHIFT 0x2 511752fb57e7SAlex Deucher #define GMCON_RENG_EXECUTE__RENG_EXECUTE_DSP_END_PTR_MASK 0x3ff000 511852fb57e7SAlex Deucher #define GMCON_RENG_EXECUTE__RENG_EXECUTE_DSP_END_PTR__SHIFT 0xc 511952fb57e7SAlex Deucher #define GMCON_RENG_EXECUTE__RENG_EXECUTE_END_PTR_MASK 0xffc00000 512052fb57e7SAlex Deucher #define GMCON_RENG_EXECUTE__RENG_EXECUTE_END_PTR__SHIFT 0x16 512152fb57e7SAlex Deucher #define GMCON_MISC__RENG_EXECUTE_NOW_MODE_MASK 0x400 512252fb57e7SAlex Deucher #define GMCON_MISC__RENG_EXECUTE_NOW_MODE__SHIFT 0xa 512352fb57e7SAlex Deucher #define GMCON_MISC__RENG_EXECUTE_ON_REG_UPDATE_MASK 0x800 512452fb57e7SAlex Deucher #define GMCON_MISC__RENG_EXECUTE_ON_REG_UPDATE__SHIFT 0xb 512552fb57e7SAlex Deucher #define GMCON_MISC__RENG_SRBM_CREDITS_MCD_MASK 0xf000 512652fb57e7SAlex Deucher #define GMCON_MISC__RENG_SRBM_CREDITS_MCD__SHIFT 0xc 512752fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_STUTTER_EN_MASK 0x10000 512852fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_STUTTER_EN__SHIFT 0x10 512952fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_GMC_IDLE_THRESHOLD_MASK 0x60000 513052fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_GMC_IDLE_THRESHOLD__SHIFT 0x11 513152fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_SRBM_IDLE_THRESHOLD_MASK 0x180000 513252fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_SRBM_IDLE_THRESHOLD__SHIFT 0x13 513352fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_IGNORE_PRE_SR_MASK 0x200000 513452fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_IGNORE_PRE_SR__SHIFT 0x15 513552fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_IGNORE_ALLOW_STOP_MASK 0x400000 513652fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_IGNORE_ALLOW_STOP__SHIFT 0x16 513752fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_IGNORE_SR_COMMIT_MASK 0x800000 513852fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_IGNORE_SR_COMMIT__SHIFT 0x17 513952fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_IGNORE_PROTECTION_FAULT_MASK 0x1000000 514052fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_IGNORE_PROTECTION_FAULT__SHIFT 0x18 514152fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_DISABLE_ALLOW_SR_MASK 0x2000000 514252fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_DISABLE_ALLOW_SR__SHIFT 0x19 514352fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_DISABLE_GMC_OFFLINE_MASK 0x4000000 514452fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_DISABLE_GMC_OFFLINE__SHIFT 0x1a 514552fb57e7SAlex Deucher #define GMCON_MISC__CRITICAL_REGS_LOCK_MASK 0x8000000 514652fb57e7SAlex Deucher #define GMCON_MISC__CRITICAL_REGS_LOCK__SHIFT 0x1b 514752fb57e7SAlex Deucher #define GMCON_MISC__ALLOW_DEEP_SLEEP_MODE_MASK 0x70000000 514852fb57e7SAlex Deucher #define GMCON_MISC__ALLOW_DEEP_SLEEP_MODE__SHIFT 0x1c 514952fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_FORCE_ALLOW_SR_MASK 0x80000000 515052fb57e7SAlex Deucher #define GMCON_MISC__STCTRL_FORCE_ALLOW_SR__SHIFT 0x1f 515152fb57e7SAlex Deucher #define GMCON_MISC2__RENG_MEM_POWER_CTRL_OVERRIDE0_MASK 0x7 515252fb57e7SAlex Deucher #define GMCON_MISC2__RENG_MEM_POWER_CTRL_OVERRIDE0__SHIFT 0x0 515352fb57e7SAlex Deucher #define GMCON_MISC2__RENG_MEM_POWER_CTRL_OVERRIDE1_MASK 0x38 515452fb57e7SAlex Deucher #define GMCON_MISC2__RENG_MEM_POWER_CTRL_OVERRIDE1__SHIFT 0x3 515552fb57e7SAlex Deucher #define GMCON_MISC2__STCTRL_NONDISP_IDLE_THRESHOLD_MASK 0x7c0 515652fb57e7SAlex Deucher #define GMCON_MISC2__STCTRL_NONDISP_IDLE_THRESHOLD__SHIFT 0x6 515752fb57e7SAlex Deucher #define GMCON_MISC2__RENG_SR_HOLD_THRESHOLD_MASK 0x1f800 515852fb57e7SAlex Deucher #define GMCON_MISC2__RENG_SR_HOLD_THRESHOLD__SHIFT 0xb 515952fb57e7SAlex Deucher #define GMCON_MISC2__STCTRL_LPT_TARGET_MASK 0x1ffe0000 516052fb57e7SAlex Deucher #define GMCON_MISC2__STCTRL_LPT_TARGET__SHIFT 0x11 516152fb57e7SAlex Deucher #define GMCON_MISC2__STCTRL_IGNORE_ARB_BUSY_MASK 0x20000000 516252fb57e7SAlex Deucher #define GMCON_MISC2__STCTRL_IGNORE_ARB_BUSY__SHIFT 0x1d 516352fb57e7SAlex Deucher #define GMCON_MISC2__STCTRL_EXTEND_GMC_OFFLINE_MASK 0x40000000 516452fb57e7SAlex Deucher #define GMCON_MISC2__STCTRL_EXTEND_GMC_OFFLINE__SHIFT 0x1e 516552fb57e7SAlex Deucher #define GMCON_MISC2__STCTRL_TIMER_PULSE_OVERRIDE_MASK 0x80000000 516652fb57e7SAlex Deucher #define GMCON_MISC2__STCTRL_TIMER_PULSE_OVERRIDE__SHIFT 0x1f 516752fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE0__STCTRL_REGISTER_SAVE_BASE0_MASK 0xffff 516852fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE0__STCTRL_REGISTER_SAVE_BASE0__SHIFT 0x0 516952fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE0__STCTRL_REGISTER_SAVE_LIMIT0_MASK 0xffff0000 517052fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE0__STCTRL_REGISTER_SAVE_LIMIT0__SHIFT 0x10 517152fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE1__STCTRL_REGISTER_SAVE_BASE1_MASK 0xffff 517252fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE1__STCTRL_REGISTER_SAVE_BASE1__SHIFT 0x0 517352fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE1__STCTRL_REGISTER_SAVE_LIMIT1_MASK 0xffff0000 517452fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE1__STCTRL_REGISTER_SAVE_LIMIT1__SHIFT 0x10 517552fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE2__STCTRL_REGISTER_SAVE_BASE2_MASK 0xffff 517652fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE2__STCTRL_REGISTER_SAVE_BASE2__SHIFT 0x0 517752fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE2__STCTRL_REGISTER_SAVE_LIMIT2_MASK 0xffff0000 517852fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_RANGE2__STCTRL_REGISTER_SAVE_LIMIT2__SHIFT 0x10 517952fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_EXCL_SET0__STCTRL_REGISTER_SAVE_EXCL0_MASK 0xffff 518052fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_EXCL_SET0__STCTRL_REGISTER_SAVE_EXCL0__SHIFT 0x0 518152fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_EXCL_SET0__STCTRL_REGISTER_SAVE_EXCL1_MASK 0xffff0000 518252fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_EXCL_SET0__STCTRL_REGISTER_SAVE_EXCL1__SHIFT 0x10 518352fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_EXCL_SET1__STCTRL_REGISTER_SAVE_EXCL2_MASK 0xffff 518452fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_EXCL_SET1__STCTRL_REGISTER_SAVE_EXCL2__SHIFT 0x0 518552fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_EXCL_SET1__STCTRL_REGISTER_SAVE_EXCL3_MASK 0xffff0000 518652fb57e7SAlex Deucher #define GMCON_STCTRL_REGISTER_SAVE_EXCL_SET1__STCTRL_REGISTER_SAVE_EXCL3__SHIFT 0x10 518752fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL0__START_THRESH_MASK 0xfff 518852fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL0__START_THRESH__SHIFT 0x0 518952fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL0__STOP_THRESH_MASK 0xfff000 519052fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL0__STOP_THRESH__SHIFT 0xc 519152fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL0__START_MODE_MASK 0x3000000 519252fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL0__START_MODE__SHIFT 0x18 519352fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL0__STOP_MODE_MASK 0xc000000 519452fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL0__STOP_MODE__SHIFT 0x1a 519552fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL0__ALLOW_WRAP_MASK 0x10000000 519652fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL0__ALLOW_WRAP__SHIFT 0x1c 519752fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL1__THRESH_CNTR_ID_MASK 0x3f 519852fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL1__THRESH_CNTR_ID__SHIFT 0x0 519952fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL1__START_TRIG_ID_MASK 0xfc0 520052fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL1__START_TRIG_ID__SHIFT 0x6 520152fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL1__STOP_TRIG_ID_MASK 0x3f000 520252fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL1__STOP_TRIG_ID__SHIFT 0xc 520352fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL1__MON0_ID_MASK 0xfc0000 520452fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL1__MON0_ID__SHIFT 0x12 520552fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL1__MON1_ID_MASK 0x3f000000 520652fb57e7SAlex Deucher #define GMCON_PERF_MON_CNTL1__MON1_ID__SHIFT 0x18 520752fb57e7SAlex Deucher #define GMCON_PERF_MON_RSLT0__COUNT_MASK 0xffffffff 520852fb57e7SAlex Deucher #define GMCON_PERF_MON_RSLT0__COUNT__SHIFT 0x0 520952fb57e7SAlex Deucher #define GMCON_PERF_MON_RSLT1__COUNT_MASK 0xffffffff 521052fb57e7SAlex Deucher #define GMCON_PERF_MON_RSLT1__COUNT__SHIFT 0x0 521152fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__FSM_ADDR_MASK 0xff 521252fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__FSM_ADDR__SHIFT 0x0 521352fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__POWER_DOWN_MASK 0x100 521452fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__POWER_DOWN__SHIFT 0x8 521552fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__POWER_UP_MASK 0x200 521652fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__POWER_UP__SHIFT 0x9 521752fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__P1_SELECT_MASK 0x400 521852fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__P1_SELECT__SHIFT 0xa 521952fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__P2_SELECT_MASK 0x800 522052fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__P2_SELECT__SHIFT 0xb 522152fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__WRITE_MASK 0x1000 522252fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__WRITE__SHIFT 0xc 522352fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__READ_MASK 0x2000 522452fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__READ__SHIFT 0xd 522552fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__RSRVD_MASK 0x7ffc000 522652fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__RSRVD__SHIFT 0xe 522752fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__SRBM_OVERRIDE_MASK 0x8000000 522852fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__SRBM_OVERRIDE__SHIFT 0x1b 522952fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__REG_ADDR_MASK 0xf0000000 523052fb57e7SAlex Deucher #define GMCON_PGFSM_CONFIG__REG_ADDR__SHIFT 0x1c 523152fb57e7SAlex Deucher #define GMCON_PGFSM_WRITE__WRITE_VALUE_MASK 0xffffffff 523252fb57e7SAlex Deucher #define GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT 0x0 523352fb57e7SAlex Deucher #define GMCON_PGFSM_READ__READ_VALUE_MASK 0xffffff 523452fb57e7SAlex Deucher #define GMCON_PGFSM_READ__READ_VALUE__SHIFT 0x0 523552fb57e7SAlex Deucher #define GMCON_PGFSM_READ__PGFSM_SELECT_MASK 0xf000000 523652fb57e7SAlex Deucher #define GMCON_PGFSM_READ__PGFSM_SELECT__SHIFT 0x18 523752fb57e7SAlex Deucher #define GMCON_PGFSM_READ__SERDES_MASTER_BUSY_MASK 0x10000000 523852fb57e7SAlex Deucher #define GMCON_PGFSM_READ__SERDES_MASTER_BUSY__SHIFT 0x1c 523952fb57e7SAlex Deucher #define GMCON_MISC3__RENG_DISABLE_MCC_MASK 0x3f 524052fb57e7SAlex Deucher #define GMCON_MISC3__RENG_DISABLE_MCC__SHIFT 0x0 524152fb57e7SAlex Deucher #define GMCON_MISC3__RENG_DISABLE_MCD_MASK 0xfc0 524252fb57e7SAlex Deucher #define GMCON_MISC3__RENG_DISABLE_MCD__SHIFT 0x6 524352fb57e7SAlex Deucher #define GMCON_MISC3__STCTRL_FORCE_PGFSM_CMD_DONE_MASK 0xfff000 524452fb57e7SAlex Deucher #define GMCON_MISC3__STCTRL_FORCE_PGFSM_CMD_DONE__SHIFT 0xc 524552fb57e7SAlex Deucher #define GMCON_MISC3__STCTRL_IGNORE_ALLOW_STUTTER_MASK 0x1000000 524652fb57e7SAlex Deucher #define GMCON_MISC3__STCTRL_IGNORE_ALLOW_STUTTER__SHIFT 0x18 524752fb57e7SAlex Deucher #define GMCON_MISC3__RENG_MEM_LS_ENABLE_MASK 0x2000000 524852fb57e7SAlex Deucher #define GMCON_MISC3__RENG_MEM_LS_ENABLE__SHIFT 0x19 524952fb57e7SAlex Deucher #define GMCON_MISC3__STCTRL_EXCLUDE_NONMEM_CLIENTS_MASK 0x4000000 525052fb57e7SAlex Deucher #define GMCON_MISC3__STCTRL_EXCLUDE_NONMEM_CLIENTS__SHIFT 0x1a 525152fb57e7SAlex Deucher #define GMCON_MASK__STCTRL_BUSY_MASK_ACP_RD_MASK 0x1 525252fb57e7SAlex Deucher #define GMCON_MASK__STCTRL_BUSY_MASK_ACP_RD__SHIFT 0x0 525352fb57e7SAlex Deucher #define GMCON_MASK__STCTRL_BUSY_MASK_ACP_WR_MASK 0x2 525452fb57e7SAlex Deucher #define GMCON_MASK__STCTRL_BUSY_MASK_ACP_WR__SHIFT 0x1 525552fb57e7SAlex Deucher #define GMCON_MASK__STCTRL_BUSY_MASK_VCE_RD_MASK 0x4 525652fb57e7SAlex Deucher #define GMCON_MASK__STCTRL_BUSY_MASK_VCE_RD__SHIFT 0x2 525752fb57e7SAlex Deucher #define GMCON_MASK__STCTRL_BUSY_MASK_VCE_WR_MASK 0x8 525852fb57e7SAlex Deucher #define GMCON_MASK__STCTRL_BUSY_MASK_VCE_WR__SHIFT 0x3 525952fb57e7SAlex Deucher #define GMCON_MASK__STCTRL_SR_HANDSHAKE_MASK_MASK 0x3f0 526052fb57e7SAlex Deucher #define GMCON_MASK__STCTRL_SR_HANDSHAKE_MASK__SHIFT 0x4 526152fb57e7SAlex Deucher #define GMCON_DEBUG__GFX_STALL_MASK 0x1 526252fb57e7SAlex Deucher #define GMCON_DEBUG__GFX_STALL__SHIFT 0x0 526352fb57e7SAlex Deucher #define GMCON_DEBUG__GFX_CLEAR_MASK 0x2 526452fb57e7SAlex Deucher #define GMCON_DEBUG__GFX_CLEAR__SHIFT 0x1 526552fb57e7SAlex Deucher #define GMCON_DEBUG__MISC_FLAGS_MASK 0x3ffffffc 526652fb57e7SAlex Deucher #define GMCON_DEBUG__MISC_FLAGS__SHIFT 0x2 526752fb57e7SAlex Deucher #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x1 526852fb57e7SAlex Deucher #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x0 526952fb57e7SAlex Deucher #define VM_L2_CNTL__ENABLE_L2_FRAGMENT_PROCESSING_MASK 0x2 527052fb57e7SAlex Deucher #define VM_L2_CNTL__ENABLE_L2_FRAGMENT_PROCESSING__SHIFT 0x1 527152fb57e7SAlex Deucher #define VM_L2_CNTL__L2_CACHE_PTE_ENDIAN_SWAP_MODE_MASK 0xc 527252fb57e7SAlex Deucher #define VM_L2_CNTL__L2_CACHE_PTE_ENDIAN_SWAP_MODE__SHIFT 0x2 527352fb57e7SAlex Deucher #define VM_L2_CNTL__L2_CACHE_PDE_ENDIAN_SWAP_MODE_MASK 0x30 527452fb57e7SAlex Deucher #define VM_L2_CNTL__L2_CACHE_PDE_ENDIAN_SWAP_MODE__SHIFT 0x4 527552fb57e7SAlex Deucher #define VM_L2_CNTL__L2_PDE0_CACHE_TAG_GENERATION_MODE_MASK 0x100 527652fb57e7SAlex Deucher #define VM_L2_CNTL__L2_PDE0_CACHE_TAG_GENERATION_MODE__SHIFT 0x8 527752fb57e7SAlex Deucher #define VM_L2_CNTL__ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE_MASK 0x200 527852fb57e7SAlex Deucher #define VM_L2_CNTL__ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE__SHIFT 0x9 527952fb57e7SAlex Deucher #define VM_L2_CNTL__ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE_MASK 0x400 528052fb57e7SAlex Deucher #define VM_L2_CNTL__ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE__SHIFT 0xa 528152fb57e7SAlex Deucher #define VM_L2_CNTL__ENABLE_DEFAULT_PAGE_OUT_TO_SYSTEM_MEMORY_MASK 0x800 528252fb57e7SAlex Deucher #define VM_L2_CNTL__ENABLE_DEFAULT_PAGE_OUT_TO_SYSTEM_MEMORY__SHIFT 0xb 528352fb57e7SAlex Deucher #define VM_L2_CNTL__L2_PDE0_CACHE_SPLIT_MODE_MASK 0x7000 528452fb57e7SAlex Deucher #define VM_L2_CNTL__L2_PDE0_CACHE_SPLIT_MODE__SHIFT 0xc 528552fb57e7SAlex Deucher #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK 0x38000 528652fb57e7SAlex Deucher #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE__SHIFT 0xf 528752fb57e7SAlex Deucher #define VM_L2_CNTL__PDE_FAULT_CLASSIFICATION_MASK 0x40000 528852fb57e7SAlex Deucher #define VM_L2_CNTL__PDE_FAULT_CLASSIFICATION__SHIFT 0x12 528952fb57e7SAlex Deucher #define VM_L2_CNTL__CONTEXT1_IDENTITY_ACCESS_MODE_MASK 0x180000 529052fb57e7SAlex Deucher #define VM_L2_CNTL__CONTEXT1_IDENTITY_ACCESS_MODE__SHIFT 0x13 529152fb57e7SAlex Deucher #define VM_L2_CNTL__IDENTITY_MODE_FRAGMENT_SIZE_MASK 0x3e00000 529252fb57e7SAlex Deucher #define VM_L2_CNTL__IDENTITY_MODE_FRAGMENT_SIZE__SHIFT 0x15 529352fb57e7SAlex Deucher #define VM_L2_CNTL__L2_CACHE_4K_SWAP_TAG_INDEX_LSBS_MASK 0xc000000 529452fb57e7SAlex Deucher #define VM_L2_CNTL__L2_CACHE_4K_SWAP_TAG_INDEX_LSBS__SHIFT 0x1a 529552fb57e7SAlex Deucher #define VM_L2_CNTL__L2_CACHE_BIGK_SWAP_TAG_INDEX_LSBS_MASK 0x70000000 529652fb57e7SAlex Deucher #define VM_L2_CNTL__L2_CACHE_BIGK_SWAP_TAG_INDEX_LSBS__SHIFT 0x1c 529752fb57e7SAlex Deucher #define VM_L2_CNTL2__INVALIDATE_ALL_L1_TLBS_MASK 0x1 529852fb57e7SAlex Deucher #define VM_L2_CNTL2__INVALIDATE_ALL_L1_TLBS__SHIFT 0x0 529952fb57e7SAlex Deucher #define VM_L2_CNTL2__INVALIDATE_L2_CACHE_MASK 0x2 530052fb57e7SAlex Deucher #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT 0x1 530152fb57e7SAlex Deucher #define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x200000 530252fb57e7SAlex Deucher #define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN__SHIFT 0x15 530352fb57e7SAlex Deucher #define VM_L2_CNTL2__DISABLE_BIGK_CACHE_OPTIMIZATION_MASK 0x400000 530452fb57e7SAlex Deucher #define VM_L2_CNTL2__DISABLE_BIGK_CACHE_OPTIMIZATION__SHIFT 0x16 530552fb57e7SAlex Deucher #define VM_L2_CNTL2__L2_CACHE_BIGK_VMID_MODE_MASK 0x3800000 530652fb57e7SAlex Deucher #define VM_L2_CNTL2__L2_CACHE_BIGK_VMID_MODE__SHIFT 0x17 530752fb57e7SAlex Deucher #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE_MASK 0xc000000 530852fb57e7SAlex Deucher #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a 530952fb57e7SAlex Deucher #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK 0x70000000 531052fb57e7SAlex Deucher #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE__SHIFT 0x1c 531152fb57e7SAlex Deucher #define VM_L2_CNTL3__BANK_SELECT_MASK 0x3f 531252fb57e7SAlex Deucher #define VM_L2_CNTL3__BANK_SELECT__SHIFT 0x0 531352fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_UPDATE_MODE_MASK 0xc0 531452fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_UPDATE_MODE__SHIFT 0x6 531552fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_UPDATE_WILDCARD_REFERENCE_VALUE_MASK 0x1f00 531652fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_UPDATE_WILDCARD_REFERENCE_VALUE__SHIFT 0x8 531752fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE_MASK 0xf8000 531852fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf 531952fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_BIGK_ASSOCIATIVITY_MASK 0x100000 532052fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_BIGK_ASSOCIATIVITY__SHIFT 0x14 532152fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_4K_EFFECTIVE_SIZE_MASK 0xe00000 532252fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_4K_EFFECTIVE_SIZE__SHIFT 0x15 532352fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_BIGK_EFFECTIVE_SIZE_MASK 0xf000000 532452fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_BIGK_EFFECTIVE_SIZE__SHIFT 0x18 532552fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_4K_FORCE_MISS_MASK 0x10000000 532652fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_4K_FORCE_MISS__SHIFT 0x1c 532752fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_BIGK_FORCE_MISS_MASK 0x20000000 532852fb57e7SAlex Deucher #define VM_L2_CNTL3__L2_CACHE_BIGK_FORCE_MISS__SHIFT 0x1d 532952fb57e7SAlex Deucher #define VM_L2_CNTL3__PDE_CACHE_FORCE_MISS_MASK 0x40000000 533052fb57e7SAlex Deucher #define VM_L2_CNTL3__PDE_CACHE_FORCE_MISS__SHIFT 0x1e 533152fb57e7SAlex Deucher #define VM_L2_STATUS__L2_BUSY_MASK 0x1 533252fb57e7SAlex Deucher #define VM_L2_STATUS__L2_BUSY__SHIFT 0x0 533352fb57e7SAlex Deucher #define VM_L2_STATUS__CONTEXT_DOMAIN_BUSY_MASK 0x1fffe 533452fb57e7SAlex Deucher #define VM_L2_STATUS__CONTEXT_DOMAIN_BUSY__SHIFT 0x1 533552fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__ENABLE_CONTEXT_MASK 0x1 533652fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__ENABLE_CONTEXT__SHIFT 0x0 533752fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PAGE_TABLE_DEPTH_MASK 0x6 533852fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PAGE_TABLE_DEPTH__SHIFT 0x1 533952fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x8 534052fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0x3 534152fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__RANGE_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x10 534252fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__RANGE_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x4 534352fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x40 534452fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0x6 534552fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x80 534652fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x7 534752fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x200 534852fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0x9 534952fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PDE0_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x400 535052fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PDE0_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0xa 535152fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PDE0_PROTECTION_FAULT_ENABLE_SAVE_MASK 0x800 535252fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PDE0_PROTECTION_FAULT_ENABLE_SAVE__SHIFT 0xb 535352fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__VALID_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x1000 535452fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__VALID_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0xc 535552fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__VALID_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x2000 535652fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__VALID_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0xd 535752fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__VALID_PROTECTION_FAULT_ENABLE_SAVE_MASK 0x4000 535852fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__VALID_PROTECTION_FAULT_ENABLE_SAVE__SHIFT 0xe 535952fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__READ_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x8000 536052fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__READ_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0xf 536152fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__READ_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x10000 536252fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__READ_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x10 536352fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__READ_PROTECTION_FAULT_ENABLE_SAVE_MASK 0x20000 536452fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__READ_PROTECTION_FAULT_ENABLE_SAVE__SHIFT 0x11 536552fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x40000 536652fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0x12 536752fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__WRITE_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x80000 536852fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__WRITE_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x13 536952fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__WRITE_PROTECTION_FAULT_ENABLE_SAVE_MASK 0x100000 537052fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__WRITE_PROTECTION_FAULT_ENABLE_SAVE__SHIFT 0x14 537152fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x200000 537252fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0x15 537352fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x400000 537452fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x16 537552fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_SAVE_MASK 0x800000 537652fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_SAVE__SHIFT 0x17 537752fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PAGE_TABLE_BLOCK_SIZE_MASK 0xf000000 537852fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL__PAGE_TABLE_BLOCK_SIZE__SHIFT 0x18 537952fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__ENABLE_CONTEXT_MASK 0x1 538052fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__ENABLE_CONTEXT__SHIFT 0x0 538152fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PAGE_TABLE_DEPTH_MASK 0x6 538252fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PAGE_TABLE_DEPTH__SHIFT 0x1 538352fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x8 538452fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0x3 538552fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x10 538652fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x4 538752fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x40 538852fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0x6 538952fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x80 539052fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x7 539152fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x200 539252fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0x9 539352fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x400 539452fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0xa 539552fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_SAVE_MASK 0x800 539652fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_SAVE__SHIFT 0xb 539752fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x1000 539852fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0xc 539952fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x2000 540052fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0xd 540152fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_SAVE_MASK 0x4000 540252fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_SAVE__SHIFT 0xe 540352fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x8000 540452fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0xf 540552fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x10000 540652fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x10 540752fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_SAVE_MASK 0x20000 540852fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_SAVE__SHIFT 0x11 540952fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x40000 541052fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0x12 541152fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x80000 541252fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x13 541352fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_SAVE_MASK 0x100000 541452fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_SAVE__SHIFT 0x14 541552fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK 0x200000 541652fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_INTERRUPT__SHIFT 0x15 541752fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x400000 541852fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x16 541952fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_SAVE_MASK 0x800000 542052fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PRIVILEGED_PROTECTION_FAULT_ENABLE_SAVE__SHIFT 0x17 542152fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PAGE_TABLE_BLOCK_SIZE_MASK 0xf000000 542252fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL__PAGE_TABLE_BLOCK_SIZE__SHIFT 0x18 542352fb57e7SAlex Deucher #define VM_DUMMY_PAGE_FAULT_CNTL__DUMMY_PAGE_FAULT_ENABLE_MASK 0x1 542452fb57e7SAlex Deucher #define VM_DUMMY_PAGE_FAULT_CNTL__DUMMY_PAGE_FAULT_ENABLE__SHIFT 0x0 542552fb57e7SAlex Deucher #define VM_DUMMY_PAGE_FAULT_CNTL__DUMMY_PAGE_ADDRESS_LOGICAL_MASK 0x2 542652fb57e7SAlex Deucher #define VM_DUMMY_PAGE_FAULT_CNTL__DUMMY_PAGE_ADDRESS_LOGICAL__SHIFT 0x1 542752fb57e7SAlex Deucher #define VM_DUMMY_PAGE_FAULT_CNTL__DUMMY_PAGE_COMPARE_MASK_MASK 0xc 542852fb57e7SAlex Deucher #define VM_DUMMY_PAGE_FAULT_CNTL__DUMMY_PAGE_COMPARE_MASK__SHIFT 0x2 542952fb57e7SAlex Deucher #define VM_DUMMY_PAGE_FAULT_ADDR__DUMMY_PAGE_ADDR_MASK 0xfffffff 543052fb57e7SAlex Deucher #define VM_DUMMY_PAGE_FAULT_ADDR__DUMMY_PAGE_ADDR__SHIFT 0x0 543152fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL2__CLEAR_PROTECTION_FAULT_STATUS_ADDR_MASK 0x1 543252fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL2__CLEAR_PROTECTION_FAULT_STATUS_ADDR__SHIFT 0x0 543352fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL2__ENABLE_CLEAR_PROTECTION_FAULT_STATUS_ADDR_WHEN_INVALIDATE_CONTEXT_MASK 0x2 543452fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL2__ENABLE_CLEAR_PROTECTION_FAULT_STATUS_ADDR_WHEN_INVALIDATE_CONTEXT__SHIFT 0x1 543552fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL2__ENABLE_INTERRUPT_PROCESSING_FOR_SUBSEQUENT_FAULTS_PER_CONTEXT_MASK 0x4 543652fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL2__ENABLE_INTERRUPT_PROCESSING_FOR_SUBSEQUENT_FAULTS_PER_CONTEXT__SHIFT 0x2 543752fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL2__ALLOW_SUBSEQUENT_PROTECTION_FAULT_STATUS_ADDR_UPDATES_MASK 0x8 543852fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL2__ALLOW_SUBSEQUENT_PROTECTION_FAULT_STATUS_ADDR_UPDATES__SHIFT 0x3 543952fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL2__WAIT_FOR_IDLE_WHEN_INVALIDATE_MASK 0x10 544052fb57e7SAlex Deucher #define VM_CONTEXT0_CNTL2__WAIT_FOR_IDLE_WHEN_INVALIDATE__SHIFT 0x4 544152fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL2__CLEAR_PROTECTION_FAULT_STATUS_ADDR_MASK 0x1 544252fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL2__CLEAR_PROTECTION_FAULT_STATUS_ADDR__SHIFT 0x0 544352fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL2__ENABLE_CLEAR_PROTECTION_FAULT_STATUS_ADDR_WHEN_INVALIDATE_CONTEXT_MASK 0x2 544452fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL2__ENABLE_CLEAR_PROTECTION_FAULT_STATUS_ADDR_WHEN_INVALIDATE_CONTEXT__SHIFT 0x1 544552fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL2__ENABLE_INTERRUPT_PROCESSING_FOR_SUBSEQUENT_FAULTS_PER_CONTEXT_MASK 0x4 544652fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL2__ENABLE_INTERRUPT_PROCESSING_FOR_SUBSEQUENT_FAULTS_PER_CONTEXT__SHIFT 0x2 544752fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL2__ALLOW_SUBSEQUENT_PROTECTION_FAULT_STATUS_ADDR_UPDATES_MASK 0x8 544852fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL2__ALLOW_SUBSEQUENT_PROTECTION_FAULT_STATUS_ADDR_UPDATES__SHIFT 0x3 544952fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL2__WAIT_FOR_IDLE_WHEN_INVALIDATE_MASK 0x10 545052fb57e7SAlex Deucher #define VM_CONTEXT1_CNTL2__WAIT_FOR_IDLE_WHEN_INVALIDATE__SHIFT 0x4 545152fb57e7SAlex Deucher #define VM_CONTEXT8_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 545252fb57e7SAlex Deucher #define VM_CONTEXT8_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 545352fb57e7SAlex Deucher #define VM_CONTEXT9_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 545452fb57e7SAlex Deucher #define VM_CONTEXT9_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 545552fb57e7SAlex Deucher #define VM_CONTEXT10_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 545652fb57e7SAlex Deucher #define VM_CONTEXT10_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 545752fb57e7SAlex Deucher #define VM_CONTEXT11_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 545852fb57e7SAlex Deucher #define VM_CONTEXT11_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 545952fb57e7SAlex Deucher #define VM_CONTEXT12_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 546052fb57e7SAlex Deucher #define VM_CONTEXT12_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 546152fb57e7SAlex Deucher #define VM_CONTEXT13_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 546252fb57e7SAlex Deucher #define VM_CONTEXT13_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 546352fb57e7SAlex Deucher #define VM_CONTEXT14_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 546452fb57e7SAlex Deucher #define VM_CONTEXT14_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 546552fb57e7SAlex Deucher #define VM_CONTEXT15_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 546652fb57e7SAlex Deucher #define VM_CONTEXT15_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 546752fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_0_MASK 0x1 546852fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_0__SHIFT 0x0 546952fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_1_MASK 0x2 547052fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_1__SHIFT 0x1 547152fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_2_MASK 0x4 547252fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_2__SHIFT 0x2 547352fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_3_MASK 0x8 547452fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_3__SHIFT 0x3 547552fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_4_MASK 0x10 547652fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_4__SHIFT 0x4 547752fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_5_MASK 0x20 547852fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_5__SHIFT 0x5 547952fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_6_MASK 0x40 548052fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_6__SHIFT 0x6 548152fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_7_MASK 0x80 548252fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_7__SHIFT 0x7 548352fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_8_MASK 0x100 548452fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_8__SHIFT 0x8 548552fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_9_MASK 0x200 548652fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_9__SHIFT 0x9 548752fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_10_MASK 0x400 548852fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_10__SHIFT 0xa 548952fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_11_MASK 0x800 549052fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_11__SHIFT 0xb 549152fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_12_MASK 0x1000 549252fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_12__SHIFT 0xc 549352fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_13_MASK 0x2000 549452fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_13__SHIFT 0xd 549552fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_14_MASK 0x4000 549652fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_14__SHIFT 0xe 549752fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_15_MASK 0x8000 549852fb57e7SAlex Deucher #define VM_INVALIDATE_REQUEST__INVALIDATE_DOMAIN_15__SHIFT 0xf 549952fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_0_MASK 0x1 550052fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_0__SHIFT 0x0 550152fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_1_MASK 0x2 550252fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_1__SHIFT 0x1 550352fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_2_MASK 0x4 550452fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_2__SHIFT 0x2 550552fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_3_MASK 0x8 550652fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_3__SHIFT 0x3 550752fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_4_MASK 0x10 550852fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_4__SHIFT 0x4 550952fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_5_MASK 0x20 551052fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_5__SHIFT 0x5 551152fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_6_MASK 0x40 551252fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_6__SHIFT 0x6 551352fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_7_MASK 0x80 551452fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_7__SHIFT 0x7 551552fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_8_MASK 0x100 551652fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_8__SHIFT 0x8 551752fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_9_MASK 0x200 551852fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_9__SHIFT 0x9 551952fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_10_MASK 0x400 552052fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_10__SHIFT 0xa 552152fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_11_MASK 0x800 552252fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_11__SHIFT 0xb 552352fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_12_MASK 0x1000 552452fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_12__SHIFT 0xc 552552fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_13_MASK 0x2000 552652fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_13__SHIFT 0xd 552752fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_14_MASK 0x4000 552852fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_14__SHIFT 0xe 552952fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_15_MASK 0x8000 553052fb57e7SAlex Deucher #define VM_INVALIDATE_RESPONSE__DOMAIN_INVALIDATED_15__SHIFT 0xf 553152fb57e7SAlex Deucher #define VM_PRT_APERTURE0_LOW_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 553252fb57e7SAlex Deucher #define VM_PRT_APERTURE0_LOW_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 553352fb57e7SAlex Deucher #define VM_PRT_APERTURE1_LOW_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 553452fb57e7SAlex Deucher #define VM_PRT_APERTURE1_LOW_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 553552fb57e7SAlex Deucher #define VM_PRT_APERTURE2_LOW_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 553652fb57e7SAlex Deucher #define VM_PRT_APERTURE2_LOW_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 553752fb57e7SAlex Deucher #define VM_PRT_APERTURE3_LOW_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 553852fb57e7SAlex Deucher #define VM_PRT_APERTURE3_LOW_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 553952fb57e7SAlex Deucher #define VM_PRT_APERTURE0_HIGH_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 554052fb57e7SAlex Deucher #define VM_PRT_APERTURE0_HIGH_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 554152fb57e7SAlex Deucher #define VM_PRT_APERTURE1_HIGH_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 554252fb57e7SAlex Deucher #define VM_PRT_APERTURE1_HIGH_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 554352fb57e7SAlex Deucher #define VM_PRT_APERTURE2_HIGH_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 554452fb57e7SAlex Deucher #define VM_PRT_APERTURE2_HIGH_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 554552fb57e7SAlex Deucher #define VM_PRT_APERTURE3_HIGH_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 554652fb57e7SAlex Deucher #define VM_PRT_APERTURE3_HIGH_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 554752fb57e7SAlex Deucher #define VM_PRT_CNTL__CB_DISABLE_READ_FAULT_ON_UNMAPPED_ACCESS_MASK 0x1 554852fb57e7SAlex Deucher #define VM_PRT_CNTL__CB_DISABLE_READ_FAULT_ON_UNMAPPED_ACCESS__SHIFT 0x0 554952fb57e7SAlex Deucher #define VM_PRT_CNTL__TC_DISABLE_READ_FAULT_ON_UNMAPPED_ACCESS_MASK 0x2 555052fb57e7SAlex Deucher #define VM_PRT_CNTL__TC_DISABLE_READ_FAULT_ON_UNMAPPED_ACCESS__SHIFT 0x1 555152fb57e7SAlex Deucher #define VM_PRT_CNTL__L2_CACHE_STORE_INVALID_ENTRIES_MASK 0x4 555252fb57e7SAlex Deucher #define VM_PRT_CNTL__L2_CACHE_STORE_INVALID_ENTRIES__SHIFT 0x2 555352fb57e7SAlex Deucher #define VM_PRT_CNTL__L1_TLB_STORE_INVALID_ENTRIES_MASK 0x8 555452fb57e7SAlex Deucher #define VM_PRT_CNTL__L1_TLB_STORE_INVALID_ENTRIES__SHIFT 0x3 555552fb57e7SAlex Deucher #define VM_PRT_CNTL__CB_DISABLE_WRITE_FAULT_ON_UNMAPPED_ACCESS_MASK 0x10 555652fb57e7SAlex Deucher #define VM_PRT_CNTL__CB_DISABLE_WRITE_FAULT_ON_UNMAPPED_ACCESS__SHIFT 0x4 555752fb57e7SAlex Deucher #define VM_PRT_CNTL__TC_DISABLE_WRITE_FAULT_ON_UNMAPPED_ACCESS_MASK 0x20 555852fb57e7SAlex Deucher #define VM_PRT_CNTL__TC_DISABLE_WRITE_FAULT_ON_UNMAPPED_ACCESS__SHIFT 0x5 555952fb57e7SAlex Deucher #define VM_PRT_CNTL__MASK_PDE0_FAULT_MASK 0x40 556052fb57e7SAlex Deucher #define VM_PRT_CNTL__MASK_PDE0_FAULT__SHIFT 0x6 556152fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_0_MASK 0x1 556252fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_0__SHIFT 0x0 556352fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_1_MASK 0x2 556452fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_1__SHIFT 0x1 556552fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_2_MASK 0x4 556652fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_2__SHIFT 0x2 556752fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_3_MASK 0x8 556852fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_3__SHIFT 0x3 556952fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_4_MASK 0x10 557052fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_4__SHIFT 0x4 557152fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_5_MASK 0x20 557252fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_5__SHIFT 0x5 557352fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_6_MASK 0x40 557452fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_6__SHIFT 0x6 557552fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_7_MASK 0x80 557652fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_7__SHIFT 0x7 557752fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_8_MASK 0x100 557852fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_8__SHIFT 0x8 557952fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_9_MASK 0x200 558052fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_9__SHIFT 0x9 558152fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_10_MASK 0x400 558252fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_10__SHIFT 0xa 558352fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_11_MASK 0x800 558452fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_11__SHIFT 0xb 558552fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_12_MASK 0x1000 558652fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_12__SHIFT 0xc 558752fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_13_MASK 0x2000 558852fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_13__SHIFT 0xd 558952fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_14_MASK 0x4000 559052fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_14__SHIFT 0xe 559152fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_15_MASK 0x8000 559252fb57e7SAlex Deucher #define VM_CONTEXTS_DISABLE__DISABLE_CONTEXT_15__SHIFT 0xf 559352fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_STATUS__PROTECTIONS_MASK 0xff 559452fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_STATUS__PROTECTIONS__SHIFT 0x0 559552fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_STATUS__MEMORY_CLIENT_ID_MASK 0xff000 559652fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_STATUS__MEMORY_CLIENT_ID__SHIFT 0xc 559752fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_STATUS__MEMORY_CLIENT_RW_MASK 0x1000000 559852fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_STATUS__MEMORY_CLIENT_RW__SHIFT 0x18 559952fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_STATUS__VMID_MASK 0x1e000000 560052fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_STATUS__VMID__SHIFT 0x19 560152fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_STATUS__PROTECTIONS_MASK 0xff 560252fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_STATUS__PROTECTIONS__SHIFT 0x0 560352fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_STATUS__MEMORY_CLIENT_ID_MASK 0xff000 560452fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_STATUS__MEMORY_CLIENT_ID__SHIFT 0xc 560552fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_STATUS__MEMORY_CLIENT_RW_MASK 0x1000000 560652fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_STATUS__MEMORY_CLIENT_RW__SHIFT 0x18 560752fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_STATUS__VMID_MASK 0x1e000000 560852fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_STATUS__VMID__SHIFT 0x19 560952fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_MCCLIENT__NAME_MASK 0xffffffff 561052fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_MCCLIENT__NAME__SHIFT 0x0 561152fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_MCCLIENT__NAME_MASK 0xffffffff 561252fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_MCCLIENT__NAME__SHIFT 0x0 561352fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_ADDR__LOGICAL_PAGE_ADDR_MASK 0xfffffff 561452fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_ADDR__LOGICAL_PAGE_ADDR__SHIFT 0x0 561552fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_ADDR__LOGICAL_PAGE_ADDR_MASK 0xfffffff 561652fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_ADDR__LOGICAL_PAGE_ADDR__SHIFT 0x0 561752fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR__PHYSICAL_PAGE_ADDR_MASK 0xfffffff 561852fb57e7SAlex Deucher #define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR__PHYSICAL_PAGE_ADDR__SHIFT 0x0 561952fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR__PHYSICAL_PAGE_ADDR_MASK 0xfffffff 562052fb57e7SAlex Deucher #define VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR__PHYSICAL_PAGE_ADDR__SHIFT 0x0 562152fb57e7SAlex Deucher #define VM_FAULT_CLIENT_ID__MEMORY_CLIENT_MASK 0x1ff 562252fb57e7SAlex Deucher #define VM_FAULT_CLIENT_ID__MEMORY_CLIENT__SHIFT 0x0 562352fb57e7SAlex Deucher #define VM_FAULT_CLIENT_ID__MEMORY_CLIENT_MASK_MASK 0x3fe00 562452fb57e7SAlex Deucher #define VM_FAULT_CLIENT_ID__MEMORY_CLIENT_MASK__SHIFT 0x9 562552fb57e7SAlex Deucher #define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 562652fb57e7SAlex Deucher #define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 562752fb57e7SAlex Deucher #define VM_CONTEXT1_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 562852fb57e7SAlex Deucher #define VM_CONTEXT1_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 562952fb57e7SAlex Deucher #define VM_CONTEXT2_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 563052fb57e7SAlex Deucher #define VM_CONTEXT2_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 563152fb57e7SAlex Deucher #define VM_CONTEXT3_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 563252fb57e7SAlex Deucher #define VM_CONTEXT3_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 563352fb57e7SAlex Deucher #define VM_CONTEXT4_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 563452fb57e7SAlex Deucher #define VM_CONTEXT4_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 563552fb57e7SAlex Deucher #define VM_CONTEXT5_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 563652fb57e7SAlex Deucher #define VM_CONTEXT5_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 563752fb57e7SAlex Deucher #define VM_CONTEXT6_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 563852fb57e7SAlex Deucher #define VM_CONTEXT6_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 563952fb57e7SAlex Deucher #define VM_CONTEXT7_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER_MASK 0xfffffff 564052fb57e7SAlex Deucher #define VM_CONTEXT7_PAGE_TABLE_BASE_ADDR__PHYSICAL_PAGE_NUMBER__SHIFT 0x0 564152fb57e7SAlex Deucher #define VM_CONTEXT0_PAGE_TABLE_START_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 564252fb57e7SAlex Deucher #define VM_CONTEXT0_PAGE_TABLE_START_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 564352fb57e7SAlex Deucher #define VM_CONTEXT1_PAGE_TABLE_START_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 564452fb57e7SAlex Deucher #define VM_CONTEXT1_PAGE_TABLE_START_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 564552fb57e7SAlex Deucher #define VM_CONTEXT0_PAGE_TABLE_END_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 564652fb57e7SAlex Deucher #define VM_CONTEXT0_PAGE_TABLE_END_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 564752fb57e7SAlex Deucher #define VM_CONTEXT1_PAGE_TABLE_END_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 564852fb57e7SAlex Deucher #define VM_CONTEXT1_PAGE_TABLE_END_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 564952fb57e7SAlex Deucher #define VM_DEBUG__FLAGS_MASK 0xffffffff 565052fb57e7SAlex Deucher #define VM_DEBUG__FLAGS__SHIFT 0x0 565152fb57e7SAlex Deucher #define VM_L2_CG__OFFDLY_MASK 0xfc0 565252fb57e7SAlex Deucher #define VM_L2_CG__OFFDLY__SHIFT 0x6 565352fb57e7SAlex Deucher #define VM_L2_CG__ENABLE_MASK 0x40000 565452fb57e7SAlex Deucher #define VM_L2_CG__ENABLE__SHIFT 0x12 565552fb57e7SAlex Deucher #define VM_L2_CG__MEM_LS_ENABLE_MASK 0x80000 565652fb57e7SAlex Deucher #define VM_L2_CG__MEM_LS_ENABLE__SHIFT 0x13 565752fb57e7SAlex Deucher #define VM_L2_BANK_SELECT_MASKA__BANK_SELECT_MASK_MASK 0xfffffff 565852fb57e7SAlex Deucher #define VM_L2_BANK_SELECT_MASKA__BANK_SELECT_MASK__SHIFT 0x0 565952fb57e7SAlex Deucher #define VM_L2_BANK_SELECT_MASKB__BANK_SELECT_MASK_MASK 0xff 566052fb57e7SAlex Deucher #define VM_L2_BANK_SELECT_MASKB__BANK_SELECT_MASK__SHIFT 0x0 566152fb57e7SAlex Deucher #define VM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 566252fb57e7SAlex Deucher #define VM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 566352fb57e7SAlex Deucher #define VM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR__LOGICAL_PAGE_NUMBER_MASK 0xfffffff 566452fb57e7SAlex Deucher #define VM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR__LOGICAL_PAGE_NUMBER__SHIFT 0x0 566552fb57e7SAlex Deucher #define VM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET__PHYSICAL_PAGE_OFFSET_MASK 0xfffffff 566652fb57e7SAlex Deucher #define VM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET__PHYSICAL_PAGE_OFFSET__SHIFT 0x0 566752fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_RD__TX_PRI_MASK 0xff 566852fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_RD__TX_PRI__SHIFT 0x0 566952fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_RD__BW_PRI_MASK 0xff00 567052fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_RD__BW_PRI__SHIFT 0x8 567152fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_RD__FIX_PRI_MASK 0xff0000 567252fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_RD__FIX_PRI__SHIFT 0x10 567352fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_RD__ST_PRI_MASK 0xff000000 567452fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_RD__ST_PRI__SHIFT 0x18 567552fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_WR__TX_PRI_MASK 0xff 567652fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_WR__TX_PRI__SHIFT 0x0 567752fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_WR__BW_PRI_MASK 0xff00 567852fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_WR__BW_PRI__SHIFT 0x8 567952fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_WR__FIX_PRI_MASK 0xff0000 568052fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_WR__FIX_PRI__SHIFT 0x10 568152fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_WR__ST_PRI_MASK 0xff000000 568252fb57e7SAlex Deucher #define MC_ARB_HARSH_EN_WR__ST_PRI__SHIFT 0x18 568352fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_RD__GROUP0_MASK 0xff 568452fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_RD__GROUP0__SHIFT 0x0 568552fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_RD__GROUP1_MASK 0xff00 568652fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_RD__GROUP1__SHIFT 0x8 568752fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_RD__GROUP2_MASK 0xff0000 568852fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_RD__GROUP2__SHIFT 0x10 568952fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_RD__GROUP3_MASK 0xff000000 569052fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_RD__GROUP3__SHIFT 0x18 569152fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_WR__GROUP0_MASK 0xff 569252fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_WR__GROUP0__SHIFT 0x0 569352fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_WR__GROUP1_MASK 0xff00 569452fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_WR__GROUP1__SHIFT 0x8 569552fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_WR__GROUP2_MASK 0xff0000 569652fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_WR__GROUP2__SHIFT 0x10 569752fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_WR__GROUP3_MASK 0xff000000 569852fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI0_WR__GROUP3__SHIFT 0x18 569952fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_RD__GROUP4_MASK 0xff 570052fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_RD__GROUP4__SHIFT 0x0 570152fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_RD__GROUP5_MASK 0xff00 570252fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_RD__GROUP5__SHIFT 0x8 570352fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_RD__GROUP6_MASK 0xff0000 570452fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_RD__GROUP6__SHIFT 0x10 570552fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_RD__GROUP7_MASK 0xff000000 570652fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_RD__GROUP7__SHIFT 0x18 570752fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_WR__GROUP4_MASK 0xff 570852fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_WR__GROUP4__SHIFT 0x0 570952fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_WR__GROUP5_MASK 0xff00 571052fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_WR__GROUP5__SHIFT 0x8 571152fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_WR__GROUP6_MASK 0xff0000 571252fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_WR__GROUP6__SHIFT 0x10 571352fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_WR__GROUP7_MASK 0xff000000 571452fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_HI1_WR__GROUP7__SHIFT 0x18 571552fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_RD__GROUP0_MASK 0xff 571652fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_RD__GROUP0__SHIFT 0x0 571752fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_RD__GROUP1_MASK 0xff00 571852fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_RD__GROUP1__SHIFT 0x8 571952fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_RD__GROUP2_MASK 0xff0000 572052fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_RD__GROUP2__SHIFT 0x10 572152fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_RD__GROUP3_MASK 0xff000000 572252fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_RD__GROUP3__SHIFT 0x18 572352fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_WR__GROUP0_MASK 0xff 572452fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_WR__GROUP0__SHIFT 0x0 572552fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_WR__GROUP1_MASK 0xff00 572652fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_WR__GROUP1__SHIFT 0x8 572752fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_WR__GROUP2_MASK 0xff0000 572852fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_WR__GROUP2__SHIFT 0x10 572952fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_WR__GROUP3_MASK 0xff000000 573052fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO0_WR__GROUP3__SHIFT 0x18 573152fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_RD__GROUP4_MASK 0xff 573252fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_RD__GROUP4__SHIFT 0x0 573352fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_RD__GROUP5_MASK 0xff00 573452fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_RD__GROUP5__SHIFT 0x8 573552fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_RD__GROUP6_MASK 0xff0000 573652fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_RD__GROUP6__SHIFT 0x10 573752fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_RD__GROUP7_MASK 0xff000000 573852fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_RD__GROUP7__SHIFT 0x18 573952fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_WR__GROUP4_MASK 0xff 574052fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_WR__GROUP4__SHIFT 0x0 574152fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_WR__GROUP5_MASK 0xff00 574252fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_WR__GROUP5__SHIFT 0x8 574352fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_WR__GROUP6_MASK 0xff0000 574452fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_WR__GROUP6__SHIFT 0x10 574552fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_WR__GROUP7_MASK 0xff000000 574652fb57e7SAlex Deucher #define MC_ARB_HARSH_TX_LO1_WR__GROUP7__SHIFT 0x18 574752fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_RD__GROUP0_MASK 0xff 574852fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_RD__GROUP0__SHIFT 0x0 574952fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_RD__GROUP1_MASK 0xff00 575052fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_RD__GROUP1__SHIFT 0x8 575152fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_RD__GROUP2_MASK 0xff0000 575252fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_RD__GROUP2__SHIFT 0x10 575352fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_RD__GROUP3_MASK 0xff000000 575452fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_RD__GROUP3__SHIFT 0x18 575552fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_WR__GROUP0_MASK 0xff 575652fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_WR__GROUP0__SHIFT 0x0 575752fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_WR__GROUP1_MASK 0xff00 575852fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_WR__GROUP1__SHIFT 0x8 575952fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_WR__GROUP2_MASK 0xff0000 576052fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_WR__GROUP2__SHIFT 0x10 576152fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_WR__GROUP3_MASK 0xff000000 576252fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD0_WR__GROUP3__SHIFT 0x18 576352fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_RD__GROUP4_MASK 0xff 576452fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_RD__GROUP4__SHIFT 0x0 576552fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_RD__GROUP5_MASK 0xff00 576652fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_RD__GROUP5__SHIFT 0x8 576752fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_RD__GROUP6_MASK 0xff0000 576852fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_RD__GROUP6__SHIFT 0x10 576952fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_RD__GROUP7_MASK 0xff000000 577052fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_RD__GROUP7__SHIFT 0x18 577152fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_WR__GROUP4_MASK 0xff 577252fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_WR__GROUP4__SHIFT 0x0 577352fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_WR__GROUP5_MASK 0xff00 577452fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_WR__GROUP5__SHIFT 0x8 577552fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_WR__GROUP6_MASK 0xff0000 577652fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_WR__GROUP6__SHIFT 0x10 577752fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_WR__GROUP7_MASK 0xff000000 577852fb57e7SAlex Deucher #define MC_ARB_HARSH_BWPERIOD1_WR__GROUP7__SHIFT 0x18 577952fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_RD__GROUP0_MASK 0xff 578052fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_RD__GROUP0__SHIFT 0x0 578152fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_RD__GROUP1_MASK 0xff00 578252fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_RD__GROUP1__SHIFT 0x8 578352fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_RD__GROUP2_MASK 0xff0000 578452fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_RD__GROUP2__SHIFT 0x10 578552fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_RD__GROUP3_MASK 0xff000000 578652fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_RD__GROUP3__SHIFT 0x18 578752fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_WR__GROUP0_MASK 0xff 578852fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_WR__GROUP0__SHIFT 0x0 578952fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_WR__GROUP1_MASK 0xff00 579052fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_WR__GROUP1__SHIFT 0x8 579152fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_WR__GROUP2_MASK 0xff0000 579252fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_WR__GROUP2__SHIFT 0x10 579352fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_WR__GROUP3_MASK 0xff000000 579452fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT0_WR__GROUP3__SHIFT 0x18 579552fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_RD__GROUP4_MASK 0xff 579652fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_RD__GROUP4__SHIFT 0x0 579752fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_RD__GROUP5_MASK 0xff00 579852fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_RD__GROUP5__SHIFT 0x8 579952fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_RD__GROUP6_MASK 0xff0000 580052fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_RD__GROUP6__SHIFT 0x10 580152fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_RD__GROUP7_MASK 0xff000000 580252fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_RD__GROUP7__SHIFT 0x18 580352fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_WR__GROUP4_MASK 0xff 580452fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_WR__GROUP4__SHIFT 0x0 580552fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_WR__GROUP5_MASK 0xff00 580652fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_WR__GROUP5__SHIFT 0x8 580752fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_WR__GROUP6_MASK 0xff0000 580852fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_WR__GROUP6__SHIFT 0x10 580952fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_WR__GROUP7_MASK 0xff000000 581052fb57e7SAlex Deucher #define MC_ARB_HARSH_BWCNT1_WR__GROUP7__SHIFT 0x18 581152fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_RD__GROUP0_MASK 0xff 581252fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_RD__GROUP0__SHIFT 0x0 581352fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_RD__GROUP1_MASK 0xff00 581452fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_RD__GROUP1__SHIFT 0x8 581552fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_RD__GROUP2_MASK 0xff0000 581652fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_RD__GROUP2__SHIFT 0x10 581752fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_RD__GROUP3_MASK 0xff000000 581852fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_RD__GROUP3__SHIFT 0x18 581952fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_WR__GROUP0_MASK 0xff 582052fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_WR__GROUP0__SHIFT 0x0 582152fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_WR__GROUP1_MASK 0xff00 582252fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_WR__GROUP1__SHIFT 0x8 582352fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_WR__GROUP2_MASK 0xff0000 582452fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_WR__GROUP2__SHIFT 0x10 582552fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_WR__GROUP3_MASK 0xff000000 582652fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT0_WR__GROUP3__SHIFT 0x18 582752fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_RD__GROUP4_MASK 0xff 582852fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_RD__GROUP4__SHIFT 0x0 582952fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_RD__GROUP5_MASK 0xff00 583052fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_RD__GROUP5__SHIFT 0x8 583152fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_RD__GROUP6_MASK 0xff0000 583252fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_RD__GROUP6__SHIFT 0x10 583352fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_RD__GROUP7_MASK 0xff000000 583452fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_RD__GROUP7__SHIFT 0x18 583552fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_WR__GROUP4_MASK 0xff 583652fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_WR__GROUP4__SHIFT 0x0 583752fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_WR__GROUP5_MASK 0xff00 583852fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_WR__GROUP5__SHIFT 0x8 583952fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_WR__GROUP6_MASK 0xff0000 584052fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_WR__GROUP6__SHIFT 0x10 584152fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_WR__GROUP7_MASK 0xff000000 584252fb57e7SAlex Deucher #define MC_ARB_HARSH_SAT1_WR__GROUP7__SHIFT 0x18 584352fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__FORCE_HIGHEST_MASK 0xff 584452fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__FORCE_HIGHEST__SHIFT 0x0 584552fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__HARSH_RR_MASK 0x100 584652fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__HARSH_RR__SHIFT 0x8 584752fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__BANK_AGE_ONLY_MASK 0x200 584852fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__BANK_AGE_ONLY__SHIFT 0x9 584952fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__USE_LEGACY_HARSH_MASK 0x400 585052fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__USE_LEGACY_HARSH__SHIFT 0xa 585152fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__BWCNT_CATCHUP_MASK 0x800 585252fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__BWCNT_CATCHUP__SHIFT 0xb 585352fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__ST_MODE_MASK 0x3000 585452fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__ST_MODE__SHIFT 0xc 585552fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__FORCE_STALL_MASK 0x3fc000 585652fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__FORCE_STALL__SHIFT 0xe 585752fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__PERF_MON_SEL_MASK 0x1c00000 585852fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_RD__PERF_MON_SEL__SHIFT 0x16 585952fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__FORCE_HIGHEST_MASK 0xff 586052fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__FORCE_HIGHEST__SHIFT 0x0 586152fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__HARSH_RR_MASK 0x100 586252fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__HARSH_RR__SHIFT 0x8 586352fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__BANK_AGE_ONLY_MASK 0x200 586452fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__BANK_AGE_ONLY__SHIFT 0x9 586552fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__USE_LEGACY_HARSH_MASK 0x400 586652fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__USE_LEGACY_HARSH__SHIFT 0xa 586752fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__BWCNT_CATCHUP_MASK 0x800 586852fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__BWCNT_CATCHUP__SHIFT 0xb 586952fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__ST_MODE_MASK 0x3000 587052fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__ST_MODE__SHIFT 0xc 587152fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__FORCE_STALL_MASK 0x3fc000 587252fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__FORCE_STALL__SHIFT 0xe 587352fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__PERF_MON_SEL_MASK 0x1c00000 587452fb57e7SAlex Deucher #define MC_ARB_HARSH_CTL_WR__PERF_MON_SEL__SHIFT 0x16 587552fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS0_BASE__CSENABLE_MASK 0x1 587652fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS0_BASE__CSENABLE__SHIFT 0x0 587752fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS0_BASE__BASEADDR21_11_MASK 0xffe0 587852fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS0_BASE__BASEADDR21_11__SHIFT 0x5 587952fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS0_BASE__BASEADDR38_27_MASK 0x7ff80000 588052fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS0_BASE__BASEADDR38_27__SHIFT 0x13 588152fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS0_BASE__CSENABLE_MASK 0x1 588252fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS0_BASE__CSENABLE__SHIFT 0x0 588352fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS0_BASE__BASEADDR21_11_MASK 0xffe0 588452fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS0_BASE__BASEADDR21_11__SHIFT 0x5 588552fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS0_BASE__BASEADDR38_27_MASK 0x7ff80000 588652fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS0_BASE__BASEADDR38_27__SHIFT 0x13 588752fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS1_BASE__CSENABLE_MASK 0x1 588852fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS1_BASE__CSENABLE__SHIFT 0x0 588952fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS1_BASE__BASEADDR21_11_MASK 0xffe0 589052fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS1_BASE__BASEADDR21_11__SHIFT 0x5 589152fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS1_BASE__BASEADDR38_27_MASK 0x7ff80000 589252fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS1_BASE__BASEADDR38_27__SHIFT 0x13 589352fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS1_BASE__CSENABLE_MASK 0x1 589452fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS1_BASE__CSENABLE__SHIFT 0x0 589552fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS1_BASE__BASEADDR21_11_MASK 0xffe0 589652fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS1_BASE__BASEADDR21_11__SHIFT 0x5 589752fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS1_BASE__BASEADDR38_27_MASK 0x7ff80000 589852fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS1_BASE__BASEADDR38_27__SHIFT 0x13 589952fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS2_BASE__CSENABLE_MASK 0x1 590052fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS2_BASE__CSENABLE__SHIFT 0x0 590152fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS2_BASE__BASEADDR21_11_MASK 0xffe0 590252fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS2_BASE__BASEADDR21_11__SHIFT 0x5 590352fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS2_BASE__BASEADDR38_27_MASK 0x7ff80000 590452fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS2_BASE__BASEADDR38_27__SHIFT 0x13 590552fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS2_BASE__CSENABLE_MASK 0x1 590652fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS2_BASE__CSENABLE__SHIFT 0x0 590752fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS2_BASE__BASEADDR21_11_MASK 0xffe0 590852fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS2_BASE__BASEADDR21_11__SHIFT 0x5 590952fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS2_BASE__BASEADDR38_27_MASK 0x7ff80000 591052fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS2_BASE__BASEADDR38_27__SHIFT 0x13 591152fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS3_BASE__CSENABLE_MASK 0x1 591252fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS3_BASE__CSENABLE__SHIFT 0x0 591352fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS3_BASE__BASEADDR21_11_MASK 0xffe0 591452fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS3_BASE__BASEADDR21_11__SHIFT 0x5 591552fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS3_BASE__BASEADDR38_27_MASK 0x7ff80000 591652fb57e7SAlex Deucher #define MC_FUS_DRAM0_CS3_BASE__BASEADDR38_27__SHIFT 0x13 591752fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS3_BASE__CSENABLE_MASK 0x1 591852fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS3_BASE__CSENABLE__SHIFT 0x0 591952fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS3_BASE__BASEADDR21_11_MASK 0xffe0 592052fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS3_BASE__BASEADDR21_11__SHIFT 0x5 592152fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS3_BASE__BASEADDR38_27_MASK 0x7ff80000 592252fb57e7SAlex Deucher #define MC_FUS_DRAM1_CS3_BASE__BASEADDR38_27__SHIFT 0x13 592352fb57e7SAlex Deucher #define MC_FUS_DRAM0_BANK_ADDR_MAPPING__DIMM0ADDRMAP_MASK 0xf 592452fb57e7SAlex Deucher #define MC_FUS_DRAM0_BANK_ADDR_MAPPING__DIMM0ADDRMAP__SHIFT 0x0 592552fb57e7SAlex Deucher #define MC_FUS_DRAM0_BANK_ADDR_MAPPING__DIMM1ADDRMAP_MASK 0xf0 592652fb57e7SAlex Deucher #define MC_FUS_DRAM0_BANK_ADDR_MAPPING__DIMM1ADDRMAP__SHIFT 0x4 592752fb57e7SAlex Deucher #define MC_FUS_DRAM0_BANK_ADDR_MAPPING__BANKSWIZZLEMODE_MASK 0x100 592852fb57e7SAlex Deucher #define MC_FUS_DRAM0_BANK_ADDR_MAPPING__BANKSWIZZLEMODE__SHIFT 0x8 592952fb57e7SAlex Deucher #define MC_FUS_DRAM0_BANK_ADDR_MAPPING__BANKSWAP_MASK 0x200 593052fb57e7SAlex Deucher #define MC_FUS_DRAM0_BANK_ADDR_MAPPING__BANKSWAP__SHIFT 0x9 593152fb57e7SAlex Deucher #define MC_FUS_DRAM1_BANK_ADDR_MAPPING__DIMM0ADDRMAP_MASK 0xf 593252fb57e7SAlex Deucher #define MC_FUS_DRAM1_BANK_ADDR_MAPPING__DIMM0ADDRMAP__SHIFT 0x0 593352fb57e7SAlex Deucher #define MC_FUS_DRAM1_BANK_ADDR_MAPPING__DIMM1ADDRMAP_MASK 0xf0 593452fb57e7SAlex Deucher #define MC_FUS_DRAM1_BANK_ADDR_MAPPING__DIMM1ADDRMAP__SHIFT 0x4 593552fb57e7SAlex Deucher #define MC_FUS_DRAM1_BANK_ADDR_MAPPING__BANKSWIZZLEMODE_MASK 0x100 593652fb57e7SAlex Deucher #define MC_FUS_DRAM1_BANK_ADDR_MAPPING__BANKSWIZZLEMODE__SHIFT 0x8 593752fb57e7SAlex Deucher #define MC_FUS_DRAM1_BANK_ADDR_MAPPING__BANKSWAP_MASK 0x200 593852fb57e7SAlex Deucher #define MC_FUS_DRAM1_BANK_ADDR_MAPPING__BANKSWAP__SHIFT 0x9 593952fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_BASE__DCTSEL_MASK 0x7 594052fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_BASE__DCTSEL__SHIFT 0x0 594152fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_BASE__DCTINTLVEN_MASK 0x78 594252fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_BASE__DCTINTLVEN__SHIFT 0x3 594352fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_BASE__DCTBASEADDR_MASK 0xfffff80 594452fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_BASE__DCTBASEADDR__SHIFT 0x7 594552fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_BASE__DCTOFFSETEN_MASK 0x10000000 594652fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_BASE__DCTOFFSETEN__SHIFT 0x1c 594752fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_BASE__DCTSEL_MASK 0x7 594852fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_BASE__DCTSEL__SHIFT 0x0 594952fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_BASE__DCTINTLVEN_MASK 0x78 595052fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_BASE__DCTINTLVEN__SHIFT 0x3 595152fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_BASE__DCTBASEADDR_MASK 0xfffff80 595252fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_BASE__DCTBASEADDR__SHIFT 0x7 595352fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_BASE__DCTOFFSETEN_MASK 0x10000000 595452fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_BASE__DCTOFFSETEN__SHIFT 0x1c 595552fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_LIMIT__DCTLIMITADDR_MASK 0x1fffff 595652fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_LIMIT__DCTLIMITADDR__SHIFT 0x0 595752fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_LIMIT__DRAMHOLEVALID_MASK 0x200000 595852fb57e7SAlex Deucher #define MC_FUS_DRAM0_CTL_LIMIT__DRAMHOLEVALID__SHIFT 0x15 595952fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_LIMIT__DCTLIMITADDR_MASK 0x1fffff 596052fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_LIMIT__DCTLIMITADDR__SHIFT 0x0 596152fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_LIMIT__DRAMHOLEVALID_MASK 0x200000 596252fb57e7SAlex Deucher #define MC_FUS_DRAM1_CTL_LIMIT__DRAMHOLEVALID__SHIFT 0x15 596352fb57e7SAlex Deucher #define MC_FUS_DRAM_CTL_HIGH_01__DCTHIGHADDROFF0_MASK 0xfff 596452fb57e7SAlex Deucher #define MC_FUS_DRAM_CTL_HIGH_01__DCTHIGHADDROFF0__SHIFT 0x0 596552fb57e7SAlex Deucher #define MC_FUS_DRAM_CTL_HIGH_01__DCTHIGHADDROFF1_MASK 0xfff000 596652fb57e7SAlex Deucher #define MC_FUS_DRAM_CTL_HIGH_01__DCTHIGHADDROFF1__SHIFT 0xc 596752fb57e7SAlex Deucher #define MC_FUS_DRAM_CTL_HIGH_23__DCTHIGHADDROFF2_MASK 0xfff 596852fb57e7SAlex Deucher #define MC_FUS_DRAM_CTL_HIGH_23__DCTHIGHADDROFF2__SHIFT 0x0 596952fb57e7SAlex Deucher #define MC_FUS_DRAM_CTL_HIGH_23__DCTHIGHADDROFF3_MASK 0xfff000 597052fb57e7SAlex Deucher #define MC_FUS_DRAM_CTL_HIGH_23__DCTHIGHADDROFF3__SHIFT 0xc 597152fb57e7SAlex Deucher #define MC_FUS_DRAM_MODE__DCTSELINTLVADDR_MASK 0x7 597252fb57e7SAlex Deucher #define MC_FUS_DRAM_MODE__DCTSELINTLVADDR__SHIFT 0x0 597352fb57e7SAlex Deucher #define MC_FUS_DRAM_MODE__GDDR5EN_MASK 0x8 597452fb57e7SAlex Deucher #define MC_FUS_DRAM_MODE__GDDR5EN__SHIFT 0x3 597552fb57e7SAlex Deucher #define MC_FUS_DRAM_MODE__DRAMHOLEOFFSET_MASK 0x1ff0 597652fb57e7SAlex Deucher #define MC_FUS_DRAM_MODE__DRAMHOLEOFFSET__SHIFT 0x4 597752fb57e7SAlex Deucher #define MC_FUS_DRAM_APER_BASE__BASE_MASK 0xfffff 597852fb57e7SAlex Deucher #define MC_FUS_DRAM_APER_BASE__BASE__SHIFT 0x0 597952fb57e7SAlex Deucher #define MC_FUS_DRAM_APER_TOP__TOP_MASK 0xfffff 598052fb57e7SAlex Deucher #define MC_FUS_DRAM_APER_TOP__TOP__SHIFT 0x0 598152fb57e7SAlex Deucher #define MC_FUS_DRAM_C6SAVE_APER_BASE__BASE_MASK 0xfffff 598252fb57e7SAlex Deucher #define MC_FUS_DRAM_C6SAVE_APER_BASE__BASE__SHIFT 0x0 598352fb57e7SAlex Deucher #define MC_FUS_DRAM_C6SAVE_APER_TOP__TOP_MASK 0xfffff 598452fb57e7SAlex Deucher #define MC_FUS_DRAM_C6SAVE_APER_TOP__TOP__SHIFT 0x0 598552fb57e7SAlex Deucher #define MC_FUS_DRAM_APER_DEF__DEF_MASK 0xfffffff 598652fb57e7SAlex Deucher #define MC_FUS_DRAM_APER_DEF__DEF__SHIFT 0x0 598752fb57e7SAlex Deucher #define MC_FUS_DRAM_APER_DEF__LOCK_MC_FUS_DRAM_REGS_MASK 0x10000000 598852fb57e7SAlex Deucher #define MC_FUS_DRAM_APER_DEF__LOCK_MC_FUS_DRAM_REGS__SHIFT 0x1c 598952fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__DMIF_RD_TOKURG_EN_MASK 0x1 599052fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__DMIF_RD_TOKURG_EN__SHIFT 0x0 599152fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__UVD_RD_TOKURG_EN_MASK 0x2 599252fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__UVD_RD_TOKURG_EN__SHIFT 0x1 599352fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__VCE_RD_TOKURG_EN_MASK 0x4 599452fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__VCE_RD_TOKURG_EN__SHIFT 0x2 599552fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__ACP_RD_TOKURG_EN_MASK 0x8 599652fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__ACP_RD_TOKURG_EN__SHIFT 0x3 599752fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__DMIF_RD_PRIURG_EN_MASK 0x10 599852fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__DMIF_RD_PRIURG_EN__SHIFT 0x4 599952fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__UVD_RD_PRIURG_EN_MASK 0x20 600052fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__UVD_RD_PRIURG_EN__SHIFT 0x5 600152fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__VCE_RD_PRIURG_EN_MASK 0x40 600252fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__VCE_RD_PRIURG_EN__SHIFT 0x6 600352fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__ACP_RD_PRIURG_EN_MASK 0x80 600452fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__ACP_RD_PRIURG_EN__SHIFT 0x7 600552fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__DMIF_RD_ISOC_EN_MASK 0x100 600652fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__DMIF_RD_ISOC_EN__SHIFT 0x8 600752fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__UVD_RD_ISOC_EN_MASK 0x200 600852fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__UVD_RD_ISOC_EN__SHIFT 0x9 600952fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__VCE_RD_ISOC_EN_MASK 0x400 601052fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__VCE_RD_ISOC_EN__SHIFT 0xa 601152fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__MCIF_RD_ISOC_EN_MASK 0x800 601252fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__MCIF_RD_ISOC_EN__SHIFT 0xb 601352fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__UMC_RD_ISOC_EN_MASK 0x1000 601452fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__UMC_RD_ISOC_EN__SHIFT 0xc 601552fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__VCEU_RD_ISOC_EN_MASK 0x2000 601652fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__VCEU_RD_ISOC_EN__SHIFT 0xd 601752fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__ACP_RD_ISOC_EN_MASK 0x4000 601852fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__ACP_RD_ISOC_EN__SHIFT 0xe 601952fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__REQPRI_OVERRIDE_EN_MASK 0x8000 602052fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__REQPRI_OVERRIDE_EN__SHIFT 0xf 602152fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__REQPRI_OVERRIDE_VAL_MASK 0x30000 602252fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__REQPRI_OVERRIDE_VAL__SHIFT 0x10 602352fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__PRIPRMTE_OVERRIDE_EN_MASK 0x40000 602452fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__PRIPRMTE_OVERRIDE_EN__SHIFT 0x12 602552fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__TOKURG_OVERRIDE_EN_MASK 0x80000 602652fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__TOKURG_OVERRIDE_EN__SHIFT 0x13 602752fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__PRIURG_OVERRIDE_EN_MASK 0x100000 602852fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__PRIURG_OVERRIDE_EN__SHIFT 0x14 602952fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__PRIPRMTE_OVERRIDE_VAL_MASK 0x200000 603052fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__PRIPRMTE_OVERRIDE_VAL__SHIFT 0x15 603152fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__TOKURG_OVERRIDE_VAL_MASK 0x400000 603252fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__TOKURG_OVERRIDE_VAL__SHIFT 0x16 603352fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__PRIURG_OVERRIDE_VAL_MASK 0x800000 603452fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__PRIURG_OVERRIDE_VAL__SHIFT 0x17 603552fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__GARLIC_REQ_CREDITS_MASK 0x1f000000 603652fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__GARLIC_REQ_CREDITS__SHIFT 0x18 603752fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__MM_REL_LATE_MASK 0x20000000 603852fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_ISOC_PRI__MM_REL_LATE__SHIFT 0x1d 603952fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__RX_RDRESP_FIFO_PTR_INIT_VALUE_MASK 0xff 604052fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__RX_RDRESP_FIFO_PTR_INIT_VALUE__SHIFT 0x0 604152fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__RX_WRRESP_FIFO_PTR_INIT_VALUE_MASK 0x7f00 604252fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__RX_WRRESP_FIFO_PTR_INIT_VALUE__SHIFT 0x8 604352fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__EN_64_BYTE_WRITE_MASK 0x8000 604452fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__EN_64_BYTE_WRITE__SHIFT 0xf 604552fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__EDC_RESPONSE_ENABLE_MASK 0x10000 604652fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__EDC_RESPONSE_ENABLE__SHIFT 0x10 604752fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__OUTSTANDING_RDRESP_LIMIT_MASK 0x3fe0000 604852fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__OUTSTANDING_RDRESP_LIMIT__SHIFT 0x11 604952fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__OUTSTANDING_WRRESP_LIMIT_MASK 0xfc000000 605052fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_CNTL__OUTSTANDING_WRRESP_LIMIT__SHIFT 0x1a 605152fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__CB_WR_PRI_MASK 0x3 605252fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__CB_WR_PRI__SHIFT 0x0 605352fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__DB_WR_PRI_MASK 0xc 605452fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__DB_WR_PRI__SHIFT 0x2 605552fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__TC_WR_PRI_MASK 0x30 605652fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__TC_WR_PRI__SHIFT 0x4 605752fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__CP_WR_PRI_MASK 0xc0 605852fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__CP_WR_PRI__SHIFT 0x6 605952fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__HDP_WR_PRI_MASK 0x300 606052fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__HDP_WR_PRI__SHIFT 0x8 606152fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__XDP_WR_PRI_MASK 0xc00 606252fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__XDP_WR_PRI__SHIFT 0xa 606352fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__UMC_WR_PRI_MASK 0x3000 606452fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__UMC_WR_PRI__SHIFT 0xc 606552fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__UVD_WR_PRI_MASK 0xc000 606652fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__UVD_WR_PRI__SHIFT 0xe 606752fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__RLC_WR_PRI_MASK 0x30000 606852fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__RLC_WR_PRI__SHIFT 0x10 606952fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__IH_WR_PRI_MASK 0xc0000 607052fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__IH_WR_PRI__SHIFT 0x12 607152fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__SDMA_WR_PRI_MASK 0x300000 607252fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__SDMA_WR_PRI__SHIFT 0x14 607352fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__SEM_WR_PRI_MASK 0xc00000 607452fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__SEM_WR_PRI__SHIFT 0x16 607552fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__SH_WR_PRI_MASK 0x3000000 607652fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__SH_WR_PRI__SHIFT 0x18 607752fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__MCIF_WR_PRI_MASK 0xc000000 607852fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__MCIF_WR_PRI__SHIFT 0x1a 607952fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__VCE_WR_PRI_MASK 0x30000000 608052fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__VCE_WR_PRI__SHIFT 0x1c 608152fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__VCEU_WR_PRI_MASK 0xc0000000 608252fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI__VCEU_WR_PRI__SHIFT 0x1e 608352fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI2__SMU_WR_PRI_MASK 0x3 608452fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI2__SMU_WR_PRI__SHIFT 0x0 608552fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI2__SAM_WR_PRI_MASK 0xc 608652fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI2__SAM_WR_PRI__SHIFT 0x2 608752fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI2__ACP_WR_PRI_MASK 0x30 608852fb57e7SAlex Deucher #define MC_FUS_ARB_GARLIC_WR_PRI2__ACP_WR_PRI__SHIFT 0x4 608952fb57e7SAlex Deucher #define MC_CG_DATAPORT__DATA_FIELD_MASK 0xffffffff 609052fb57e7SAlex Deucher #define MC_CG_DATAPORT__DATA_FIELD__SHIFT 0x0 609152fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__DISABLE_FRAGMENTS_MASK 0x1 609252fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__DISABLE_FRAGMENTS__SHIFT 0x0 609352fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__DISABLE_INVALIDATE_BY_ADDRESS_RANGE_MASK 0x2 609452fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__DISABLE_INVALIDATE_BY_ADDRESS_RANGE__SHIFT 0x1 609552fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__EFFECTIVE_CAM_SIZE_MASK 0xf0 609652fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__EFFECTIVE_CAM_SIZE__SHIFT 0x4 609752fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__EFFECTIVE_WORK_QUEUE_SIZE_MASK 0x700 609852fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__EFFECTIVE_WORK_QUEUE_SIZE__SHIFT 0x8 609952fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__CREDITS_L1_L2_MASK 0x3f000 610052fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__CREDITS_L1_L2__SHIFT 0xc 610152fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__CREDITS_L1_RPB_MASK 0xff00000 610252fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__CREDITS_L1_RPB__SHIFT 0x14 610352fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__DEBUG_ECO_MASK 0x30000000 610452fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__DEBUG_ECO__SHIFT 0x1c 610552fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__INVALIDATE_ALL_MASK 0x40000000 610652fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__INVALIDATE_ALL__SHIFT 0x1e 610752fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__DISABLE_CACHING_UNTRANSLATED_RETURNS_MASK 0x80000000 610852fb57e7SAlex Deucher #define CHUB_ATC_L1_DEBUG_TLB__DISABLE_CACHING_UNTRANSLATED_RETURNS__SHIFT 0x1f 610952fb57e7SAlex Deucher #define CHUB_ATC_L1_STATUS__BUSY_MASK 0x1 611052fb57e7SAlex Deucher #define CHUB_ATC_L1_STATUS__BUSY__SHIFT 0x0 611152fb57e7SAlex Deucher #define CHUB_ATC_L1_STATUS__DEADLOCK_DETECTION_MASK 0x2 611252fb57e7SAlex Deucher #define CHUB_ATC_L1_STATUS__DEADLOCK_DETECTION__SHIFT 0x1 611352fb57e7SAlex Deucher #define CHUB_ATC_L1_STATUS__BAD_NEED_ATS_MASK 0x100 611452fb57e7SAlex Deucher #define CHUB_ATC_L1_STATUS__BAD_NEED_ATS__SHIFT 0x8 611552fb57e7SAlex Deucher 611652fb57e7SAlex Deucher #endif /* GMC_7_0_SH_MASK_H */ 6117