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Searched refs:VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_sh_mask.h5309 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK 0x70000000 macro
H A Dgmc_8_2_sh_mask.h6431 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK 0x70000000 macro
H A Dgmc_7_1_sh_mask.h5951 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK 0x70000000 macro
H A Dgmc_8_1_sh_mask.h6553 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK 0x70000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_1_sh_mask.h7445 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK … macro
H A Dmmhub_1_0_sh_mask.h7782 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK … macro
H A Dmmhub_9_3_0_sh_mask.h7872 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK … macro
H A Dmmhub_1_8_0_sh_mask.h19794 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK … macro
H A Dmmhub_1_7_sh_mask.h29710 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h6710 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK … macro
H A Dgc_9_2_1_sh_mask.h6347 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK … macro
H A Dgc_9_1_sh_mask.h6524 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK … macro
H A Dgc_9_4_3_sh_mask.h8999 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK … macro
H A Dgc_9_4_2_sh_mask.h29228 #define VM_L2_CNTL2__PDE_CACHE_EFFECTIVE_SIZE_MASK … macro