Home
last modified time | relevance | path

Searched refs:UVD_VCPU_INT_STATUS__SW_RB1_INT__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_sh_mask.h3946 #define UVD_VCPU_INT_STATUS__SW_RB1_INT__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h3045 #define UVD_VCPU_INT_STATUS__SW_RB1_INT__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h2981 #define UVD_VCPU_INT_STATUS__SW_RB1_INT__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h2985 #define UVD_VCPU_INT_STATUS__SW_RB1_INT__SHIFT … macro