Home
last modified time | relevance | path

Searched refs:UVD_SYS_INT_EN__RASCNTL_VCPU_VCODEC_EN_MASK (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c1763 tmp = UVD_SYS_INT_EN__RASCNTL_VCPU_VCODEC_EN_MASK; in vcn_v4_0_3_enable_ras()
H A Dvcn_v4_0.c899 tmp = UVD_SYS_INT_EN__RASCNTL_VCPU_VCODEC_EN_MASK; in vcn_v4_0_enable_ras()
H A Dvcn_v2_5.c813 tmp = UVD_SYS_INT_EN__RASCNTL_VCPU_VCODEC_EN_MASK; in vcn_v2_6_enable_ras()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h3646 #define UVD_SYS_INT_EN__RASCNTL_VCPU_VCODEC_EN_MASK … macro
H A Dvcn_2_6_0_sh_mask.h4185 #define UVD_SYS_INT_EN__RASCNTL_VCPU_VCODEC_EN_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3222 #define UVD_SYS_INT_EN__RASCNTL_VCPU_VCODEC_EN_MASK … macro
H A Dvcn_4_0_3_sh_mask.h3238 #define UVD_SYS_INT_EN__RASCNTL_VCPU_VCODEC_EN_MASK … macro