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Searched refs:UVD_RB_BASE_HI3__RB_BASE_HI_MASK (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h361 #define UVD_RB_BASE_HI3__RB_BASE_HI_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h789 #define UVD_RB_BASE_HI3__RB_BASE_HI_MASK … macro
H A Dvcn_2_5_sh_mask.h2490 #define UVD_RB_BASE_HI3__RB_BASE_HI_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1752 #define UVD_RB_BASE_HI3__RB_BASE_HI_MASK … macro
H A Dvcn_2_6_0_sh_mask.h4312 #define UVD_RB_BASE_HI3__RB_BASE_HI_MASK … macro
H A Dvcn_3_0_0_sh_mask.h3419 #define UVD_RB_BASE_HI3__RB_BASE_HI_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3337 #define UVD_RB_BASE_HI3__RB_BASE_HI_MASK … macro
H A Dvcn_4_0_3_sh_mask.h3361 #define UVD_RB_BASE_HI3__RB_BASE_HI_MASK … macro