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Searched refs:UVD_PGFSM_STATUS__UVDU_PWR_STATUS__SHIFT (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h51 #define UVD_PGFSM_STATUS__UVDU_PWR_STATUS__SHIFT … macro
H A Dvcn_2_5_sh_mask.h1489 #define UVD_PGFSM_STATUS__UVDU_PWR_STATUS__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h1486 #define UVD_PGFSM_STATUS__UVDU_PWR_STATUS__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h2927 #define UVD_PGFSM_STATUS__UVDU_PWR_STATUS__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2017 #define UVD_PGFSM_STATUS__UVDU_PWR_STATUS__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v2_0.c782 | 2 << UVD_PGFSM_STATUS__UVDU_PWR_STATUS__SHIFT in vcn_v2_0_enable_static_power_gating()
H A Dvcn_v1_0.c768 | 2 << UVD_PGFSM_STATUS__UVDU_PWR_STATUS__SHIFT in vcn_1_0_enable_static_power_gating()
H A Dvcn_v3_0.c673 | 2 << UVD_PGFSM_STATUS__UVDU_PWR_STATUS__SHIFT in vcn_v3_0_enable_static_power_gating()